1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * @file iris_fence.c
25 *
26 * Fences for driver and IPC serialisation, scheduling and synchronisation.
27 */
28
29 #include "drm-uapi/sync_file.h"
30 #include "util/u_debug.h"
31 #include "util/u_inlines.h"
32 #include "intel/common/intel_gem.h"
33
34 #include "iris_batch.h"
35 #include "iris_bufmgr.h"
36 #include "iris_context.h"
37 #include "iris_fence.h"
38 #include "iris_screen.h"
39
40 static uint32_t
gem_syncobj_create(int fd,uint32_t flags)41 gem_syncobj_create(int fd, uint32_t flags)
42 {
43 struct drm_syncobj_create args = {
44 .flags = flags,
45 };
46
47 intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_CREATE, &args);
48
49 return args.handle;
50 }
51
52 static void
gem_syncobj_destroy(int fd,uint32_t handle)53 gem_syncobj_destroy(int fd, uint32_t handle)
54 {
55 struct drm_syncobj_destroy args = {
56 .handle = handle,
57 };
58
59 intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_DESTROY, &args);
60 }
61
62 /**
63 * Make a new sync-point.
64 */
65 struct iris_syncobj *
iris_create_syncobj(struct iris_bufmgr * bufmgr)66 iris_create_syncobj(struct iris_bufmgr *bufmgr)
67 {
68 int fd = iris_bufmgr_get_fd(bufmgr);
69 struct iris_syncobj *syncobj = malloc(sizeof(*syncobj));
70
71 if (!syncobj)
72 return NULL;
73
74 syncobj->handle = gem_syncobj_create(fd, 0);
75 assert(syncobj->handle);
76
77 pipe_reference_init(&syncobj->ref, 1);
78
79 return syncobj;
80 }
81
82 void
iris_syncobj_destroy(struct iris_bufmgr * bufmgr,struct iris_syncobj * syncobj)83 iris_syncobj_destroy(struct iris_bufmgr *bufmgr, struct iris_syncobj *syncobj)
84 {
85 int fd = iris_bufmgr_get_fd(bufmgr);
86 gem_syncobj_destroy(fd, syncobj->handle);
87 free(syncobj);
88 }
89
90 void
iris_syncobj_signal(struct iris_bufmgr * bufmgr,struct iris_syncobj * syncobj)91 iris_syncobj_signal(struct iris_bufmgr *bufmgr, struct iris_syncobj *syncobj)
92 {
93 int fd = iris_bufmgr_get_fd(bufmgr);
94 struct drm_syncobj_array args = {
95 .handles = (uintptr_t)&syncobj->handle,
96 .count_handles = 1,
97 };
98
99 if (intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_SIGNAL, &args)) {
100 fprintf(stderr, "failed to signal syncobj %"PRIu32"\n",
101 syncobj->handle);
102 }
103 }
104
105 /**
106 * Add a sync-point to the batch, with the given flags.
107 *
108 * \p flags One of IRIS_BATCH_FENCE_WAIT or IRIS_BATCH_FENCE_SIGNAL.
109 */
110 void
iris_batch_add_syncobj(struct iris_batch * batch,struct iris_syncobj * syncobj,uint32_t flags)111 iris_batch_add_syncobj(struct iris_batch *batch,
112 struct iris_syncobj *syncobj,
113 uint32_t flags)
114 {
115 struct iris_batch_fence *fence =
116 util_dynarray_grow(&batch->exec_fences, struct iris_batch_fence, 1);
117
118 *fence = (struct iris_batch_fence) {
119 .handle = syncobj->handle,
120 .flags = flags,
121 };
122
123 struct iris_syncobj **store =
124 util_dynarray_grow(&batch->syncobjs, struct iris_syncobj *, 1);
125
126 *store = NULL;
127 iris_syncobj_reference(batch->screen->bufmgr, store, syncobj);
128 }
129
130 /**
131 * Walk through a batch's dependencies (any IRIS_BATCH_FENCE_WAIT syncobjs)
132 * and unreference any which have already passed.
133 *
134 * Sometimes the compute batch is seldom used, and accumulates references
135 * to stale render batches that are no longer of interest, so we can free
136 * those up.
137 */
138 static void
clear_stale_syncobjs(struct iris_batch * batch)139 clear_stale_syncobjs(struct iris_batch *batch)
140 {
141 struct iris_screen *screen = batch->screen;
142 struct iris_bufmgr *bufmgr = screen->bufmgr;
143
144 int n = util_dynarray_num_elements(&batch->syncobjs, struct iris_syncobj *);
145
146 assert(n == util_dynarray_num_elements(&batch->exec_fences,
147 struct iris_batch_fence));
148
149 /* Skip the first syncobj, as it's the signalling one. */
150 for (int i = n - 1; i > 0; i--) {
151 struct iris_syncobj **syncobj =
152 util_dynarray_element(&batch->syncobjs, struct iris_syncobj *, i);
153 struct iris_batch_fence *fence =
154 util_dynarray_element(&batch->exec_fences,
155 struct iris_batch_fence, i);
156 assert(fence->flags & IRIS_BATCH_FENCE_WAIT);
157
158 if (iris_wait_syncobj(bufmgr, *syncobj, 0) == false)
159 continue;
160
161 /* This sync object has already passed, there's no need to continue
162 * marking it as a dependency; we can stop holding on to the reference.
163 */
164 iris_syncobj_reference(bufmgr, syncobj, NULL);
165
166 /* Remove it from the lists; move the last element here. */
167 struct iris_syncobj **nth_syncobj =
168 util_dynarray_pop_ptr(&batch->syncobjs, struct iris_syncobj *);
169 struct iris_batch_fence *nth_fence =
170 util_dynarray_pop_ptr(&batch->exec_fences, struct iris_batch_fence);
171
172 if (syncobj != nth_syncobj) {
173 *syncobj = *nth_syncobj;
174 memcpy(fence, nth_fence, sizeof(*fence));
175 }
176 }
177 }
178
179 /* ------------------------------------------------------------------- */
180
181 struct pipe_fence_handle {
182 struct pipe_reference ref;
183
184 struct pipe_context *unflushed_ctx;
185
186 struct iris_fine_fence *fine[IRIS_BATCH_COUNT];
187 };
188
189 static void
iris_fence_destroy(struct pipe_screen * p_screen,struct pipe_fence_handle * fence)190 iris_fence_destroy(struct pipe_screen *p_screen,
191 struct pipe_fence_handle *fence)
192 {
193 struct iris_screen *screen = (struct iris_screen *)p_screen;
194
195 for (unsigned i = 0; i < ARRAY_SIZE(fence->fine); i++)
196 iris_fine_fence_reference(screen, &fence->fine[i], NULL);
197
198 free(fence);
199 }
200
201 static void
iris_fence_reference(struct pipe_screen * p_screen,struct pipe_fence_handle ** dst,struct pipe_fence_handle * src)202 iris_fence_reference(struct pipe_screen *p_screen,
203 struct pipe_fence_handle **dst,
204 struct pipe_fence_handle *src)
205 {
206 if (pipe_reference(*dst ? &(*dst)->ref : NULL,
207 src ? &src->ref : NULL))
208 iris_fence_destroy(p_screen, *dst);
209
210 *dst = src;
211 }
212
213 bool
iris_wait_syncobj(struct iris_bufmgr * bufmgr,struct iris_syncobj * syncobj,int64_t timeout_nsec)214 iris_wait_syncobj(struct iris_bufmgr *bufmgr,
215 struct iris_syncobj *syncobj,
216 int64_t timeout_nsec)
217 {
218 if (!syncobj)
219 return false;
220
221 int fd = iris_bufmgr_get_fd(bufmgr);
222
223 struct drm_syncobj_wait args = {
224 .handles = (uintptr_t)&syncobj->handle,
225 .count_handles = 1,
226 .timeout_nsec = timeout_nsec,
227 };
228 return intel_ioctl(fd, DRM_IOCTL_SYNCOBJ_WAIT, &args) == 0;
229 }
230
231 #define CSI "\e["
232 #define BLUE_HEADER CSI "0;97;44m"
233 #define NORMAL CSI "0m"
234
235 static void
iris_fence_flush(struct pipe_context * ctx,struct pipe_fence_handle ** out_fence,unsigned flags)236 iris_fence_flush(struct pipe_context *ctx,
237 struct pipe_fence_handle **out_fence,
238 unsigned flags)
239 {
240 struct iris_screen *screen = (void *) ctx->screen;
241 struct iris_context *ice = (struct iris_context *)ctx;
242
243 /* We require DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (kernel 5.2+) for
244 * deferred flushes. Just ignore the request to defer on older kernels.
245 */
246 if (!(screen->kernel_features & KERNEL_HAS_WAIT_FOR_SUBMIT))
247 flags &= ~PIPE_FLUSH_DEFERRED;
248
249 const bool deferred = flags & PIPE_FLUSH_DEFERRED;
250
251 if (flags & PIPE_FLUSH_END_OF_FRAME) {
252 ice->frame++;
253
254 if (INTEL_DEBUG(DEBUG_SUBMIT)) {
255 fprintf(stderr, "%s ::: FRAME %-10u (ctx %p)%-35c%s\n",
256 INTEL_DEBUG(DEBUG_COLOR) ? BLUE_HEADER : "",
257 ice->frame, ctx, ' ',
258 INTEL_DEBUG(DEBUG_COLOR) ? NORMAL : "");
259 }
260 }
261
262 iris_flush_dirty_dmabufs(ice);
263
264 if (!deferred) {
265 iris_foreach_batch(ice, batch)
266 iris_batch_flush(batch);
267 }
268
269 if (flags & PIPE_FLUSH_END_OF_FRAME) {
270 iris_measure_frame_end(ice);
271 }
272
273 intel_ds_device_process(&ice->ds, flags & PIPE_FLUSH_END_OF_FRAME);
274
275 if (!out_fence)
276 return;
277
278 struct pipe_fence_handle *fence = calloc(1, sizeof(*fence));
279 if (!fence)
280 return;
281
282 pipe_reference_init(&fence->ref, 1);
283
284 if (deferred)
285 fence->unflushed_ctx = ctx;
286
287 iris_foreach_batch(ice, batch) {
288 unsigned b = batch->name;
289
290 if (deferred && iris_batch_bytes_used(batch) > 0) {
291 struct iris_fine_fence *fine = iris_fine_fence_new(batch);
292 iris_fine_fence_reference(screen, &fence->fine[b], fine);
293 iris_fine_fence_reference(screen, &fine, NULL);
294 } else {
295 /* This batch has no commands queued up (perhaps we just flushed,
296 * or all the commands are on the other batch). Wait for the last
297 * syncobj on this engine - unless it's already finished by now.
298 */
299 if (iris_fine_fence_signaled(batch->last_fence))
300 continue;
301
302 iris_fine_fence_reference(screen, &fence->fine[b], batch->last_fence);
303 }
304 }
305
306 iris_fence_reference(ctx->screen, out_fence, NULL);
307 *out_fence = fence;
308 }
309
310 static int
syncobj_wait_available(int drm_fd,uint32_t handle)311 syncobj_wait_available(int drm_fd, uint32_t handle)
312 {
313 struct drm_syncobj_timeline_wait wait_args = {
314 .handles = (uintptr_t) &handle,
315 .timeout_nsec = INT64_MAX,
316 .count_handles = 1,
317 /* Wait for fence to materialize. */
318 .flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE,
319 };
320
321 return intel_ioctl(drm_fd, DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, &wait_args);
322 }
323
324 static void
iris_fence_await(struct pipe_context * ctx,struct pipe_fence_handle * fence)325 iris_fence_await(struct pipe_context *ctx,
326 struct pipe_fence_handle *fence)
327 {
328 struct iris_context *ice = (struct iris_context *)ctx;
329
330 /* Unflushed fences from the same context are no-ops. */
331 if (ctx && ctx == fence->unflushed_ctx)
332 return;
333
334 /* XXX: We can't safely flush the other context, because it might be
335 * bound to another thread, and poking at its internals wouldn't
336 * be safe. In the future we should use MI_SEMAPHORE_WAIT and
337 * block until the other job has been submitted, relying on
338 * kernel timeslicing to preempt us until the other job is
339 * actually flushed and the seqno finally passes.
340 */
341 if (fence->unflushed_ctx) {
342 util_debug_message(&ice->dbg, CONFORMANCE, "%s",
343 "glWaitSync on unflushed fence from another context "
344 "is unlikely to work without kernel 5.8+\n");
345 }
346
347 for (unsigned i = 0; i < ARRAY_SIZE(fence->fine); i++) {
348 struct iris_fine_fence *fine = fence->fine[i];
349
350 if (iris_fine_fence_signaled(fine))
351 continue;
352
353 /* For imported fence, wait for fence to be available to make
354 * sure we can safely submit a batch with it.
355 */
356 if (fine->seqno == UINT32_MAX) {
357 const struct iris_screen *screen =
358 (struct iris_screen *)ice->ctx.screen;
359 struct iris_bufmgr *bufmgr = screen->bufmgr;
360 if (syncobj_wait_available(iris_bufmgr_get_fd(bufmgr),
361 fine->syncobj->handle)) {
362 fprintf(stderr, "error waiting for syncobj: %s\n", strerror(errno));
363 }
364 }
365
366 iris_foreach_batch(ice, batch) {
367 /* We're going to make any future work in this batch wait for our
368 * fence to have gone by. But any currently queued work doesn't
369 * need to wait. Flush the batch now, so it can happen sooner.
370 */
371 iris_batch_flush(batch);
372
373 /* Before adding a new reference, clean out any stale ones. */
374 clear_stale_syncobjs(batch);
375
376 iris_batch_add_syncobj(batch, fine->syncobj, IRIS_BATCH_FENCE_WAIT);
377 }
378 }
379 }
380
381 #define NSEC_PER_SEC (1000 * USEC_PER_SEC)
382 #define USEC_PER_SEC (1000 * MSEC_PER_SEC)
383 #define MSEC_PER_SEC (1000)
384
385 static uint64_t
gettime_ns(void)386 gettime_ns(void)
387 {
388 struct timespec current;
389 clock_gettime(CLOCK_MONOTONIC, ¤t);
390 return (uint64_t)current.tv_sec * NSEC_PER_SEC + current.tv_nsec;
391 }
392
393 static uint64_t
rel2abs(uint64_t timeout)394 rel2abs(uint64_t timeout)
395 {
396 if (timeout == 0)
397 return 0;
398
399 uint64_t current_time = gettime_ns();
400 uint64_t max_timeout = (uint64_t) INT64_MAX - current_time;
401
402 timeout = MIN2(max_timeout, timeout);
403
404 return current_time + timeout;
405 }
406
407 static bool
iris_fence_finish(struct pipe_screen * p_screen,struct pipe_context * ctx,struct pipe_fence_handle * fence,uint64_t timeout)408 iris_fence_finish(struct pipe_screen *p_screen,
409 struct pipe_context *ctx,
410 struct pipe_fence_handle *fence,
411 uint64_t timeout)
412 {
413 ctx = threaded_context_unwrap_sync(ctx);
414
415 struct iris_context *ice = (struct iris_context *)ctx;
416 struct iris_screen *screen = (struct iris_screen *)p_screen;
417
418 /* If we created the fence with PIPE_FLUSH_DEFERRED, we may not have
419 * flushed yet. Check if our syncobj is the current batch's signalling
420 * syncobj - if so, we haven't flushed and need to now.
421 *
422 * The Gallium docs mention that a flush will occur if \p ctx matches
423 * the context the fence was created with. It may be NULL, so we check
424 * that it matches first.
425 */
426 if (ctx && ctx == fence->unflushed_ctx) {
427 iris_foreach_batch(ice, batch) {
428 struct iris_fine_fence *fine = fence->fine[batch->name];
429
430 if (iris_fine_fence_signaled(fine))
431 continue;
432
433 if (fine->syncobj == iris_batch_get_signal_syncobj(batch))
434 iris_batch_flush(batch);
435 }
436
437 /* The fence is no longer deferred. */
438 fence->unflushed_ctx = NULL;
439 }
440
441 unsigned int handle_count = 0;
442 uint32_t handles[ARRAY_SIZE(fence->fine)];
443 for (unsigned i = 0; i < ARRAY_SIZE(fence->fine); i++) {
444 struct iris_fine_fence *fine = fence->fine[i];
445
446 if (iris_fine_fence_signaled(fine))
447 continue;
448
449 handles[handle_count++] = fine->syncobj->handle;
450 }
451
452 if (handle_count == 0)
453 return true;
454
455 struct drm_syncobj_wait args = {
456 .handles = (uintptr_t)handles,
457 .count_handles = handle_count,
458 .timeout_nsec = rel2abs(timeout),
459 .flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL
460 };
461
462 if (fence->unflushed_ctx) {
463 /* This fence had a deferred flush from another context. We can't
464 * safely flush it here, because the context might be bound to a
465 * different thread, and poking at its internals wouldn't be safe.
466 *
467 * Instead, use the WAIT_FOR_SUBMIT flag to block and hope that
468 * another thread submits the work.
469 */
470 args.flags |= DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT;
471 }
472
473 return intel_ioctl(screen->fd, DRM_IOCTL_SYNCOBJ_WAIT, &args) == 0;
474 }
475
476 static int
sync_merge_fd(int sync_fd,int new_fd)477 sync_merge_fd(int sync_fd, int new_fd)
478 {
479 if (sync_fd == -1)
480 return new_fd;
481
482 if (new_fd == -1)
483 return sync_fd;
484
485 struct sync_merge_data args = {
486 .name = "iris fence",
487 .fd2 = new_fd,
488 .fence = -1,
489 };
490
491 intel_ioctl(sync_fd, SYNC_IOC_MERGE, &args);
492 close(new_fd);
493 close(sync_fd);
494
495 return args.fence;
496 }
497
498 static int
iris_fence_get_fd(struct pipe_screen * p_screen,struct pipe_fence_handle * fence)499 iris_fence_get_fd(struct pipe_screen *p_screen,
500 struct pipe_fence_handle *fence)
501 {
502 struct iris_screen *screen = (struct iris_screen *)p_screen;
503 int fd = -1;
504
505 /* Deferred fences aren't supported. */
506 if (fence->unflushed_ctx)
507 return -1;
508
509 for (unsigned i = 0; i < ARRAY_SIZE(fence->fine); i++) {
510 struct iris_fine_fence *fine = fence->fine[i];
511
512 if (iris_fine_fence_signaled(fine))
513 continue;
514
515 struct drm_syncobj_handle args = {
516 .handle = fine->syncobj->handle,
517 .flags = DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE,
518 .fd = -1,
519 };
520
521 intel_ioctl(screen->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &args);
522 fd = sync_merge_fd(fd, args.fd);
523 }
524
525 if (fd == -1) {
526 /* Our fence has no syncobj's recorded. This means that all of the
527 * batches had already completed, their syncobj's had been signalled,
528 * and so we didn't bother to record them. But we're being asked to
529 * export such a fence. So export a dummy already-signalled syncobj.
530 */
531 struct drm_syncobj_handle args = {
532 .flags = DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE, .fd = -1,
533 };
534
535 args.handle = gem_syncobj_create(screen->fd, DRM_SYNCOBJ_CREATE_SIGNALED);
536 intel_ioctl(screen->fd, DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD, &args);
537 gem_syncobj_destroy(screen->fd, args.handle);
538 return args.fd;
539 }
540
541 return fd;
542 }
543
544 static void
iris_fence_create_fd(struct pipe_context * ctx,struct pipe_fence_handle ** out,int fd,enum pipe_fd_type type)545 iris_fence_create_fd(struct pipe_context *ctx,
546 struct pipe_fence_handle **out,
547 int fd,
548 enum pipe_fd_type type)
549 {
550 assert(type == PIPE_FD_TYPE_NATIVE_SYNC || type == PIPE_FD_TYPE_SYNCOBJ);
551
552 struct iris_screen *screen = (struct iris_screen *)ctx->screen;
553 struct drm_syncobj_handle args = {
554 .fd = fd,
555 };
556
557 if (type == PIPE_FD_TYPE_NATIVE_SYNC) {
558 args.flags = DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE;
559 args.handle = gem_syncobj_create(screen->fd, DRM_SYNCOBJ_CREATE_SIGNALED);
560 }
561
562 if (intel_ioctl(screen->fd, DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE, &args) == -1) {
563 fprintf(stderr, "DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE failed: %s\n",
564 strerror(errno));
565 if (type == PIPE_FD_TYPE_NATIVE_SYNC)
566 gem_syncobj_destroy(screen->fd, args.handle);
567 *out = NULL;
568 return;
569 }
570
571 struct iris_syncobj *syncobj = malloc(sizeof(*syncobj));
572 if (!syncobj) {
573 *out = NULL;
574 return;
575 }
576 syncobj->handle = args.handle;
577 pipe_reference_init(&syncobj->ref, 1);
578
579 struct iris_fine_fence *fine = calloc(1, sizeof(*fine));
580 if (!fine) {
581 free(syncobj);
582 *out = NULL;
583 return;
584 }
585
586 static const uint32_t zero = 0;
587
588 /* Fences work in terms of iris_fine_fence, but we don't actually have a
589 * seqno for an imported fence. So, create a fake one which always
590 * returns as 'not signaled' so we fall back to using the sync object.
591 */
592 fine->seqno = UINT32_MAX;
593 fine->map = &zero;
594 fine->syncobj = syncobj;
595 pipe_reference_init(&fine->reference, 1);
596
597 struct pipe_fence_handle *fence = calloc(1, sizeof(*fence));
598 if (!fence) {
599 free(fine);
600 free(syncobj);
601 *out = NULL;
602 return;
603 }
604 pipe_reference_init(&fence->ref, 1);
605 fence->fine[0] = fine;
606
607 *out = fence;
608 }
609
610 static void
iris_fence_signal(struct pipe_context * ctx,struct pipe_fence_handle * fence)611 iris_fence_signal(struct pipe_context *ctx,
612 struct pipe_fence_handle *fence)
613 {
614 struct iris_context *ice = (struct iris_context *)ctx;
615
616 if (ctx == fence->unflushed_ctx)
617 return;
618
619 iris_foreach_batch(ice, batch) {
620 for (unsigned i = 0; i < ARRAY_SIZE(fence->fine); i++) {
621 struct iris_fine_fence *fine = fence->fine[i];
622
623 /* already signaled fence skipped */
624 if (iris_fine_fence_signaled(fine))
625 continue;
626
627 batch->contains_fence_signal = true;
628 iris_batch_add_syncobj(batch, fine->syncobj, IRIS_BATCH_FENCE_SIGNAL);
629 }
630 if (batch->contains_fence_signal)
631 iris_batch_flush(batch);
632 }
633 }
634
635 void
iris_init_screen_fence_functions(struct pipe_screen * screen)636 iris_init_screen_fence_functions(struct pipe_screen *screen)
637 {
638 screen->fence_reference = iris_fence_reference;
639 screen->fence_finish = iris_fence_finish;
640 screen->fence_get_fd = iris_fence_get_fd;
641 }
642
643 void
iris_init_context_fence_functions(struct pipe_context * ctx)644 iris_init_context_fence_functions(struct pipe_context *ctx)
645 {
646 ctx->flush = iris_fence_flush;
647 ctx->create_fence_fd = iris_fence_create_fd;
648 ctx->fence_server_sync = iris_fence_await;
649 ctx->fence_server_signal = iris_fence_signal;
650 }
651