1
2 #include "../sfn_instr_alugroup.h"
3 #include "../sfn_instr_export.h"
4 #include "../sfn_instr_fetch.h"
5 #include "../sfn_instr_lds.h"
6 #include "../sfn_instr_tex.h"
7
8 #include "gtest/gtest.h"
9
10 using namespace r600;
11
12 using std::vector;
13
14 class InstrTest : public ::testing::Test {
SetUp()15 void SetUp() override { init_pool(); }
16
TearDown()17 void TearDown() override { release_pool(); }
18
19 protected:
check(const Instr & lhs,const Instr & rhs) const20 void check(const Instr& lhs, const Instr& rhs) const { EXPECT_EQ(lhs, rhs); }
21 };
22
TEST_F(InstrTest,test_alu_barrier)23 TEST_F(InstrTest, test_alu_barrier)
24 {
25 AluInstr alu(op0_group_barrier);
26
27 EXPECT_FALSE(alu.has_alu_flag(alu_write));
28 EXPECT_EQ(alu.opcode(), op0_group_barrier);
29
30 EXPECT_EQ(alu.dest_chan(), 0);
31
32 EXPECT_EQ(alu, alu);
33 }
34
TEST_F(InstrTest,test_alu_uni_op_mov)35 TEST_F(InstrTest, test_alu_uni_op_mov)
36 {
37 AluInstr alu(op1_mov,
38 new Register(128, 2, pin_none),
39 new Register(129, 0, pin_chan),
40 {alu_write});
41
42 EXPECT_TRUE(alu.has_alu_flag(alu_write));
43
44 EXPECT_FALSE(alu.has_alu_flag(alu_last_instr));
45 EXPECT_FALSE(alu.end_group());
46 EXPECT_FALSE(alu.has_alu_flag(alu_op3));
47 EXPECT_FALSE(alu.has_source_mod(0, AluInstr::mod_abs));
48 EXPECT_FALSE(alu.has_source_mod(0, AluInstr::mod_neg));
49
50 EXPECT_EQ(alu.opcode(), op1_mov);
51
52 EXPECT_EQ(alu.dest_chan(), 2);
53 auto dest = alu.dest();
54
55 ASSERT_TRUE(dest);
56 EXPECT_EQ(dest->sel(), 128);
57 EXPECT_EQ(dest->chan(), 2);
58 EXPECT_EQ(dest->pin(), pin_none);
59
60 auto src0 = alu.psrc(0);
61 ASSERT_TRUE(src0);
62
63 EXPECT_EQ(src0->sel(), 129);
64 EXPECT_EQ(src0->chan(), 0);
65 EXPECT_EQ(src0->pin(), pin_chan);
66
67 EXPECT_EQ(alu.n_sources(), 1);
68
69 EXPECT_FALSE(alu.psrc(1));
70 EXPECT_FALSE(alu.psrc(2));
71
72 alu.set_source_mod(0, AluInstr::mod_abs);;
73 EXPECT_TRUE(alu.has_source_mod(0, AluInstr::mod_abs));
74
75 alu.set_source_mod(0, AluInstr::mod_neg);
76 EXPECT_TRUE(alu.has_source_mod(0, AluInstr::mod_neg));
77 }
78
TEST_F(InstrTest,test_alu_op2)79 TEST_F(InstrTest, test_alu_op2)
80 {
81 AluInstr alu(op2_add,
82 new Register(130, 1, pin_none),
83 new Register(129, 2, pin_chan),
84 new Register(129, 3, pin_none),
85 {alu_write, alu_last_instr});
86
87 EXPECT_TRUE(alu.has_alu_flag(alu_write));
88
89 EXPECT_TRUE(alu.has_alu_flag(alu_last_instr));
90 EXPECT_FALSE(alu.has_alu_flag(alu_op3));
91
92 EXPECT_FALSE(alu.has_source_mod(0, AluInstr::mod_neg));
93 EXPECT_FALSE(alu.has_source_mod(1, AluInstr::mod_neg));
94 EXPECT_FALSE(alu.has_source_mod(2, AluInstr::mod_neg));
95
96 EXPECT_FALSE(alu.has_alu_flag(alu_src0_rel));
97 EXPECT_FALSE(alu.has_alu_flag(alu_src1_rel));
98 EXPECT_FALSE(alu.has_alu_flag(alu_src2_rel));
99
100 EXPECT_EQ(alu.opcode(), op2_add);
101
102 EXPECT_EQ(alu.dest_chan(), 1);
103 auto dest = alu.dest();
104
105 ASSERT_TRUE(dest);
106 EXPECT_EQ(dest->sel(), 130);
107 EXPECT_EQ(dest->chan(), 1);
108 EXPECT_EQ(dest->pin(), pin_none);
109
110 EXPECT_EQ(alu.n_sources(), 2);
111
112 auto src0 = alu.psrc(0);
113 ASSERT_TRUE(src0);
114
115 EXPECT_EQ(src0->sel(), 129);
116 EXPECT_EQ(src0->chan(), 2);
117 EXPECT_EQ(src0->pin(), pin_chan);
118
119 auto src1 = alu.psrc(1);
120 ASSERT_TRUE(src1);
121
122 EXPECT_EQ(src1->sel(), 129);
123 EXPECT_EQ(src1->chan(), 3);
124 EXPECT_EQ(src1->pin(), pin_none);
125
126 EXPECT_FALSE(alu.psrc(2));
127 EXPECT_EQ(alu, alu);
128 }
129
TEST_F(InstrTest,test_alu_op3)130 TEST_F(InstrTest, test_alu_op3)
131 {
132 AluInstr alu(op3_cnde,
133 new Register(130, 1, pin_none),
134 new Register(129, 2, pin_chan),
135 new Register(129, 3, pin_none),
136 new Register(131, 1, pin_none),
137 {alu_write, alu_last_instr});
138
139 EXPECT_TRUE(alu.has_alu_flag(alu_write));
140 EXPECT_TRUE(alu.has_alu_flag(alu_last_instr));
141 EXPECT_TRUE(alu.end_group());
142 EXPECT_TRUE(alu.has_alu_flag(alu_op3));
143
144 EXPECT_EQ(alu.opcode(), op3_cnde);
145
146 EXPECT_EQ(alu.dest_chan(), 1);
147 auto dest = alu.dest();
148
149 ASSERT_TRUE(dest);
150 EXPECT_EQ(dest->sel(), 130);
151 EXPECT_EQ(dest->chan(), 1);
152 EXPECT_EQ(dest->pin(), pin_none);
153
154 EXPECT_EQ(alu.n_sources(), 3);
155
156 auto src0 = alu.psrc(0);
157 ASSERT_TRUE(src0);
158
159 EXPECT_EQ(src0->sel(), 129);
160 EXPECT_EQ(src0->chan(), 2);
161 EXPECT_EQ(src0->pin(), pin_chan);
162
163 auto src1 = alu.psrc(1);
164 ASSERT_TRUE(src1);
165
166 EXPECT_EQ(src1->sel(), 129);
167 EXPECT_EQ(src1->chan(), 3);
168 EXPECT_EQ(src1->pin(), pin_none);
169
170 auto src2 = alu.psrc(2);
171 ASSERT_TRUE(src2);
172
173 EXPECT_EQ(src2->sel(), 131);
174 EXPECT_EQ(src2->chan(), 1);
175 EXPECT_EQ(src2->pin(), pin_none);
176
177 EXPECT_EQ(alu, alu);
178 }
179
TEST_F(InstrTest,test_alu_op1_comp)180 TEST_F(InstrTest, test_alu_op1_comp)
181 {
182 auto r128z = new Register(128, 2, pin_none);
183 auto r128zc = new Register(128, 2, pin_chan);
184 auto r128y = new Register(128, 1, pin_none);
185 auto r129x = new Register(129, 0, pin_none);
186 auto r129xc = new Register(129, 0, pin_chan);
187 auto r129y = new Register(129, 1, pin_none);
188 auto r130x = new Register(130, 0, pin_none);
189
190 AluInstr alu1(op1_mov, r128z, r129x, {alu_write});
191 EXPECT_NE(alu1, AluInstr(op1_mov, r128y, r129x, {alu_write}));
192 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r129xc, {alu_write}));
193 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r129y, {alu_write}));
194 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r130x, {alu_write}));
195 EXPECT_NE(alu1, AluInstr(op1_mov, r128z, r129x, {alu_write, alu_last_instr}));
196 EXPECT_NE(alu1, AluInstr(op1_flt_to_int, r128z, r129x, {alu_write}));
197 EXPECT_NE(alu1, AluInstr(op1_mov, r128zc, r129x, {alu_write}));
198
199 EXPECT_EQ(alu1, alu1);
200 }
201
TEST_F(InstrTest,test_alu_op2_comp)202 TEST_F(InstrTest, test_alu_op2_comp)
203 {
204 auto r128x = new Register(128, 0, pin_none);
205 auto r128y = new Register(128, 1, pin_none);
206 auto r128z = new Register(128, 2, pin_none);
207
208 AluInstr alu1(op2_add, r128z, r128x, r128y, {alu_write});
209
210 EXPECT_NE(
211 alu1, AluInstr(op2_add, r128z, r128x, new Register(129, 2, pin_none), {alu_write}));
212 EXPECT_NE(
213 alu1, AluInstr(op2_add, r128z, r128x, new Register(128, 0, pin_none), {alu_write}));
214 EXPECT_NE(
215 alu1, AluInstr(op2_add, r128z, r128x, new Register(128, 1, pin_chan), {alu_write}));
216 }
217
TEST_F(InstrTest,test_alu_op3_comp)218 TEST_F(InstrTest, test_alu_op3_comp)
219 {
220 auto r128x = new Register(128, 0, pin_none);
221 auto r128y = new Register(128, 1, pin_none);
222 auto r128z = new Register(128, 2, pin_none);
223
224 AluInstr alu1(op3_muladd, r128z, r128x, r128y, r128y, {alu_write});
225
226 EXPECT_NE(
227 alu1,
228 AluInstr(
229 op3_muladd, r128z, r128x, r128y, new Register(129, 2, pin_none), {alu_write}));
230 EXPECT_NE(
231 alu1,
232 AluInstr(
233 op3_muladd, r128z, r128x, r128y, new Register(128, 0, pin_none), {alu_write}));
234 EXPECT_NE(
235 alu1,
236 AluInstr(
237 op3_muladd, r128z, r128x, r128y, new Register(128, 1, pin_chan), {alu_write}));
238 }
239
TEST_F(InstrTest,test_alu_op3_ne)240 TEST_F(InstrTest, test_alu_op3_ne)
241 {
242 auto R130x = new Register(130, 0, pin_none);
243 auto R130y = new Register(130, 1, pin_none);
244 auto R130z = new Register(130, 2, pin_none);
245 auto R131z = new Register(131, 2, pin_none);
246 auto R131w = new Register(131, 3, pin_none);
247
248 AluInstr alu(op3_cnde, R130x, R130y, R131z, R131w, {alu_write, alu_last_instr});
249
250 EXPECT_NE(
251 alu, AluInstr(op3_muladd, R130x, R130y, R131z, R131w, {alu_write, alu_last_instr}));
252
253 EXPECT_NE(alu,
254 AluInstr(op3_cnde, R130z, R130y, R131z, R131w, {alu_write, alu_last_instr}));
255 EXPECT_NE(alu,
256 AluInstr(op3_cnde, R130x, R130z, R131z, R131w, {alu_write, alu_last_instr}));
257 EXPECT_NE(alu,
258 AluInstr(op3_cnde, R130x, R130y, R130z, R131w, {alu_write, alu_last_instr}));
259 EXPECT_NE(alu,
260 AluInstr(op3_cnde, R130x, R130y, R131z, R130z, {alu_write, alu_last_instr}));
261 EXPECT_NE(alu, AluInstr(op3_cnde, R130x, R130y, R131z, R131w, {alu_write}));
262
263 AluInstr alu_cf_changes = alu;
264 alu_cf_changes.set_cf_type(cf_alu_push_before);
265
266 EXPECT_NE(alu, alu_cf_changes);
267
268 AluInstr alu_bs_changes = alu;
269 alu_bs_changes.set_bank_swizzle(alu_vec_021);
270
271 EXPECT_NE(alu, alu_bs_changes);
272 };
273
TEST_F(InstrTest,test_alu_op1_ne)274 TEST_F(InstrTest, test_alu_op1_ne)
275 {
276 auto R130x = new Register(130, 0, pin_none);
277 auto R130y = new Register(130, 1, pin_none);
278 auto R130z = new Register(130, 2, pin_none);
279
280 AluInstr alu(op1_mov, R130x, R130y, {alu_write, alu_last_instr});
281
282 EXPECT_NE(alu, AluInstr(op1_cos, R130x, R130y, {alu_write, alu_last_instr}));
283
284 EXPECT_NE(alu, AluInstr(op1_mov, R130z, R130y, {alu_write, alu_last_instr}));
285 EXPECT_NE(alu, AluInstr(op1_mov, R130x, R130z, {alu_write, alu_last_instr}));
286 EXPECT_NE(alu, AluInstr(op1_mov, R130x, R130y, {alu_last_instr}));
287
288 AluInstr alu_cf_changes = alu;
289 alu_cf_changes.set_cf_type(cf_alu_push_before);
290
291 EXPECT_NE(alu, alu_cf_changes);
292
293 AluInstr alu_bs_changes = alu;
294 alu_bs_changes.set_bank_swizzle(alu_vec_021);
295
296 EXPECT_NE(alu, alu_bs_changes);
297 };
298
TEST_F(InstrTest,test_alu_dot4_grouped)299 TEST_F(InstrTest, test_alu_dot4_grouped)
300 {
301 auto R130x = new Register(130, 0, pin_none);
302 auto R130y = new Register(130, 1, pin_none);
303 auto R130z = new Register(130, 2, pin_none);
304 auto R130w = new Register(130, 3, pin_none);
305
306 auto R131x = new Register(131, 0, pin_none);
307 auto R131y = new Register(131, 1, pin_none);
308 auto R131z = new Register(131, 2, pin_none);
309 auto R131w = new Register(131, 3, pin_none);
310
311 auto R132x = new Register(132, 0, pin_chan);
312 auto R132y = new Register(132, 1, pin_chan);
313 auto R132z = new Register(132, 2, pin_chan);
314 auto R132w = new Register(132, 3, pin_chan);
315
316 AluInstr::SrcValues src({R130x, R130y, R130z, R130w, R131x, R131y, R131z, R131w});
317
318 AluInstr alu(op2_dot4_ieee, R132x, src, {alu_write, alu_last_instr}, 4);
319
320 EXPECT_NE(alu, AluInstr(op1_cos, R130x, R130y, {alu_write, alu_last_instr}));
321 EXPECT_EQ(alu, alu);
322
323 ValueFactory vf;
324 auto group = alu.split(vf);
325 group->fix_last_flag();
326 ASSERT_TRUE(group);
327
328 auto i = group->begin();
329 EXPECT_NE(i, group->end());
330 ASSERT_TRUE(*i);
331 check(**i, AluInstr(op2_dot4_ieee, R132x, R130x, R130y, {alu_write}));
332 ++i;
333 EXPECT_NE(i, group->end());
334 ASSERT_TRUE(*i);
335 check(**i, AluInstr(op2_dot4_ieee, R132y, R130z, R130w, {}));
336 ++i;
337 EXPECT_NE(i, group->end());
338 ASSERT_TRUE(*i);
339 check(**i, AluInstr(op2_dot4_ieee, R132z, R131x, R131y, {}));
340 ++i;
341 EXPECT_NE(i, group->end());
342 ASSERT_TRUE(*i);
343 check(**i, AluInstr(op2_dot4_ieee, R132w, R131z, R131w, {alu_last_instr}));
344 ++i;
345 EXPECT_NE(i, group->end());
346 ASSERT_FALSE(*i);
347 ++i;
348 EXPECT_EQ(i, group->end());
349 };
350
351 #ifdef __cpp_exceptions
TEST_F(InstrTest,test_alu_wrong_source_count)352 TEST_F(InstrTest, test_alu_wrong_source_count)
353 {
354 EXPECT_THROW(AluInstr(op3_cnde,
355 new Register(130, 1, pin_none),
356 new Register(129, 2, pin_chan),
357 new Register(129, 3, pin_none),
358 {alu_write, alu_last_instr}),
359 std::invalid_argument);
360
361 EXPECT_THROW(AluInstr(op3_cnde,
362 new Register(130, 1, pin_none),
363 new Register(129, 2, pin_chan),
364 {alu_write, alu_last_instr}),
365 std::invalid_argument);
366
367 EXPECT_THROW(AluInstr(op1_mov,
368 new Register(130, 1, pin_none),
369 new Register(129, 2, pin_chan),
370 new Register(129, 2, pin_chan),
371 {alu_write, alu_last_instr}),
372 std::invalid_argument);
373
374 EXPECT_THROW(AluInstr(op2_add,
375 new Register(130, 1, pin_none),
376 new Register(129, 2, pin_chan),
377 {alu_write, alu_last_instr}),
378 std::invalid_argument);
379
380 EXPECT_THROW(AluInstr(op2_add,
381 new Register(130, 1, pin_none),
382 new Register(129, 2, pin_chan),
383 new Register(129, 2, pin_chan),
384 new Register(129, 2, pin_chan),
385 {alu_write, alu_last_instr}),
386 std::invalid_argument);
387 }
388
TEST_F(InstrTest,test_alu_write_no_dest)389 TEST_F(InstrTest, test_alu_write_no_dest)
390 {
391 EXPECT_THROW(AluInstr(op2_add,
392 nullptr,
393 new Register(129, 2, pin_chan),
394 new Register(129, 2, pin_chan),
395 {alu_write, alu_last_instr}),
396 std::invalid_argument);
397 }
398
399 #endif
400
TEST_F(InstrTest,test_tex_basic)401 TEST_F(InstrTest, test_tex_basic)
402 {
403 TexInstr tex(
404 TexInstr::sample, RegisterVec4(129), {0, 1, 2, 3}, RegisterVec4(130), 17, nullptr, 1);
405
406 EXPECT_EQ(tex.opcode(), TexInstr::sample);
407
408 auto& dst = tex.dst();
409 auto& src = tex.src();
410
411 for (int i = 0; i < 4; ++i) {
412 EXPECT_EQ(*dst[i], Register(129, i, pin_group));
413 EXPECT_EQ(*src[i], Register(130, i, pin_group));
414 EXPECT_EQ(tex.dest_swizzle(i), i);
415 }
416
417 EXPECT_EQ(tex.resource_id(), 17);
418 EXPECT_EQ(tex.sampler_id(), 1);
419
420 EXPECT_TRUE(tex.end_group());
421
422 for (int i = 0; i < 3; ++i)
423 EXPECT_EQ(tex.get_offset(i), 0);
424
425 EXPECT_FALSE(tex.has_tex_flag(TexInstr::x_unnormalized));
426 EXPECT_FALSE(tex.has_tex_flag(TexInstr::y_unnormalized));
427 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
428 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
429
430 tex.set_tex_flag(TexInstr::x_unnormalized);
431 EXPECT_TRUE(tex.has_tex_flag(TexInstr::x_unnormalized));
432 EXPECT_FALSE(tex.has_tex_flag(TexInstr::y_unnormalized));
433 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
434 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
435
436 tex.set_tex_flag(TexInstr::y_unnormalized);
437 EXPECT_TRUE(tex.has_tex_flag(TexInstr::x_unnormalized));
438 EXPECT_TRUE(tex.has_tex_flag(TexInstr::y_unnormalized));
439 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
440 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
441
442 tex.set_tex_flag(TexInstr::z_unnormalized);
443 tex.set_tex_flag(TexInstr::w_unnormalized);
444 EXPECT_TRUE(tex.has_tex_flag(TexInstr::x_unnormalized));
445 EXPECT_TRUE(tex.has_tex_flag(TexInstr::y_unnormalized));
446 EXPECT_TRUE(tex.has_tex_flag(TexInstr::z_unnormalized));
447 EXPECT_TRUE(tex.has_tex_flag(TexInstr::w_unnormalized));
448
449 EXPECT_EQ(tex.inst_mode(), 0);
450
451 EXPECT_FALSE(tex.resource_offset());
452
453 tex.set_dest_swizzle({4, 7, 0, 1});
454 EXPECT_EQ(tex.dest_swizzle(0), 4);
455 EXPECT_EQ(tex.dest_swizzle(1), 7);
456 EXPECT_EQ(tex.dest_swizzle(2), 0);
457 EXPECT_EQ(tex.dest_swizzle(3), 1);
458
459 tex.set_dest_swizzle({7, 2, 5, 0});
460 EXPECT_EQ(tex.dest_swizzle(0), 7);
461 EXPECT_EQ(tex.dest_swizzle(1), 2);
462 EXPECT_EQ(tex.dest_swizzle(2), 5);
463 EXPECT_EQ(tex.dest_swizzle(3), 0);
464
465 tex.set_offset(0, 2);
466 tex.set_offset(1, -1);
467 tex.set_offset(2, 3);
468
469 EXPECT_EQ(tex.get_offset(0), 4);
470 EXPECT_EQ(tex.get_offset(1), -2);
471 EXPECT_EQ(tex.get_offset(2), 6);
472 }
473
TEST_F(InstrTest,test_tex_gather4)474 TEST_F(InstrTest, test_tex_gather4)
475 {
476 TexInstr tex(
477 TexInstr::gather4, RegisterVec4(131), {0, 1, 2, 3}, RegisterVec4(132), 2, nullptr, 19);
478
479 EXPECT_EQ(tex.opcode(), TexInstr::gather4);
480
481 auto& dst = tex.dst();
482 auto& src = tex.src();
483
484 for (int i = 0; i < 4; ++i) {
485 EXPECT_EQ(*dst[i], Register(131, i, pin_group));
486 EXPECT_EQ(*src[i], Register(132, i, pin_group));
487 EXPECT_EQ(tex.dest_swizzle(i), i);
488 }
489
490 EXPECT_EQ(tex.resource_id(), 2);
491 EXPECT_EQ(tex.sampler_id(), 19);
492
493 for (int i = 0; i < 3; ++i)
494 EXPECT_EQ(tex.get_offset(i), 0);
495
496 EXPECT_FALSE(tex.has_tex_flag(TexInstr::x_unnormalized));
497 EXPECT_FALSE(tex.has_tex_flag(TexInstr::y_unnormalized));
498 EXPECT_FALSE(tex.has_tex_flag(TexInstr::z_unnormalized));
499 EXPECT_FALSE(tex.has_tex_flag(TexInstr::w_unnormalized));
500
501 tex.set_gather_comp(2);
502 EXPECT_EQ(tex.inst_mode(), 2);
503 }
504
TEST_F(InstrTest,test_tex_neq)505 TEST_F(InstrTest, test_tex_neq)
506 {
507 TexInstr tex_ref(
508 TexInstr::sample, RegisterVec4(129), {0, 1, 2, 3}, RegisterVec4(130), 1, nullptr, 17);
509 EXPECT_EQ(tex_ref, tex_ref);
510
511 EXPECT_NE(
512 tex_ref,
513 TexInstr(
514 TexInstr::sample_c, RegisterVec4(129), {0, 1, 2, 3}, RegisterVec4(130), 1, nullptr, 17));
515 EXPECT_NE(
516 tex_ref,
517 TexInstr(
518 TexInstr::sample, RegisterVec4(130), {0, 1, 2, 3}, RegisterVec4(130), 1, nullptr, 17));
519 EXPECT_NE(
520 tex_ref,
521 TexInstr(
522 TexInstr::sample, RegisterVec4(130), {0, 1, 2, 3}, RegisterVec4(130), 1, nullptr, 17));
523
524 EXPECT_NE(
525 tex_ref,
526 TexInstr(
527 TexInstr::sample, RegisterVec4(129), {7, 1, 2, 3}, RegisterVec4(130), 1, nullptr, 17));
528 EXPECT_NE(
529 tex_ref,
530 TexInstr(
531 TexInstr::sample, RegisterVec4(129), {0, 7, 2, 3}, RegisterVec4(130), 1, nullptr, 17));
532 EXPECT_NE(
533 tex_ref,
534 TexInstr(
535 TexInstr::sample, RegisterVec4(129), {0, 1, 7, 3}, RegisterVec4(130), 1, nullptr, 17));
536 EXPECT_NE(
537 tex_ref,
538 TexInstr(
539 TexInstr::sample, RegisterVec4(129), {0, 1, 2, 7}, RegisterVec4(130), 1, nullptr, 17));
540
541 EXPECT_NE(tex_ref,
542 TexInstr(TexInstr::sample,
543 RegisterVec4(129),
544 {0, 1, 2, 3},
545 RegisterVec4(130, false, {7, 1, 2, 3}),
546 1,
547 nullptr,
548 17));
549 EXPECT_NE(tex_ref,
550 TexInstr(TexInstr::sample,
551 RegisterVec4(129),
552 {0, 1, 2, 3},
553 RegisterVec4(130, false, {0, 7, 2, 3}),
554 1,
555 nullptr,
556 17));
557 EXPECT_NE(tex_ref,
558 TexInstr(TexInstr::sample,
559 RegisterVec4(129),
560 {0, 1, 2, 3},
561 RegisterVec4(130, false, {0, 1, 7, 3}),
562 1,
563 nullptr,
564 17));
565 EXPECT_NE(tex_ref,
566 TexInstr(TexInstr::sample,
567 RegisterVec4(129),
568 {0, 1, 2, 3},
569 RegisterVec4(130, false, {0, 1, 2, 7}),
570 1,
571 nullptr,
572 17));
573
574 EXPECT_NE(
575 tex_ref,
576 TexInstr(
577 TexInstr::sample, RegisterVec4(129), {0, 1, 2, 3}, RegisterVec4(130), 2, nullptr, 17));
578 EXPECT_NE(
579 tex_ref,
580 TexInstr(
581 TexInstr::sample, RegisterVec4(129), {0, 1, 2, 3}, RegisterVec4(130), 1, nullptr, 18));
582
583 /*
584 auto tex_with_sampler_offset = tex_ref;
585 tex_with_sampler_offset.set_sampler_offset(new LiteralConstant( 2));
586 EXPECT_NE(tex_ref, tex_with_sampler_offset);
587
588 auto tex_cmp1 = tex_ref;
589 EXPECT_EQ(tex_ref, tex_cmp1);
590
591 tex_cmp1.set_tex_flag(TexInstr::x_unnormalized); EXPECT_NE(tex_ref, tex_cmp1);
592 auto tex_cmp2 = tex_ref; tex_cmp2.set_tex_flag(TexInstr::y_unnormalized);
593 EXPECT_NE(tex_ref, tex_cmp2); auto tex_cmp3 = tex_ref;
594 tex_cmp3.set_tex_flag(TexInstr::z_unnormalized); EXPECT_NE(tex_ref, tex_cmp3); auto
595 tex_cmp4 = tex_ref; tex_cmp4.set_tex_flag(TexInstr::w_unnormalized); EXPECT_NE(tex_ref,
596 tex_cmp4);
597
598 for (int i = 0; i < 3; ++i) {
599 auto tex_ofs = tex_ref;
600 tex_ofs.set_offset(i, 1);
601 EXPECT_NE(tex_ref, tex_ofs);
602 }
603
604 for (int i = 0; i < 4; ++i) {
605 auto tex_swz = tex_ref;
606 RegisterVec4::Swizzle dst_swz = {0,1,2,3};
607 dst_swz[i] = 7;
608 tex_swz.set_dest_swizzle(dst_swz);
609 EXPECT_NE(tex_ref, tex_swz);
610 }
611
612 auto tex_cmp_mode = tex_ref;
613 tex_cmp_mode.set_inst_mode(1);
614 EXPECT_NE(tex_ref, tex_cmp_mode);*/
615 }
616
TEST_F(InstrTest,test_export_basic)617 TEST_F(InstrTest, test_export_basic)
618 {
619 ExportInstr exp0(ExportInstr::param, 60, RegisterVec4(200));
620
621 EXPECT_EQ(exp0.export_type(), ExportInstr::param);
622 EXPECT_EQ(exp0.location(), 60);
623 EXPECT_EQ(exp0.value(), RegisterVec4(200));
624 EXPECT_FALSE(exp0.is_last_export());
625
626 ExportInstr exp1(ExportInstr::param, 60, RegisterVec4(200));
627 exp1.set_is_last_export(true);
628 EXPECT_TRUE(exp1.is_last_export());
629
630 EXPECT_EQ(exp0, exp0);
631 EXPECT_NE(exp0, exp1);
632
633 ExportInstr exp2(ExportInstr::pos, 60, RegisterVec4(200));
634 EXPECT_EQ(exp2.export_type(), ExportInstr::pos);
635 EXPECT_NE(exp0, exp2);
636
637 ExportInstr exp3(ExportInstr::param, 61, RegisterVec4(200));
638 EXPECT_EQ(exp3.location(), 61);
639 EXPECT_NE(exp0, exp3);
640
641 ExportInstr exp4(ExportInstr::param, 60, RegisterVec4(201));
642 EXPECT_EQ(exp4.value(), RegisterVec4(201));
643 EXPECT_NE(exp0, exp4);
644
645 EXPECT_NE(exp0,
646 ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {7, 1, 2, 3})));
647 EXPECT_NE(exp0,
648 ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {0, 7, 2, 3})));
649 EXPECT_NE(exp0,
650 ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {0, 1, 7, 3})));
651 EXPECT_NE(exp0,
652 ExportInstr(ExportInstr::param, 60, RegisterVec4(200, false, {0, 1, 2, 7})));
653 }
654
TEST_F(InstrTest,test_fetch_basic)655 TEST_F(InstrTest, test_fetch_basic)
656 {
657 FetchInstr fetch(vc_fetch,
658 RegisterVec4(200),
659 {0, 2, 1, 3},
660 new Register(201, 2, pin_none),
661 0,
662 vertex_data,
663 fmt_8,
664 vtx_nf_norm,
665 vtx_es_none,
666 1,
667 nullptr);
668
669 EXPECT_EQ(fetch.opcode(), vc_fetch);
670 EXPECT_EQ(fetch.dst(), RegisterVec4(200));
671 EXPECT_EQ(fetch.dest_swizzle(0), 0);
672 EXPECT_EQ(fetch.dest_swizzle(1), 2);
673 EXPECT_EQ(fetch.dest_swizzle(2), 1);
674 EXPECT_EQ(fetch.dest_swizzle(3), 3);
675
676 EXPECT_EQ(fetch.src(), Register(201, 2, pin_none));
677 EXPECT_EQ(fetch.src_offset(), 0);
678
679 EXPECT_EQ(fetch.resource_id(), 1);
680 EXPECT_FALSE(fetch.resource_offset());
681
682 EXPECT_EQ(fetch.fetch_type(), vertex_data);
683 EXPECT_EQ(fetch.data_format(), fmt_8);
684 EXPECT_EQ(fetch.num_format(), vtx_nf_norm);
685 EXPECT_EQ(fetch.endian_swap(), vtx_es_none);
686
687 EXPECT_EQ(fetch.mega_fetch_count(), 0);
688 EXPECT_EQ(fetch.array_base(), 0);
689 EXPECT_EQ(fetch.array_size(), 0);
690 EXPECT_EQ(fetch.elm_size(), 0);
691
692 for (int i = 0; i < FetchInstr::unknown; ++i) {
693 EXPECT_FALSE(fetch.has_fetch_flag(static_cast<FetchInstr::EFlags>(i)));
694 }
695
696 EXPECT_NE(fetch,
697 FetchInstr(vc_get_buf_resinfo,
698 RegisterVec4(200),
699 {0, 2, 1, 3},
700 new Register(201, 2, pin_none),
701 0,
702 vertex_data,
703 fmt_8,
704 vtx_nf_norm,
705 vtx_es_none,
706 1,
707 nullptr));
708
709 EXPECT_NE(fetch,
710 FetchInstr(vc_fetch,
711 RegisterVec4(201),
712 {0, 2, 1, 3},
713 new Register(201, 2, pin_none),
714 0,
715 vertex_data,
716 fmt_8,
717 vtx_nf_norm,
718 vtx_es_none,
719 1,
720 nullptr));
721
722 EXPECT_NE(fetch,
723 FetchInstr(vc_fetch,
724 RegisterVec4(200),
725 {1, 2, 0, 3},
726 new Register(201, 2, pin_none),
727 0,
728 vertex_data,
729 fmt_8,
730 vtx_nf_norm,
731 vtx_es_none,
732 1,
733 nullptr));
734
735 EXPECT_NE(fetch,
736 FetchInstr(vc_fetch,
737 RegisterVec4(200),
738 {0, 2, 1, 3},
739 new Register(200, 2, pin_none),
740 0,
741 vertex_data,
742 fmt_8,
743 vtx_nf_norm,
744 vtx_es_none,
745 1,
746 nullptr));
747
748 EXPECT_NE(fetch,
749 FetchInstr(vc_fetch,
750 RegisterVec4(200),
751 {0, 2, 1, 3},
752 new Register(201, 2, pin_none),
753 8,
754 vertex_data,
755 fmt_8,
756 vtx_nf_norm,
757 vtx_es_none,
758 1,
759 nullptr));
760
761 EXPECT_NE(fetch,
762 FetchInstr(vc_fetch,
763 RegisterVec4(200),
764 {0, 2, 1, 3},
765 new Register(201, 2, pin_none),
766 0,
767 instance_data,
768 fmt_8,
769 vtx_nf_norm,
770 vtx_es_none,
771 1,
772 nullptr));
773
774 EXPECT_NE(fetch,
775 FetchInstr(vc_fetch,
776 RegisterVec4(200),
777 {0, 2, 1, 3},
778 new Register(201, 2, pin_none),
779 0,
780 vertex_data,
781 fmt_8_8,
782 vtx_nf_norm,
783 vtx_es_none,
784 1,
785 nullptr));
786
787 EXPECT_NE(fetch,
788 FetchInstr(vc_fetch,
789 RegisterVec4(200),
790 {0, 2, 1, 3},
791 new Register(201, 2, pin_none),
792 0,
793 vertex_data,
794 fmt_8,
795 vtx_nf_int,
796 vtx_es_none,
797 1,
798 nullptr));
799
800 EXPECT_NE(fetch,
801 FetchInstr(vc_fetch,
802 RegisterVec4(200),
803 {0, 2, 1, 3},
804 new Register(201, 2, pin_none),
805 0,
806 vertex_data,
807 fmt_8,
808 vtx_nf_norm,
809 vtx_es_8in16,
810 1,
811 nullptr));
812
813 EXPECT_NE(fetch,
814 FetchInstr(vc_fetch,
815 RegisterVec4(200),
816 {0, 2, 1, 3},
817 new Register(201, 2, pin_none),
818 0,
819 vertex_data,
820 fmt_8,
821 vtx_nf_norm,
822 vtx_es_none,
823 2,
824 nullptr));
825
826 EXPECT_NE(fetch,
827 FetchInstr(vc_fetch,
828 RegisterVec4(200),
829 {0, 2, 1, 3},
830 new Register(201, 2, pin_none),
831 0,
832 vertex_data,
833 fmt_8,
834 vtx_nf_norm,
835 vtx_es_none,
836 1,
837 new Register(1000, 0, pin_none)));
838
839 auto fetch1 = fetch;
840 fetch1.set_mfc(31);
841 EXPECT_NE(fetch1, fetch);
842 EXPECT_EQ(fetch1.mega_fetch_count(), 31);
843 EXPECT_TRUE(
844 fetch1.has_fetch_flag(static_cast<FetchInstr::EFlags>(FetchInstr::is_mega_fetch)));
845
846 auto fetch2 = fetch;
847 fetch2.set_array_base(32);
848 EXPECT_NE(fetch, fetch2);
849 EXPECT_EQ(fetch2.array_base(), 32);
850
851 auto fetch3 = fetch;
852 fetch3.set_array_size(16);
853 EXPECT_NE(fetch, fetch3);
854 EXPECT_EQ(fetch3.array_size(), 16);
855
856 auto fetch4 = fetch;
857 fetch4.set_element_size(3);
858 EXPECT_NE(fetch, fetch4);
859 EXPECT_EQ(fetch4.elm_size(), 3);
860 }
861
TEST_F(InstrTest,test_fetch_basic2)862 TEST_F(InstrTest, test_fetch_basic2)
863 {
864 FetchInstr fetch(vc_get_buf_resinfo,
865 RegisterVec4(201),
866 {0, 1, 3, 4},
867 new Register(202, 3, pin_none),
868 1,
869 no_index_offset,
870 fmt_32_32,
871 vtx_nf_int,
872 vtx_es_8in16,
873 3,
874 new Register(300, 1, pin_none));
875
876 EXPECT_EQ(fetch.opcode(), vc_get_buf_resinfo);
877 EXPECT_EQ(fetch.dst(), RegisterVec4(201));
878 EXPECT_EQ(fetch.dest_swizzle(0), 0);
879 EXPECT_EQ(fetch.dest_swizzle(1), 1);
880 EXPECT_EQ(fetch.dest_swizzle(2), 3);
881 EXPECT_EQ(fetch.dest_swizzle(3), 4);
882
883 EXPECT_EQ(fetch.src(), Register(202, 3, pin_none));
884 EXPECT_EQ(fetch.src_offset(), 1);
885
886 EXPECT_EQ(fetch.resource_id(), 3);
887 EXPECT_EQ(*fetch.resource_offset(), Register(300, 1, pin_none));
888
889 EXPECT_EQ(fetch.fetch_type(), no_index_offset);
890 EXPECT_EQ(fetch.data_format(), fmt_32_32);
891 EXPECT_EQ(fetch.num_format(), vtx_nf_int);
892 EXPECT_EQ(fetch.endian_swap(), vtx_es_8in16);
893
894 EXPECT_EQ(fetch.mega_fetch_count(), 0);
895 EXPECT_EQ(fetch.array_base(), 0);
896 EXPECT_EQ(fetch.array_size(), 0);
897 EXPECT_EQ(fetch.elm_size(), 0);
898
899 for (int i = 0; i < FetchInstr::unknown; ++i) {
900 EXPECT_FALSE(fetch.has_fetch_flag(static_cast<FetchInstr::EFlags>(i)));
901 }
902
903 auto fetch1 = fetch;
904 fetch1.set_mfc(15);
905 EXPECT_NE(fetch1, fetch);
906 EXPECT_EQ(fetch1.mega_fetch_count(), 15);
907 EXPECT_TRUE(
908 fetch1.has_fetch_flag(static_cast<FetchInstr::EFlags>(FetchInstr::is_mega_fetch)));
909
910 auto fetch2 = fetch;
911 fetch2.set_array_base(128);
912 EXPECT_NE(fetch, fetch2);
913 EXPECT_EQ(fetch2.array_base(), 128);
914
915 auto fetch3 = fetch;
916 fetch3.set_array_size(8);
917 EXPECT_NE(fetch, fetch3);
918 EXPECT_EQ(fetch3.array_size(), 8);
919
920 auto fetch4 = fetch;
921 fetch4.set_element_size(1);
922 EXPECT_NE(fetch, fetch4);
923 EXPECT_EQ(fetch4.elm_size(), 1);
924 }
925