1 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd"> 2 3 <html> 4 5 <head> 6 <title>Bytecode for the Dalvik VM</title> 7 <link rel=stylesheet href="dalvik-bytecode.css"> 8 </head> 9 10 <body> 11 12 <h1>Bytecode for the Dalvik VM</h1> 13 <p>Copyright © 2007 The Android Open Source Project 14 15 <h2>General Design</h2> 16 17 <ul> 18 <li>The machine model and calling conventions are meant to approximately 19 imitate common real architectures and C-style calling conventions: 20 <ul> 21 <li>The VM is register-based, and frames are fixed in size upon creation. 22 Each frame consists of a particular number of registers (specified by 23 the method) as well as any adjunct data needed to execute the method, 24 such as (but not limited to) the program counter and a reference to the 25 <code>.dex</code> file that contains the method. 26 </li> 27 <li>Registers are 32 bits wide. Adjacent register pairs are used for 64-bit 28 values. 29 </li> 30 <li>In terms of bitwise representation, <code>(Object) null == (int) 31 0</code>. 32 </li> 33 <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers 34 of the method's invocation frame, in order. Wide arguments consume 35 two registers. Instance methods are passed a <code>this</code> reference 36 as their first argument. 37 </li> 38 </ul> 39 <li>The storage unit in the instruction stream is a 16-bit unsigned quantity. 40 Some bits in some instructions are ignored / must-be-zero. 41 </li> 42 <li>Instructions aren't gratuitously limited to a particular type. For 43 example, instructions that move 32-bit register values without interpretation 44 don't have to specify whether they are moving ints or floats. 45 </li> 46 <li>There are separately enumerated and indexed constant pools for 47 references to strings, types, fields, and methods. 48 </li> 49 <li>Bitwise literal data is represented in-line in the instruction stream.</li> 50 <li>Because, in practice, it is uncommon for a method to need more than 51 16 registers, and because needing more than eight registers <i>is</i> 52 reasonably common, many instructions may only address the first 16 53 registers. When reasonably possible, instructions allow references to 54 up to the first 256 registers. In cases where an instruction variant isn't 55 available to address a desired register, it is expected that the register 56 contents get moved from the original register to a low register (before the 57 operation) and/or moved from a low result register to a high register 58 (after the operation). 59 </li> 60 <li>There are several "pseudo-instructions" that are used to hold 61 variable-length data referred to by regular instructions (for example, 62 <code>fill-array-data</code>). Such instructions must never be 63 encountered during the normal flow of execution. In addition, the 64 instructions must be located on even-numbered bytecode offsets (that is, 65 4-byte aligned). In order to meet this requirement, dex generation tools 66 should emit an extra <code>nop</code> instruction as a spacer if such an 67 instruction would otherwise be unaligned. Finally, though not required, 68 it is expected that most tools will choose to emit these instructions at 69 the ends of methods, since otherwise it would likely be the case that 70 additional instructions would be needed to branch around them. 71 </li> 72 <li>When installed on a running system, some instructions may be altered, 73 changing their format, as an install-time static linking optimization. 74 This is to allow for faster execution once linkage is known. 75 See the associated 76 <a href="instruction-formats.html">instruction formats document</a> 77 for the suggested variants. The word "suggested" is used advisedly; 78 it is not mandatory to implement these. 79 </li> 80 <li>Human-syntax and mnemonics: 81 <ul> 82 <li>Dest-then-source ordering for arguments.</li> 83 <li>Some opcodes have a disambiguating suffix with respect to the type(s) 84 they operate on: Type-general 64-bit opcodes 85 are suffixed with <code>-wide</code>. 86 Type-specific opcodes are suffixed with their type (or a 87 straightforward abbreviation), one of: <code>-boolean</code> 88 <code>-byte</code> <code>-char</code> <code>-short</code> 89 <code>-int</code> <code>-long</code> <code>-float</code> 90 <code>-double</code> <code>-object</code> <code>-string</code> 91 <code>-class</code> <code>-void</code>. Type-general 32-bit opcodes 92 are unmarked. 93 </li> 94 <li>Some opcodes have a disambiguating suffix to distinguish 95 otherwise-identical operations that have different instruction layouts 96 or options. These suffixes are separated from the main names with a slash 97 ("<code>/</code>") and mainly exist at all to make there be a one-to-one 98 mapping with static constants in the code that generates and interprets 99 executables (that is, to reduce ambiguity for humans). 100 </li> 101 </ul> 102 </li> 103 <li>See the <a href="instruction-formats.html">instruction formats 104 document</a> for more details about the various instruction formats 105 (listed under "Op & Format") as well as details about the opcode 106 syntax. 107 </li> 108 </ul> 109 110 <h2>Summary of Instruction Set</h2> 111 112 <table class="instruc"> 113 <thead> 114 <tr> 115 <th>Op & Format</th> 116 <th>Mnemonic / Syntax</th> 117 <th>Arguments</th> 118 <th>Description</th> 119 </tr> 120 </thead> 121 <tbody> 122 <tr> 123 <td>00 10x</td> 124 <td>nop</td> 125 <td> </td> 126 <td>Waste cycles.</td> 127 </tr> 128 <tr> 129 <td>01 12x</td> 130 <td>move vA, vB</td> 131 <td><code>A:</code> destination register (4 bits)<br/> 132 <code>B:</code> source register (4 bits)</td> 133 <td>Move the contents of one non-object register to another.</td> 134 </tr> 135 <tr> 136 <td>02 22x</td> 137 <td>move/from16 vAA, vBBBB</td> 138 <td><code>A:</code> destination register (8 bits)<br/> 139 <code>B:</code> source register (16 bits)</td> 140 <td>Move the contents of one non-object register to another.</td> 141 </tr> 142 <tr> 143 <td>03 32x</td> 144 <td>move/16 vAAAA, vBBBB</td> 145 <td><code>A:</code> destination register (16 bits)<br/> 146 <code>B:</code> source register (16 bits)</td> 147 <td>Move the contents of one non-object register to another.</td> 148 </tr> 149 <tr> 150 <td>04 12x</td> 151 <td>move-wide vA, vB</td> 152 <td><code>A:</code> destination register pair (4 bits)<br/> 153 <code>B:</code> source register pair (4 bits)</td> 154 <td>Move the contents of one register-pair to another. 155 <p><b>Note:</b> 156 It is legal to move from <code>v<i>N</i></code> to either 157 <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations 158 must arrange for both halves of a register pair to be read before 159 anything is written.</p> 160 </td> 161 </tr> 162 <tr> 163 <td>05 22x</td> 164 <td>move-wide/from16 vAA, vBBBB</td> 165 <td><code>A:</code> destination register pair (8 bits)<br/> 166 <code>B:</code> source register pair (16 bits)</td> 167 <td>Move the contents of one register-pair to another. 168 <p><b>Note:</b> 169 Implementation considerations are the same as <code>move-wide</code>, 170 above.</p> 171 </td> 172 </tr> 173 <tr> 174 <td>06 32x</td> 175 <td>move-wide/16 vAAAA, vBBBB</td> 176 <td><code>A:</code> destination register pair (16 bits)<br/> 177 <code>B:</code> source register pair (16 bits)</td> 178 <td>Move the contents of one register-pair to another. 179 <p><b>Note:</b> 180 Implementation considerations are the same as <code>move-wide</code>, 181 above.</p> 182 </td> 183 </tr> 184 <tr> 185 <td>07 12x</td> 186 <td>move-object vA, vB</td> 187 <td><code>A:</code> destination register (4 bits)<br/> 188 <code>B:</code> source register (4 bits)</td> 189 <td>Move the contents of one object-bearing register to another.</td> 190 </tr> 191 <tr> 192 <td>08 22x</td> 193 <td>move-object/from16 vAA, vBBBB</td> 194 <td><code>A:</code> destination register (8 bits)<br/> 195 <code>B:</code> source register (16 bits)</td> 196 <td>Move the contents of one object-bearing register to another.</td> 197 </tr> 198 <tr> 199 <td>09 32x</td> 200 <td>move-object/16 vAAAA, vBBBB</td> 201 <td><code>A:</code> destination register (16 bits)<br/> 202 <code>B:</code> source register (16 bits)</td> 203 <td>Move the contents of one object-bearing register to another.</td> 204 </tr> 205 <tr> 206 <td>0a 11x</td> 207 <td>move-result vAA</td> 208 <td><code>A:</code> destination register (8 bits)</td> 209 <td>Move the single-word non-object result of the most recent 210 <code>invoke-<i>kind</i></code> into the indicated register. 211 This must be done as the instruction immediately after an 212 <code>invoke-<i>kind</i></code> whose (single-word, non-object) result 213 is not to be ignored; anywhere else is invalid.</td> 214 </tr> 215 <tr> 216 <td>0b 11x</td> 217 <td>move-result-wide vAA</td> 218 <td><code>A:</code> destination register pair (8 bits)</td> 219 <td>Move the double-word result of the most recent 220 <code>invoke-<i>kind</i></code> into the indicated register pair. 221 This must be done as the instruction immediately after an 222 <code>invoke-<i>kind</i></code> whose (double-word) result 223 is not to be ignored; anywhere else is invalid.</td> 224 </tr> 225 <tr> 226 <td>0c 11x</td> 227 <td>move-result-object vAA</td> 228 <td><code>A:</code> destination register (8 bits)</td> 229 <td>Move the object result of the most recent <code>invoke-<i>kind</i></code> 230 into the indicated register. This must be done as the instruction 231 immediately after an <code>invoke-<i>kind</i></code> or 232 <code>filled-new-array</code> 233 whose (object) result is not to be ignored; anywhere else is invalid.</td> 234 </tr> 235 <tr> 236 <td>0d 11x</td> 237 <td>move-exception vAA</td> 238 <td><code>A:</code> destination register (8 bits)</td> 239 <td>Save a just-caught exception into the given register. This should 240 be the first instruction of any exception handler whose caught 241 exception is not to be ignored, and this instruction may <i>only</i> 242 ever occur as the first instruction of an exception handler; anywhere 243 else is invalid.</td> 244 </tr> 245 <tr> 246 <td>0e 10x</td> 247 <td>return-void</td> 248 <td> </td> 249 <td>Return from a <code>void</code> method.</td> 250 </tr> 251 <tr> 252 <td>0f 11x</td> 253 <td>return vAA</td> 254 <td><code>A:</code> return value register (8 bits)</td> 255 <td>Return from a single-width (32-bit) non-object value-returning 256 method. 257 </td> 258 </tr> 259 <tr> 260 <td>10 11x</td> 261 <td>return-wide vAA</td> 262 <td><code>A:</code> return value register-pair (8 bits)</td> 263 <td>Return from a double-width (64-bit) value-returning method.</td> 264 </tr> 265 <tr> 266 <td>11 11x</td> 267 <td>return-object vAA</td> 268 <td><code>A:</code> return value register (8 bits)</td> 269 <td>Return from an object-returning method.</td> 270 </tr> 271 <tr> 272 <td>12 11n</td> 273 <td>const/4 vA, #+B</td> 274 <td><code>A:</code> destination register (4 bits)<br/> 275 <code>B:</code> signed int (4 bits)</td> 276 <td>Move the given literal value (sign-extended to 32 bits) into 277 the specified register.</td> 278 </tr> 279 <tr> 280 <td>13 21s</td> 281 <td>const/16 vAA, #+BBBB</td> 282 <td><code>A:</code> destination register (8 bits)<br/> 283 <code>B:</code> signed int (16 bits)</td> 284 <td>Move the given literal value (sign-extended to 32 bits) into 285 the specified register.</td> 286 </tr> 287 <tr> 288 <td>14 31i</td> 289 <td>const vAA, #+BBBBBBBB</td> 290 <td><code>A:</code> destination register (8 bits)<br/> 291 <code>B:</code> arbitrary 32-bit constant</td> 292 <td>Move the given literal value into the specified register.</td> 293 </tr> 294 <tr> 295 <td>15 21h</td> 296 <td>const/high16 vAA, #+BBBB0000</td> 297 <td><code>A:</code> destination register (8 bits)<br/> 298 <code>B:</code> signed int (16 bits)</td> 299 <td>Move the given literal value (right-zero-extended to 32 bits) into 300 the specified register.</td> 301 </tr> 302 <tr> 303 <td>16 21s</td> 304 <td>const-wide/16 vAA, #+BBBB</td> 305 <td><code>A:</code> destination register (8 bits)<br/> 306 <code>B:</code> signed int (16 bits)</td> 307 <td>Move the given literal value (sign-extended to 64 bits) into 308 the specified register-pair.</td> 309 </tr> 310 <tr> 311 <td>17 31i</td> 312 <td>const-wide/32 vAA, #+BBBBBBBB</td> 313 <td><code>A:</code> destination register (8 bits)<br/> 314 <code>B:</code> signed int (32 bits)</td> 315 <td>Move the given literal value (sign-extended to 64 bits) into 316 the specified register-pair.</td> 317 </tr> 318 <tr> 319 <td>18 51l</td> 320 <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td> 321 <td><code>A:</code> destination register (8 bits)<br/> 322 <code>B:</code> arbitrary double-width (64-bit) constant</td> 323 <td>Move the given literal value into 324 the specified register-pair.</td> 325 </tr> 326 <tr> 327 <td>19 21h</td> 328 <td>const-wide/high16 vAA, #+BBBB000000000000</td> 329 <td><code>A:</code> destination register (8 bits)<br/> 330 <code>B:</code> signed int (16 bits)</td> 331 <td>Move the given literal value (right-zero-extended to 64 bits) into 332 the specified register-pair.</td> 333 </tr> 334 <tr> 335 <td>1a 21c</td> 336 <td>const-string vAA, string@BBBB</td> 337 <td><code>A:</code> destination register (8 bits)<br/> 338 <code>B:</code> string index</td> 339 <td>Move a reference to the string specified by the given index into the 340 specified register.</td> 341 </tr> 342 <tr> 343 <td>1b 31c</td> 344 <td>const-string/jumbo vAA, string@BBBBBBBB</td> 345 <td><code>A:</code> destination register (8 bits)<br/> 346 <code>B:</code> string index</td> 347 <td>Move a reference to the string specified by the given index into the 348 specified register.</td> 349 </tr> 350 <tr> 351 <td>1c 21c</td> 352 <td>const-class vAA, type@BBBB</td> 353 <td><code>A:</code> destination register (8 bits)<br/> 354 <code>B:</code> type index</td> 355 <td>Move a reference to the class specified by the given index into the 356 specified register. In the case where the indicated type is primitive, 357 this will store a reference to the primitive type's degenerate 358 class.</td> 359 </tr> 360 <tr> 361 <td>1d 11x</td> 362 <td>monitor-enter vAA</td> 363 <td><code>A:</code> reference-bearing register (8 bits)</td> 364 <td>Acquire the monitor for the indicated object.</td> 365 </tr> 366 <tr> 367 <td>1e 11x</td> 368 <td>monitor-exit vAA</td> 369 <td><code>A:</code> reference-bearing register (8 bits)</td> 370 <td>Release the monitor for the indicated object. 371 <p><b>Note:</b> 372 If this instruction needs to throw an exception, it must do 373 so as if the pc has already advanced past the instruction. 374 It may be useful to think of this as the instruction successfully 375 executing (in a sense), and the exception getting thrown <i>after</i> 376 the instruction but <i>before</i> the next one gets a chance to 377 run. This definition makes it possible for a method to use 378 a monitor cleanup catch-all (e.g., <code>finally</code>) block as 379 the monitor cleanup for that block itself, as a way to handle the 380 arbitrary exceptions that might get thrown due to the historical 381 implementation of <code>Thread.stop()</code>, while still managing 382 to have proper monitor hygiene.</p> 383 </td> 384 </tr> 385 <tr> 386 <td>1f 21c</td> 387 <td>check-cast vAA, type@BBBB</td> 388 <td><code>A:</code> reference-bearing register (8 bits)<br/> 389 <code>B:</code> type index (16 bits)</td> 390 <td>Throw a <code>ClassCastException</code> if the reference in the 391 given register cannot be cast to the indicated type. 392 <p><b>Note:</b> Since <code>A</code> must always be a reference 393 (and not a primitive value), this will necessarily fail at runtime 394 (that is, it will throw an exception) if <code>B</code> refers to a 395 primitive type.</p> 396 </td> 397 </tr> 398 <tr> 399 <td>20 22c</td> 400 <td>instance-of vA, vB, type@CCCC</td> 401 <td><code>A:</code> destination register (4 bits)<br/> 402 <code>B:</code> reference-bearing register (4 bits)<br/> 403 <code>C:</code> type index (16 bits)</td> 404 <td>Store in the given destination register <code>1</code> 405 if the indicated reference is an instance of the given type, 406 or <code>0</code> if not. 407 <p><b>Note:</b> Since <code>B</code> must always be a reference 408 (and not a primitive value), this will always result 409 in <code>0</code> being stored if <code>C</code> refers to a primitive 410 type.</td> 411 </tr> 412 <tr> 413 <td>21 12x</td> 414 <td>array-length vA, vB</td> 415 <td><code>A:</code> destination register (4 bits)<br/> 416 <code>B:</code> array reference-bearing register (4 bits)</td> 417 <td>Store in the given destination register the length of the indicated 418 array, in entries</td> 419 </tr> 420 <tr> 421 <td>22 21c</td> 422 <td>new-instance vAA, type@BBBB</td> 423 <td><code>A:</code> destination register (8 bits)<br/> 424 <code>B:</code> type index</td> 425 <td>Construct a new instance of the indicated type, storing a 426 reference to it in the destination. The type must refer to a 427 non-array class.</td> 428 </tr> 429 <tr> 430 <td>23 22c</td> 431 <td>new-array vA, vB, type@CCCC</td> 432 <td><code>A:</code> destination register (8 bits)<br/> 433 <code>B:</code> size register<br/> 434 <code>C:</code> type index</td> 435 <td>Construct a new array of the indicated type and size. The type 436 must be an array type.</td> 437 </tr> 438 <tr> 439 <td>24 35c</td> 440 <td>filled-new-array {vD, vE, vF, vG, vA}, type@CCCC</td> 441 <td><code>B:</code> array size and argument word count (4 bits)<br/> 442 <code>C:</code> type index (16 bits)<br/> 443 <code>D..G, A:</code> argument registers (4 bits each)</td> 444 <td>Construct an array of the given type and size, filling it with the 445 supplied contents. The type must be an array type. The array's 446 contents must be single-word (that is, 447 no arrays of <code>long</code> or <code>double</code>). The constructed 448 instance is stored as a "result" in the same way that the method invocation 449 instructions store their results, so the constructed instance must 450 be moved to a register with a subsequent 451 <code>move-result-object</code> instruction (if it is to be used).</td> 452 </tr> 453 <tr> 454 <td>25 3rc</td> 455 <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td> 456 <td><code>A:</code> array size and argument word count (8 bits)<br/> 457 <code>B:</code> type index (16 bits)<br/> 458 <code>C:</code> first argument register (16 bits)<br/> 459 <code>N = A + C - 1</code></td> 460 <td>Construct an array of the given type and size, filling it with 461 the supplied contents. Clarifications and restrictions are the same 462 as <code>filled-new-array</code>, described above.</td> 463 </tr> 464 <tr> 465 <td>26 31t</td> 466 <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified 467 below in "<code>fill-array-data</code> Format")</i></td> 468 <td><code>A:</code> array reference (8 bits)<br/> 469 <code>B:</code> signed "branch" offset to table data pseudo-instruction 470 (32 bits) 471 </td> 472 <td>Fill the given array with the indicated data. The reference must be 473 to an array of primitives, and the data table must match it in type and 474 must contain no more elements than will fit in the array. That is, 475 the array may be larger than the table, and if so, only the initial 476 elements of the array are set, leaving the remainder alone. 477 </td> 478 </tr> 479 <tr> 480 <td>27 11x</td> 481 <td>throw vAA</td> 482 <td><code>A:</code> exception-bearing register (8 bits)<br/></td> 483 <td>Throw the indicated exception.</td> 484 </tr> 485 <tr> 486 <td>28 10t</td> 487 <td>goto +AA</td> 488 <td><code>A:</code> signed branch offset (8 bits)</td> 489 <td>Unconditionally jump to the indicated instruction. 490 <p><b>Note:</b> 491 The branch offset may not be <code>0</code>. (A spin 492 loop may be legally constructed either with <code>goto/32</code> or 493 by including a <code>nop</code> as a target before the branch.)</p> 494 </td> 495 </tr> 496 <tr> 497 <td>29 20t</td> 498 <td>goto/16 +AAAA</td> 499 <td><code>A:</code> signed branch offset (16 bits)<br/></td> 500 <td>Unconditionally jump to the indicated instruction. 501 <p><b>Note:</b> 502 The branch offset may not be <code>0</code>. (A spin 503 loop may be legally constructed either with <code>goto/32</code> or 504 by including a <code>nop</code> as a target before the branch.)</p> 505 </td> 506 </tr> 507 <tr> 508 <td>2a 30t</td> 509 <td>goto/32 +AAAAAAAA</td> 510 <td><code>A:</code> signed branch offset (32 bits)<br/></td> 511 <td>Unconditionally jump to the indicated instruction.</td> 512 </tr> 513 <tr> 514 <td>2b 31t</td> 515 <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as 516 specified below in "<code>packed-switch</code> Format")</i></td> 517 <td><code>A:</code> register to test<br/> 518 <code>B:</code> signed "branch" offset to table data pseudo-instruction 519 (32 bits) 520 </td> 521 <td>Jump to a new instruction based on the value in the 522 given register, using a table of offsets corresponding to each value 523 in a particular integral range, or fall through to the next 524 instruction if there is no match. 525 </td> 526 </tr> 527 <tr> 528 <td>2c 31t</td> 529 <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as 530 specified below in "<code>sparse-switch</code> Format")</i></td> 531 <td><code>A:</code> register to test<br/> 532 <code>B:</code> signed "branch" offset to table data pseudo-instruction 533 (32 bits) 534 </td> 535 <td>Jump to a new instruction based on the value in the given 536 register, using an ordered table of value-offset pairs, or fall 537 through to the next instruction if there is no match. 538 </td> 539 </tr> 540 <tr> 541 <td>2d..31 23x</td> 542 <td>cmp<i>kind</i> vAA, vBB, vCC<br/> 543 2d: cmpl-float <i>(lt bias)</i><br/> 544 2e: cmpg-float <i>(gt bias)</i><br/> 545 2f: cmpl-double <i>(lt bias)</i><br/> 546 30: cmpg-double <i>(gt bias)</i><br/> 547 31: cmp-long 548 </td> 549 <td><code>A:</code> destination register (8 bits)<br/> 550 <code>B:</code> first source register or pair<br/> 551 <code>C:</code> second source register or pair</td> 552 <td>Perform the indicated floating point or <code>long</code> comparison, 553 storing <code>0</code> if the two arguments are equal, <code>1</code> 554 if the second argument is larger, or <code>-1</code> if the first 555 argument is larger. The "bias" listed for the floating point operations 556 indicates how <code>NaN</code> comparisons are treated: "Gt bias" 557 instructions return <code>1</code> for <code>NaN</code> comparisons, 558 and "lt bias" instructions return 559 <code>-1</code>. 560 <p>For example, to check to see if floating point 561 <code>a < b</code>, then it is advisable to use 562 <code>cmpg-float</code>; a result of <code>-1</code> indicates that 563 the test was true, and the other values indicate it was false either 564 due to a valid comparison or because one or the other values was 565 <code>NaN</code>.</p> 566 </td> 567 </tr> 568 <tr> 569 <td>32..37 22t</td> 570 <td>if-<i>test</i> vA, vB, +CCCC<br/> 571 32: if-eq<br/> 572 33: if-ne<br/> 573 34: if-lt<br/> 574 35: if-ge<br/> 575 36: if-gt<br/> 576 37: if-le<br/> 577 </td> 578 <td><code>A:</code> first register to test (4 bits)<br/> 579 <code>B:</code> second register to test (4 bits)<br/> 580 <code>C:</code> signed branch offset (16 bits)</td> 581 <td>Branch to the given destination if the given two registers' values 582 compare as specified. 583 <p><b>Note:</b> 584 The branch offset may not be <code>0</code>. (A spin 585 loop may be legally constructed either by branching around a 586 backward <code>goto</code> or by including a <code>nop</code> as 587 a target before the branch.)</p> 588 </td> 589 </tr> 590 <tr> 591 <td>38..3d 21t</td> 592 <td>if-<i>test</i>z vAA, +BBBB<br/> 593 38: if-eqz<br/> 594 39: if-nez<br/> 595 3a: if-ltz<br/> 596 3b: if-gez<br/> 597 3c: if-gtz<br/> 598 3d: if-lez<br/> 599 </td> 600 <td><code>A:</code> register to test (8 bits)<br/> 601 <code>B:</code> signed branch offset (16 bits)</td> 602 <td>Branch to the given destination if the given register's value compares 603 with 0 as specified. 604 <p><b>Note:</b> 605 The branch offset may not be <code>0</code>. (A spin 606 loop may be legally constructed either by branching around a 607 backward <code>goto</code> or by including a <code>nop</code> as 608 a target before the branch.)</p> 609 </td> 610 </tr> 611 <tr> 612 <td>3e..43 10x</td> 613 <td><i>(unused)</i></td> 614 <td> </td> 615 <td><i>(unused)</i></td> 616 </tr> 617 <tr> 618 <td>44..51 23x</td> 619 <td><i>arrayop</i> vAA, vBB, vCC<br/> 620 44: aget<br/> 621 45: aget-wide<br/> 622 46: aget-object<br/> 623 47: aget-boolean<br/> 624 48: aget-byte<br/> 625 49: aget-char<br/> 626 4a: aget-short<br/> 627 4b: aput<br/> 628 4c: aput-wide<br/> 629 4d: aput-object<br/> 630 4e: aput-boolean<br/> 631 4f: aput-byte<br/> 632 50: aput-char<br/> 633 51: aput-short 634 </td> 635 <td><code>A:</code> value register or pair; may be source or dest 636 (8 bits)<br/> 637 <code>B:</code> array register (8 bits)<br/> 638 <code>C:</code> index register (8 bits)</td> 639 <td>Perform the identified array operation at the identified index of 640 the given array, loading or storing into the value register.</td> 641 </tr> 642 <tr> 643 <td>52..5f 22c</td> 644 <td>i<i>instanceop</i> vA, vB, field@CCCC<br/> 645 52: iget<br/> 646 53: iget-wide<br/> 647 54: iget-object<br/> 648 55: iget-boolean<br/> 649 56: iget-byte<br/> 650 57: iget-char<br/> 651 58: iget-short<br/> 652 59: iput<br/> 653 5a: iput-wide<br/> 654 5b: iput-object<br/> 655 5c: iput-boolean<br/> 656 5d: iput-byte<br/> 657 5e: iput-char<br/> 658 5f: iput-short 659 </td> 660 <td><code>A:</code> value register or pair; may be source or dest 661 (4 bits)<br/> 662 <code>B:</code> object register (4 bits)<br/> 663 <code>C:</code> instance field reference index (16 bits)</td> 664 <td>Perform the identified object instance field operation with 665 the identified field, loading or storing into the value register. 666 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 667 altering the field argument to be a more direct offset.</p> 668 </td> 669 </tr> 670 <tr> 671 <td>60..6d 21c</td> 672 <td>s<i>staticop</i> vAA, field@BBBB<br/> 673 60: sget<br/> 674 61: sget-wide<br/> 675 62: sget-object<br/> 676 63: sget-boolean<br/> 677 64: sget-byte<br/> 678 65: sget-char<br/> 679 66: sget-short<br/> 680 67: sput<br/> 681 68: sput-wide<br/> 682 69: sput-object<br/> 683 6a: sput-boolean<br/> 684 6b: sput-byte<br/> 685 6c: sput-char<br/> 686 6d: sput-short 687 </td> 688 <td><code>A:</code> value register or pair; may be source or dest 689 (8 bits)<br/> 690 <code>B:</code> static field reference index (16 bits)</td> 691 <td>Perform the identified object static field operation with the identified 692 static field, loading or storing into the value register. 693 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 694 altering the field argument to be a more direct offset.</p> 695 </td> 696 </tr> 697 <tr> 698 <td>6e..72 35c</td> 699 <td>invoke-<i>kind</i> {vD, vE, vF, vG, vA}, meth@CCCC<br/> 700 6e: invoke-virtual<br/> 701 6f: invoke-super<br/> 702 70: invoke-direct<br/> 703 71: invoke-static<br/> 704 72: invoke-interface 705 </td> 706 <td><code>B:</code> argument word count (4 bits)<br/> 707 <code>C:</code> method index (16 bits)<br/> 708 <code>D..G, A:</code> argument registers (4 bits each)</td> 709 <td>Call the indicated method. The result (if any) may be stored 710 with an appropriate <code>move-result*</code> variant as the immediately 711 subsequent instruction. 712 <p><code>invoke-virtual</code> is used to invoke a normal virtual 713 method (a method that is not <code>static</code> or <code>final</code>, 714 and is not a constructor).</p> 715 <p><code>invoke-super</code> is used to invoke the closest superclass's 716 virtual method (as opposed to the one with the same <code>method_id</code> 717 in the calling class).</p> 718 <p><code>invoke-direct</code> is used to invoke a non-<code>static</code> 719 direct method (that is, an instance method that is by its nature 720 non-overridable, namely either a <code>private</code> instance method 721 or a constructor).</p> 722 <p><code>invoke-static</code> is used to invoke a <code>static</code> 723 method (which is always considered a direct method).</p> 724 <p><code>invoke-interface</code> is used to invoke an 725 <code>interface</code> method, that is, on an object whose concrete 726 class isn't known, using a <code>method_id</code> that refers to 727 an <code>interface</code>.</p> 728 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 729 altering the method argument to be a more direct offset 730 (or pair thereof).</p> 731 </td> 732 </tr> 733 <tr> 734 <td>73 10x</td> 735 <td><i>(unused)</i></td> 736 <td> </td> 737 <td><i>(unused)</i></td> 738 </tr> 739 <tr> 740 <td>74..78 3rc</td> 741 <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/> 742 74: invoke-virtual/range<br/> 743 75: invoke-super/range<br/> 744 76: invoke-direct/range<br/> 745 77: invoke-static/range<br/> 746 78: invoke-interface/range 747 </td> 748 <td><code>A:</code> argument word count (8 bits)<br/> 749 <code>B:</code> method index (16 bits)<br/> 750 <code>C:</code> first argument register (16 bits)<br/> 751 <code>N = A + C - 1</code></td> 752 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code> 753 description above for details, caveats, and suggestions. 754 </td> 755 </tr> 756 <tr> 757 <td>79..7a 10x</td> 758 <td><i>(unused)</i></td> 759 <td> </td> 760 <td><i>(unused)</i></td> 761 </tr> 762 <tr> 763 <td>7b..8f 12x</td> 764 <td><i>unop</i> vA, vB<br/> 765 7b: neg-int<br/> 766 7c: not-int<br/> 767 7d: neg-long<br/> 768 7e: not-long<br/> 769 7f: neg-float<br/> 770 80: neg-double<br/> 771 81: int-to-long<br/> 772 82: int-to-float<br/> 773 83: int-to-double<br/> 774 84: long-to-int<br/> 775 85: long-to-float<br/> 776 86: long-to-double<br/> 777 87: float-to-int<br/> 778 88: float-to-long<br/> 779 89: float-to-double<br/> 780 8a: double-to-int<br/> 781 8b: double-to-long<br/> 782 8c: double-to-float<br/> 783 8d: int-to-byte<br/> 784 8e: int-to-char<br/> 785 8f: int-to-short 786 </td> 787 <td><code>A:</code> destination register or pair (4 bits)<br/> 788 <code>B:</code> source register or pair (4 bits)</td> 789 <td>Perform the identified unary operation on the source register, 790 storing the result in the destination register.</td> 791 </tr> 792 793 <tr> 794 <td>90..af 23x</td> 795 <td><i>binop</i> vAA, vBB, vCC<br/> 796 90: add-int<br/> 797 91: sub-int<br/> 798 92: mul-int<br/> 799 93: div-int<br/> 800 94: rem-int<br/> 801 95: and-int<br/> 802 96: or-int<br/> 803 97: xor-int<br/> 804 98: shl-int<br/> 805 99: shr-int<br/> 806 9a: ushr-int<br/> 807 9b: add-long<br/> 808 9c: sub-long<br/> 809 9d: mul-long<br/> 810 9e: div-long<br/> 811 9f: rem-long<br/> 812 a0: and-long<br/> 813 a1: or-long<br/> 814 a2: xor-long<br/> 815 a3: shl-long<br/> 816 a4: shr-long<br/> 817 a5: ushr-long<br/> 818 a6: add-float<br/> 819 a7: sub-float<br/> 820 a8: mul-float<br/> 821 a9: div-float<br/> 822 aa: rem-float<br/> 823 ab: add-double<br/> 824 ac: sub-double<br/> 825 ad: mul-double<br/> 826 ae: div-double<br/> 827 af: rem-double 828 </td> 829 <td><code>A:</code> destination register or pair (8 bits)<br/> 830 <code>B:</code> first source register or pair (8 bits)<br/> 831 <code>C:</code> second source register or pair (8 bits)</td> 832 <td>Perform the identified binary operation on the two source registers, 833 storing the result in the first source register.</td> 834 </tr> 835 <tr> 836 <td>b0..cf 12x</td> 837 <td><i>binop</i>/2addr vA, vB<br/> 838 b0: add-int/2addr<br/> 839 b1: sub-int/2addr<br/> 840 b2: mul-int/2addr<br/> 841 b3: div-int/2addr<br/> 842 b4: rem-int/2addr<br/> 843 b5: and-int/2addr<br/> 844 b6: or-int/2addr<br/> 845 b7: xor-int/2addr<br/> 846 b8: shl-int/2addr<br/> 847 b9: shr-int/2addr<br/> 848 ba: ushr-int/2addr<br/> 849 bb: add-long/2addr<br/> 850 bc: sub-long/2addr<br/> 851 bd: mul-long/2addr<br/> 852 be: div-long/2addr<br/> 853 bf: rem-long/2addr<br/> 854 c0: and-long/2addr<br/> 855 c1: or-long/2addr<br/> 856 c2: xor-long/2addr<br/> 857 c3: shl-long/2addr<br/> 858 c4: shr-long/2addr<br/> 859 c5: ushr-long/2addr<br/> 860 c6: add-float/2addr<br/> 861 c7: sub-float/2addr<br/> 862 c8: mul-float/2addr<br/> 863 c9: div-float/2addr<br/> 864 ca: rem-float/2addr<br/> 865 cb: add-double/2addr<br/> 866 cc: sub-double/2addr<br/> 867 cd: mul-double/2addr<br/> 868 ce: div-double/2addr<br/> 869 cf: rem-double/2addr 870 </td> 871 <td><code>A:</code> destination and first source register or pair 872 (4 bits)<br/> 873 <code>B:</code> second source register or pair (4 bits)</td> 874 <td>Perform the identified binary operation on the two source registers, 875 storing the result in the first source register.</td> 876 </tr> 877 <tr> 878 <td>d0..d7 22s</td> 879 <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/> 880 d0: add-int/lit16<br/> 881 d1: rsub-int (reverse subtract)<br/> 882 d2: mul-int/lit16<br/> 883 d3: div-int/lit16<br/> 884 d4: rem-int/lit16<br/> 885 d5: and-int/lit16<br/> 886 d6: or-int/lit16<br/> 887 d7: xor-int/lit16 888 </td> 889 <td><code>A:</code> destination register (4 bits)<br/> 890 <code>B:</code> source register (4 bits)<br/> 891 <code>C:</code> signed int constant (16 bits)</td> 892 <td>Perform the indicated binary op on the indicated register (first 893 argument) and literal value (second argument), storing the result in 894 the destination register. 895 <p><b>Note:</b> 896 <code>rsub-int</code> does not have a suffix since this version is the 897 main opcode of its family. Also, see below for details on its semantics. 898 </p> 899 </td> 900 </tr> 901 <tr> 902 <td>d8..e2 22b</td> 903 <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/> 904 d8: add-int/lit8<br/> 905 d9: rsub-int/lit8<br/> 906 da: mul-int/lit8<br/> 907 db: div-int/lit8<br/> 908 dc: rem-int/lit8<br/> 909 dd: and-int/lit8<br/> 910 de: or-int/lit8<br/> 911 df: xor-int/lit8<br/> 912 e0: shl-int/lit8<br/> 913 e1: shr-int/lit8<br/> 914 e2: ushr-int/lit8 915 </td> 916 <td><code>A:</code> destination register (8 bits)<br/> 917 <code>B:</code> source register (8 bits)<br/> 918 <code>C:</code> signed int constant (8 bits)</td> 919 <td>Perform the indicated binary op on the indicated register (first 920 argument) and literal value (second argument), storing the result 921 in the destination register. 922 <p><b>Note:</b> See below for details on the semantics of 923 <code>rsub-int</code>.</p> 924 </td> 925 </tr> 926 <tr> 927 <td>e3..ff 10x</td> 928 <td><i>(unused)</i></td> 929 <td> </td> 930 <td><i>(unused)</i></td> 931 </tr> 932 </tbody> 933 </table> 934 935 <h2><code>packed-switch</code> Format</h2> 936 937 <table class="supplement"> 938 <thead> 939 <tr> 940 <th>Name</th> 941 <th>Format</th> 942 <th>Description</th> 943 </tr> 944 </thead> 945 <tbody> 946 <tr> 947 <td>ident</td> 948 <td>ushort = 0x0100</td> 949 <td>identifying pseudo-opcode</td> 950 </tr> 951 <tr> 952 <td>size</td> 953 <td>ushort</td> 954 <td>number of entries in the table</td> 955 </tr> 956 <tr> 957 <td>first_key</td> 958 <td>int</td> 959 <td>first (and lowest) switch case value</td> 960 </tr> 961 <tr> 962 <td>targets</td> 963 <td>int[]</td> 964 <td>list of <code>size</code> relative branch targets. The targets are 965 relative to the address of the switch opcode, not of this table. 966 </td> 967 </tr> 968 </tbody> 969 </table> 970 971 <p><b>Note:</b> The total number of code units for an instance of this 972 table is <code>(size * 2) + 4</code>.</p> 973 974 <h2><code>sparse-switch</code> Format</h2> 975 976 <table class="supplement"> 977 <thead> 978 <tr> 979 <th>Name</th> 980 <th>Format</th> 981 <th>Description</th> 982 </tr> 983 </thead> 984 <tbody> 985 <tr> 986 <td>ident</td> 987 <td>ushort = 0x0200</td> 988 <td>identifying pseudo-opcode</td> 989 </tr> 990 <tr> 991 <td>size</td> 992 <td>ushort</td> 993 <td>number of entries in the table</td> 994 </tr> 995 <tr> 996 <td>keys</td> 997 <td>int[]</td> 998 <td>list of <code>size</code> key values, sorted low-to-high</td> 999 </tr> 1000 <tr> 1001 <td>targets</td> 1002 <td>int[]</td> 1003 <td>list of <code>size</code> relative branch targets, each corresponding 1004 to the key value at the same index. The targets are 1005 relative to the address of the switch opcode, not of this table. 1006 </td> 1007 </tr> 1008 </tbody> 1009 </table> 1010 1011 <p><b>Note:</b> The total number of code units for an instance of this 1012 table is <code>(size * 4) + 2</code>.</p> 1013 1014 <h2><code>fill-array-data</code> Format</h2> 1015 1016 <table class="supplement"> 1017 <thead> 1018 <tr> 1019 <th>Name</th> 1020 <th>Format</th> 1021 <th>Description</th> 1022 </tr> 1023 </thead> 1024 <tbody> 1025 <tr> 1026 <td>ident</td> 1027 <td>ushort = 0x0300</td> 1028 <td>identifying pseudo-opcode</td> 1029 </tr> 1030 <tr> 1031 <td>element_width</td> 1032 <td>ushort</td> 1033 <td>number of bytes in each element</td> 1034 </tr> 1035 <tr> 1036 <td>size</td> 1037 <td>uint</td> 1038 <td>number of elements in the table</td> 1039 </tr> 1040 <tr> 1041 <td>data</td> 1042 <td>ubyte[]</td> 1043 <td>data values</td> 1044 </tr> 1045 </tbody> 1046 </table> 1047 1048 <p><b>Note:</b> The total number of code units for an instance of this 1049 table is <code>(size * element_width + 1) / 2 + 4</code>.</p> 1050 1051 1052 <h2>Mathematical Operation Details</h2> 1053 1054 <p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using 1055 round-to-nearest and gradual underflow, except where stated otherwise.</p> 1056 1057 <table class="math"> 1058 <thead> 1059 <tr> 1060 <th>Opcode</th> 1061 <th>C Semantics</th> 1062 <th>Notes</th> 1063 </tr> 1064 </thead> 1065 <tbody> 1066 <tr> 1067 <td>neg-int</td> 1068 <td>int32 a;<br/> 1069 int32 result = -a; 1070 </td> 1071 <td>Unary twos-complement.</td> 1072 </tr> 1073 <tr> 1074 <td>not-int</td> 1075 <td>int32 a;<br/> 1076 int32 result = ~a; 1077 </td> 1078 <td>Unary ones-complement.</td> 1079 </tr> 1080 <tr> 1081 <td>neg-long</td> 1082 <td>int64 a;<br/> 1083 int64 result = -a; 1084 </td> 1085 <td>Unary twos-complement.</td> 1086 </tr> 1087 <tr> 1088 <td>not-long</td> 1089 <td>int64 a;<br/> 1090 int64 result = ~a; 1091 </td> 1092 <td>Unary ones-complement.</td> 1093 </tr> 1094 <tr> 1095 <td>neg-float</td> 1096 <td>float a;<br/> 1097 float result = -a; 1098 </td> 1099 <td>Floating point negation.</td> 1100 </tr> 1101 <tr> 1102 <td>neg-double</td> 1103 <td>double a;<br/> 1104 double result = -a; 1105 </td> 1106 <td>Floating point negation.</td> 1107 </tr> 1108 <tr> 1109 <td>int-to-long</td> 1110 <td>int32 a;<br/> 1111 int64 result = (int64) a; 1112 </td> 1113 <td>Sign extension of <code>int32</code> into <code>int64</code>.</td> 1114 </tr> 1115 <tr> 1116 <td>int-to-float</td> 1117 <td>int32 a;<br/> 1118 float result = (float) a; 1119 </td> 1120 <td>Conversion of <code>int32</code> to <code>float</code>, using 1121 round-to-nearest. This loses precision for some values. 1122 </td> 1123 </tr> 1124 <tr> 1125 <td>int-to-double</td> 1126 <td>int32 a;<br/> 1127 double result = (double) a; 1128 </td> 1129 <td>Conversion of <code>int32</code> to <code>double</code>.</td> 1130 </tr> 1131 <tr> 1132 <td>long-to-int</td> 1133 <td>int64 a;<br/> 1134 int32 result = (int32) a; 1135 </td> 1136 <td>Truncation of <code>int64</code> into <code>int32</code>.</td> 1137 </tr> 1138 <tr> 1139 <td>long-to-float</td> 1140 <td>int64 a;<br/> 1141 float result = (float) a; 1142 </td> 1143 <td>Conversion of <code>int64</code> to <code>float</code>, using 1144 round-to-nearest. This loses precision for some values. 1145 </td> 1146 </tr> 1147 <tr> 1148 <td>long-to-double</td> 1149 <td>int64 a;<br/> 1150 double result = (double) a; 1151 </td> 1152 <td>Conversion of <code>int64</code> to <code>double</code>, using 1153 round-to-nearest. This loses precision for some values. 1154 </td> 1155 </tr> 1156 <tr> 1157 <td>float-to-int</td> 1158 <td>float a;<br/> 1159 int32 result = (int32) a; 1160 </td> 1161 <td>Conversion of <code>float</code> to <code>int32</code>, using 1162 round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero) 1163 convert to the integer <code>0</code>. Infinities and values with 1164 too large a magnitude to be represented get converted to either 1165 <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign. 1166 </td> 1167 </tr> 1168 <tr> 1169 <td>float-to-long</td> 1170 <td>float a;<br/> 1171 int64 result = (int64) a; 1172 </td> 1173 <td>Conversion of <code>float</code> to <code>int64</code>, using 1174 round-toward-zero. The same special case rules as for 1175 <code>float-to-int</code> apply here, except that out-of-range values 1176 get converted to either <code>0x7fffffffffffffff</code> or 1177 <code>-0x8000000000000000</code> depending on sign. 1178 </td> 1179 </tr> 1180 <tr> 1181 <td>float-to-double</td> 1182 <td>float a;<br/> 1183 double result = (double) a; 1184 </td> 1185 <td>Conversion of <code>float</code> to <code>double</code>, preserving 1186 the value exactly. 1187 </td> 1188 </tr> 1189 <tr> 1190 <td>double-to-int</td> 1191 <td>double a;<br/> 1192 int32 result = (int32) a; 1193 </td> 1194 <td>Conversion of <code>double</code> to <code>int32</code>, using 1195 round-toward-zero. The same special case rules as for 1196 <code>float-to-int</code> apply here. 1197 </td> 1198 </tr> 1199 <tr> 1200 <td>double-to-long</td> 1201 <td>double a;<br/> 1202 int64 result = (int64) a; 1203 </td> 1204 <td>Conversion of <code>double</code> to <code>int64</code>, using 1205 round-toward-zero. The same special case rules as for 1206 <code>float-to-long</code> apply here. 1207 </td> 1208 </tr> 1209 <tr> 1210 <td>double-to-float</td> 1211 <td>double a;<br/> 1212 float result = (float) a; 1213 </td> 1214 <td>Conversion of <code>double</code> to <code>float</code>, using 1215 round-to-nearest. This loses precision for some values. 1216 </td> 1217 </tr> 1218 <tr> 1219 <td>int-to-byte</td> 1220 <td>int32 a;<br/> 1221 int32 result = (a << 24) >> 24; 1222 </td> 1223 <td>Truncation of <code>int32</code> to <code>int8</code>, sign 1224 extending the result. 1225 </td> 1226 </tr> 1227 <tr> 1228 <td>int-to-char</td> 1229 <td>int32 a;<br/> 1230 int32 result = a & 0xffff; 1231 </td> 1232 <td>Truncation of <code>int32</code> to <code>uint16</code>, without 1233 sign extension. 1234 </td> 1235 </tr> 1236 <tr> 1237 <td>int-to-short</td> 1238 <td>int32 a;<br/> 1239 int32 result = (a << 16) >> 16; 1240 </td> 1241 <td>Truncation of <code>int32</code> to <code>int16</code>, sign 1242 extending the result. 1243 </td> 1244 </tr> 1245 <tr> 1246 <td>add-int</td> 1247 <td>int32 a, b;<br/> 1248 int32 result = a + b; 1249 </td> 1250 <td>Twos-complement addition.</td> 1251 </tr> 1252 <tr> 1253 <td>sub-int</td> 1254 <td>int32 a, b;<br/> 1255 int32 result = a - b; 1256 </td> 1257 <td>Twos-complement subtraction.</td> 1258 </tr> 1259 <tr> 1260 <td>rsub-int</td> 1261 <td>int32 a, b;<br/> 1262 int32 result = b - a; 1263 </td> 1264 <td>Twos-complement reverse subtraction.</td> 1265 </tr> 1266 <tr> 1267 <td>mul-int</td> 1268 <td>int32 a, b;<br/> 1269 int32 result = a * b; 1270 </td> 1271 <td>Twos-complement multiplication.</td> 1272 </tr> 1273 <tr> 1274 <td>div-int</td> 1275 <td>int32 a, b;<br/> 1276 int32 result = a / b; 1277 </td> 1278 <td>Twos-complement division, rounded towards zero (that is, truncated to 1279 integer). This throws <code>ArithmeticException</code> if 1280 <code>b == 0</code>. 1281 </td> 1282 </tr> 1283 <tr> 1284 <td>rem-int</td> 1285 <td>int32 a, b;<br/> 1286 int32 result = a % b; 1287 </td> 1288 <td>Twos-complement remainder after division. The sign of the result 1289 is the same as that of <code>a</code>, and it is more precisely 1290 defined as <code>result == a - (a / b) * b</code>. This throws 1291 <code>ArithmeticException</code> if <code>b == 0</code>. 1292 </td> 1293 </tr> 1294 <tr> 1295 <td>and-int</td> 1296 <td>int32 a, b;<br/> 1297 int32 result = a & b; 1298 </td> 1299 <td>Bitwise AND.</td> 1300 </tr> 1301 <tr> 1302 <td>or-int</td> 1303 <td>int32 a, b;<br/> 1304 int32 result = a | b; 1305 </td> 1306 <td>Bitwise OR.</td> 1307 </tr> 1308 <tr> 1309 <td>xor-int</td> 1310 <td>int32 a, b;<br/> 1311 int32 result = a ^ b; 1312 </td> 1313 <td>Bitwise XOR.</td> 1314 </tr> 1315 <tr> 1316 <td>shl-int</td> 1317 <td>int32 a, b;<br/> 1318 int32 result = a << (b & 0x1f); 1319 </td> 1320 <td>Bitwise shift left (with masked argument).</td> 1321 </tr> 1322 <tr> 1323 <td>shr-int</td> 1324 <td>int32 a, b;<br/> 1325 int32 result = a >> (b & 0x1f); 1326 </td> 1327 <td>Bitwise signed shift right (with masked argument).</td> 1328 </tr> 1329 <tr> 1330 <td>ushr-int</td> 1331 <td>uint32 a, b;<br/> 1332 int32 result = a >> (b & 0x1f); 1333 </td> 1334 <td>Bitwise unsigned shift right (with masked argument).</td> 1335 </tr> 1336 <tr> 1337 <td>add-long</td> 1338 <td>int64 a, b;<br/> 1339 int64 result = a + b; 1340 </td> 1341 <td>Twos-complement addition.</td> 1342 </tr> 1343 <tr> 1344 <td>sub-long</td> 1345 <td>int64 a, b;<br/> 1346 int64 result = a - b; 1347 </td> 1348 <td>Twos-complement subtraction.</td> 1349 </tr> 1350 <tr> 1351 <td>mul-long</td> 1352 <td>int64 a, b;<br/> 1353 int64 result = a * b; 1354 </td> 1355 <td>Twos-complement multiplication.</td> 1356 </tr> 1357 <tr> 1358 <td>div-long</td> 1359 <td>int64 a, b;<br/> 1360 int64 result = a / b; 1361 </td> 1362 <td>Twos-complement division, rounded towards zero (that is, truncated to 1363 integer). This throws <code>ArithmeticException</code> if 1364 <code>b == 0</code>. 1365 </td> 1366 </tr> 1367 <tr> 1368 <td>rem-long</td> 1369 <td>int64 a, b;<br/> 1370 int64 result = a % b; 1371 </td> 1372 <td>Twos-complement remainder after division. The sign of the result 1373 is the same as that of <code>a</code>, and it is more precisely 1374 defined as <code>result == a - (a / b) * b</code>. This throws 1375 <code>ArithmeticException</code> if <code>b == 0</code>. 1376 </td> 1377 </tr> 1378 <tr> 1379 <td>and-long</td> 1380 <td>int64 a, b;<br/> 1381 int64 result = a & b; 1382 </td> 1383 <td>Bitwise AND.</td> 1384 </tr> 1385 <tr> 1386 <td>or-long</td> 1387 <td>int64 a, b;<br/> 1388 int64 result = a | b; 1389 </td> 1390 <td>Bitwise OR.</td> 1391 </tr> 1392 <tr> 1393 <td>xor-long</td> 1394 <td>int64 a, b;<br/> 1395 int64 result = a ^ b; 1396 </td> 1397 <td>Bitwise XOR.</td> 1398 </tr> 1399 <tr> 1400 <td>shl-long</td> 1401 <td>int64 a, b;<br/> 1402 int64 result = a << (b & 0x3f); 1403 </td> 1404 <td>Bitwise shift left (with masked argument).</td> 1405 </tr> 1406 <tr> 1407 <td>shr-long</td> 1408 <td>int64 a, b;<br/> 1409 int64 result = a >> (b & 0x3f); 1410 </td> 1411 <td>Bitwise signed shift right (with masked argument).</td> 1412 </tr> 1413 <tr> 1414 <td>ushr-long</td> 1415 <td>uint64 a, b;<br/> 1416 int64 result = a >> (b & 0x3f); 1417 </td> 1418 <td>Bitwise unsigned shift right (with masked argument).</td> 1419 </tr> 1420 <tr> 1421 <td>add-float</td> 1422 <td>float a, b;<br/> 1423 float result = a + b; 1424 </td> 1425 <td>Floating point addition.</td> 1426 </tr> 1427 <tr> 1428 <td>sub-float</td> 1429 <td>float a, b;<br/> 1430 float result = a - b; 1431 </td> 1432 <td>Floating point subtraction.</td> 1433 </tr> 1434 <tr> 1435 <td>mul-float</td> 1436 <td>float a, b;<br/> 1437 float result = a * b; 1438 </td> 1439 <td>Floating point multiplication.</td> 1440 </tr> 1441 <tr> 1442 <td>div-float</td> 1443 <td>float a, b;<br/> 1444 float result = a / b; 1445 </td> 1446 <td>Floating point division.</td> 1447 </tr> 1448 <tr> 1449 <td>rem-float</td> 1450 <td>float a, b;<br/> 1451 float result = a % b; 1452 </td> 1453 <td>Floating point remainder after division. This function is different 1454 than IEEE 754 remainder and is defined as 1455 <code>result == a - roundTowardZero(a / b) * b</code>. 1456 </td> 1457 </tr> 1458 <tr> 1459 <td>add-double</td> 1460 <td>double a, b;<br/> 1461 double result = a + b; 1462 </td> 1463 <td>Floating point addition.</td> 1464 </tr> 1465 <tr> 1466 <td>sub-double</td> 1467 <td>double a, b;<br/> 1468 double result = a - b; 1469 </td> 1470 <td>Floating point subtraction.</td> 1471 </tr> 1472 <tr> 1473 <td>mul-double</td> 1474 <td>double a, b;<br/> 1475 double result = a * b; 1476 </td> 1477 <td>Floating point multiplication.</td> 1478 </tr> 1479 <tr> 1480 <td>div-double</td> 1481 <td>double a, b;<br/> 1482 double result = a / b; 1483 </td> 1484 <td>Floating point division.</td> 1485 </tr> 1486 <tr> 1487 <td>rem-double</td> 1488 <td>double a, b;<br/> 1489 double result = a % b; 1490 </td> 1491 <td>Floating point remainder after division. This function is different 1492 than IEEE 754 remainder and is defined as 1493 <code>result == a - roundTowardZero(a / b) * b</code>. 1494 </td> 1495 </tr> 1496 </tbody> 1497 </table> 1498 1499 </body> 1500 </html> 1501