Lines Matching refs:imm
200 void X86Assembler::pushl(const Immediate& imm) { in pushl() argument
202 if (imm.is_int8()) { in pushl()
204 EmitUint8(imm.value() & 0xFF); in pushl()
207 EmitImmediate(imm); in pushl()
225 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl() argument
228 EmitImmediate(imm); in movl()
253 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
257 EmitImmediate(imm); in movl()
422 void X86Assembler::movb(const Address& dst, const Immediate& imm) { in movb() argument
426 CHECK(imm.is_int8()); in movb()
427 EmitUint8(imm.value() & 0xFF); in movb()
476 void X86Assembler::movw(const Address& dst, const Immediate& imm) { in movw() argument
481 CHECK(imm.is_uint16() || imm.is_int16()); in movw()
482 EmitUint8(imm.value() & 0xFF); in movw()
483 EmitUint8(imm.value() >> 8); in movw()
1291 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() argument
1298 EmitUint8(imm.value()); in roundsd()
1302 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() argument
1309 EmitUint8(imm.value()); in roundss()
1808 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() argument
1814 EmitUint8(imm.value()); in shufpd()
1818 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() argument
1823 EmitUint8(imm.value()); in shufps()
1827 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() argument
1833 EmitUint8(imm.value()); in pshufd()
2143 void X86Assembler::cmpb(const Address& address, const Immediate& imm) { in cmpb() argument
2147 EmitUint8(imm.value() & 0xFF); in cmpb()
2151 void X86Assembler::cmpw(const Address& address, const Immediate& imm) { in cmpw() argument
2154 EmitComplex(7, address, imm, /* is_16_op= */ true); in cmpw()
2158 void X86Assembler::cmpl(Register reg, const Immediate& imm) { in cmpl() argument
2160 EmitComplex(7, Operand(reg), imm); in cmpl()
2199 void X86Assembler::cmpl(const Address& address, const Immediate& imm) { in cmpl() argument
2201 EmitComplex(7, address, imm); in cmpl()
2244 void X86Assembler::testb(const Address& dst, const Immediate& imm) { in testb() argument
2248 CHECK(imm.is_int8()); in testb()
2249 EmitUint8(imm.value() & 0xFF); in testb()
2253 void X86Assembler::testl(const Address& dst, const Immediate& imm) { in testl() argument
2257 EmitImmediate(imm); in testl()
2275 void X86Assembler::andl(Register dst, const Immediate& imm) { in andl() argument
2277 EmitComplex(4, Operand(dst), imm); in andl()
2295 void X86Assembler::orl(Register dst, const Immediate& imm) { in orl() argument
2297 EmitComplex(1, Operand(dst), imm); in orl()
2315 void X86Assembler::xorl(Register dst, const Immediate& imm) { in xorl() argument
2317 EmitComplex(6, Operand(dst), imm); in xorl()
2321 void X86Assembler::addl(Register reg, const Immediate& imm) { in addl() argument
2323 EmitComplex(0, Operand(reg), imm); in addl()
2334 void X86Assembler::addl(const Address& address, const Immediate& imm) { in addl() argument
2336 EmitComplex(0, address, imm); in addl()
2340 void X86Assembler::addw(const Address& address, const Immediate& imm) { in addw() argument
2342 CHECK(imm.is_uint16() || imm.is_int16()) << imm.value(); in addw()
2344 EmitComplex(0, address, imm, /* is_16_op= */ true); in addw()
2348 void X86Assembler::adcl(Register reg, const Immediate& imm) { in adcl() argument
2350 EmitComplex(2, Operand(reg), imm); in adcl()
2375 void X86Assembler::subl(Register reg, const Immediate& imm) { in subl() argument
2377 EmitComplex(5, Operand(reg), imm); in subl()
2416 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) { in imull() argument
2419 int32_t v32 = static_cast<int32_t>(imm.value()); in imull()
2429 EmitImmediate(imm); in imull()
2434 void X86Assembler::imull(Register reg, const Immediate& imm) { in imull() argument
2435 imull(reg, reg, imm); in imull()
2482 void X86Assembler::sbbl(Register reg, const Immediate& imm) { in sbbl() argument
2484 EmitComplex(3, Operand(reg), imm); in sbbl()
2528 void X86Assembler::shll(Register reg, const Immediate& imm) { in shll() argument
2529 EmitGenericShift(4, Operand(reg), imm); in shll()
2538 void X86Assembler::shll(const Address& address, const Immediate& imm) { in shll() argument
2539 EmitGenericShift(4, address, imm); in shll()
2548 void X86Assembler::shrl(Register reg, const Immediate& imm) { in shrl() argument
2549 EmitGenericShift(5, Operand(reg), imm); in shrl()
2558 void X86Assembler::shrl(const Address& address, const Immediate& imm) { in shrl() argument
2559 EmitGenericShift(5, address, imm); in shrl()
2568 void X86Assembler::sarl(Register reg, const Immediate& imm) { in sarl() argument
2569 EmitGenericShift(7, Operand(reg), imm); in sarl()
2578 void X86Assembler::sarl(const Address& address, const Immediate& imm) { in sarl() argument
2579 EmitGenericShift(7, address, imm); in sarl()
2597 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) { in shld() argument
2602 EmitUint8(imm.value() & 0xFF); in shld()
2615 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) { in shrd() argument
2620 EmitUint8(imm.value() & 0xFF); in shrd()
2624 void X86Assembler::roll(Register reg, const Immediate& imm) { in roll() argument
2625 EmitGenericShift(0, Operand(reg), imm); in roll()
2634 void X86Assembler::rorl(Register reg, const Immediate& imm) { in rorl() argument
2635 EmitGenericShift(1, Operand(reg), imm); in rorl()
2658 void X86Assembler::enter(const Immediate& imm) { in enter() argument
2661 CHECK(imm.is_uint16()); in enter()
2662 EmitUint8(imm.value() & 0xFF); in enter()
2663 EmitUint8((imm.value() >> 8) & 0xFF); in enter()
2680 void X86Assembler::ret(const Immediate& imm) { in ret() argument
2683 CHECK(imm.is_uint16()); in ret()
2684 EmitUint8(imm.value() & 0xFF); in ret()
2685 EmitUint8((imm.value() >> 8) & 0xFF); in ret()
2908 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) { in AddImmediate() argument
2909 int value = imm.value(); in AddImmediate()
2914 addl(reg, imm); in AddImmediate()
2999 void X86Assembler::EmitImmediate(const Immediate& imm, bool is_16_op) { in EmitImmediate() argument
3001 EmitUint8(imm.value() & 0xFF); in EmitImmediate()
3002 EmitUint8(imm.value() >> 8); in EmitImmediate()
3004 EmitInt32(imm.value()); in EmitImmediate()
3068 const Immediate& imm) { in EmitGenericShift() argument
3070 CHECK(imm.is_int8()); in EmitGenericShift()
3071 if (imm.value() == 1) { in EmitGenericShift()
3077 EmitUint8(imm.value() & 0xFF); in EmitGenericShift()