1 /*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "assembler_x86.h"
18
19 #include "base/casts.h"
20 #include "base/memory_region.h"
21 #include "entrypoints/quick/quick_entrypoints.h"
22 #include "thread.h"
23
24 namespace art {
25 namespace x86 {
26
operator <<(std::ostream & os,const XmmRegister & reg)27 std::ostream& operator<<(std::ostream& os, const XmmRegister& reg) {
28 return os << "XMM" << static_cast<int>(reg);
29 }
30
operator <<(std::ostream & os,const X87Register & reg)31 std::ostream& operator<<(std::ostream& os, const X87Register& reg) {
32 return os << "ST" << static_cast<int>(reg);
33 }
34
operator <<(std::ostream & os,const Address & addr)35 std::ostream& operator<<(std::ostream& os, const Address& addr) {
36 switch (addr.mod()) {
37 case 0:
38 if (addr.rm() != ESP || addr.index() == ESP) {
39 return os << "(%" << addr.rm() << ")";
40 } else if (addr.base() == EBP) {
41 return os << static_cast<int>(addr.disp32()) << "(,%" << addr.index()
42 << "," << (1 << addr.scale()) << ")";
43 }
44 return os << "(%" << addr.base() << ",%" << addr.index() << "," << (1 << addr.scale()) << ")";
45 case 1:
46 if (addr.rm() != ESP || addr.index() == ESP) {
47 return os << static_cast<int>(addr.disp8()) << "(%" << addr.rm() << ")";
48 }
49 return os << static_cast<int>(addr.disp8()) << "(%" << addr.base() << ",%"
50 << addr.index() << "," << (1 << addr.scale()) << ")";
51 case 2:
52 if (addr.rm() != ESP || addr.index() == ESP) {
53 return os << static_cast<int>(addr.disp32()) << "(%" << addr.rm() << ")";
54 }
55 return os << static_cast<int>(addr.disp32()) << "(%" << addr.base() << ",%"
56 << addr.index() << "," << (1 << addr.scale()) << ")";
57 default:
58 return os << "<address?>";
59 }
60 }
61
EmitVexByteZero(bool is_two_byte)62 uint8_t X86Assembler::EmitVexByteZero(bool is_two_byte) {
63 uint8_t vex_zero = 0xC0;
64 if (!is_two_byte) {
65 vex_zero |= 0xC4;
66 } else {
67 vex_zero |= 0xC5;
68 }
69 return vex_zero;
70 }
71
EmitVexByte1(bool r,bool x,bool b,int mmmmm)72 uint8_t X86Assembler::EmitVexByte1(bool r, bool x, bool b, int mmmmm ) {
73 // VEX Byte 1
74 uint8_t vex_prefix = 0;
75 if (!r) {
76 vex_prefix |= 0x80; // VEX.R
77 }
78 if (!x) {
79 vex_prefix |= 0x40; // VEX.X
80 }
81 if (!b) {
82 vex_prefix |= 0x20; // VEX.B
83 }
84
85 // VEX.mmmmm
86 switch (mmmmm) {
87 case 1:
88 // implied 0F leading opcode byte
89 vex_prefix |= 0x01;
90 break;
91 case 2:
92 // implied leading 0F 38 opcode byte
93 vex_prefix |= 0x02;
94 break;
95 case 3:
96 // implied leading OF 3A opcode byte
97 vex_prefix |= 0x03;
98 break;
99 default:
100 LOG(FATAL) << "unknown opcode bytes";
101 }
102 return vex_prefix;
103 }
104
EmitVexByte2(bool w,int l,X86ManagedRegister operand,int pp)105 uint8_t X86Assembler::EmitVexByte2(bool w, int l, X86ManagedRegister operand, int pp) {
106 uint8_t vex_prefix = 0;
107 // VEX Byte 2
108 if (w) {
109 vex_prefix |= 0x80;
110 }
111 // VEX.vvvv
112 if (operand.IsXmmRegister()) {
113 XmmRegister vvvv = operand.AsXmmRegister();
114 int inverted_reg = 15-static_cast<int>(vvvv);
115 uint8_t reg = static_cast<uint8_t>(inverted_reg);
116 vex_prefix |= ((reg & 0x0F) << 3);
117 } else if (operand.IsCpuRegister()) {
118 Register vvvv = operand.AsCpuRegister();
119 int inverted_reg = 15 - static_cast<int>(vvvv);
120 uint8_t reg = static_cast<uint8_t>(inverted_reg);
121 vex_prefix |= ((reg & 0x0F) << 3);
122 }
123
124 // VEX.L
125 if (l == 256) {
126 vex_prefix |= 0x04;
127 }
128
129 // VEX.pp
130 switch (pp) {
131 case 0:
132 // SIMD Pefix - None
133 vex_prefix |= 0x00;
134 break;
135 case 1:
136 // SIMD Prefix - 66
137 vex_prefix |= 0x01;
138 break;
139 case 2:
140 // SIMD Prefix - F3
141 vex_prefix |= 0x02;
142 break;
143 case 3:
144 // SIMD Prefix - F2
145 vex_prefix |= 0x03;
146 break;
147 default:
148 LOG(FATAL) << "unknown SIMD Prefix";
149 }
150
151 return vex_prefix;
152 }
153
call(Register reg)154 void X86Assembler::call(Register reg) {
155 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
156 EmitUint8(0xFF);
157 EmitRegisterOperand(2, reg);
158 }
159
160
call(const Address & address)161 void X86Assembler::call(const Address& address) {
162 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
163 EmitUint8(0xFF);
164 EmitOperand(2, address);
165 }
166
167
call(Label * label)168 void X86Assembler::call(Label* label) {
169 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
170 EmitUint8(0xE8);
171 static const int kSize = 5;
172 // Offset by one because we already have emitted the opcode.
173 EmitLabel(label, kSize - 1);
174 }
175
176
call(const ExternalLabel & label)177 void X86Assembler::call(const ExternalLabel& label) {
178 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
179 intptr_t call_start = buffer_.GetPosition();
180 EmitUint8(0xE8);
181 EmitInt32(label.address());
182 static const intptr_t kCallExternalLabelSize = 5;
183 DCHECK_EQ((buffer_.GetPosition() - call_start), kCallExternalLabelSize);
184 }
185
186
pushl(Register reg)187 void X86Assembler::pushl(Register reg) {
188 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
189 EmitUint8(0x50 + reg);
190 }
191
192
pushl(const Address & address)193 void X86Assembler::pushl(const Address& address) {
194 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
195 EmitUint8(0xFF);
196 EmitOperand(6, address);
197 }
198
199
pushl(const Immediate & imm)200 void X86Assembler::pushl(const Immediate& imm) {
201 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
202 if (imm.is_int8()) {
203 EmitUint8(0x6A);
204 EmitUint8(imm.value() & 0xFF);
205 } else {
206 EmitUint8(0x68);
207 EmitImmediate(imm);
208 }
209 }
210
211
popl(Register reg)212 void X86Assembler::popl(Register reg) {
213 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
214 EmitUint8(0x58 + reg);
215 }
216
217
popl(const Address & address)218 void X86Assembler::popl(const Address& address) {
219 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
220 EmitUint8(0x8F);
221 EmitOperand(0, address);
222 }
223
224
movl(Register dst,const Immediate & imm)225 void X86Assembler::movl(Register dst, const Immediate& imm) {
226 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
227 EmitUint8(0xB8 + dst);
228 EmitImmediate(imm);
229 }
230
231
movl(Register dst,Register src)232 void X86Assembler::movl(Register dst, Register src) {
233 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
234 EmitUint8(0x89);
235 EmitRegisterOperand(src, dst);
236 }
237
238
movl(Register dst,const Address & src)239 void X86Assembler::movl(Register dst, const Address& src) {
240 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
241 EmitUint8(0x8B);
242 EmitOperand(dst, src);
243 }
244
245
movl(const Address & dst,Register src)246 void X86Assembler::movl(const Address& dst, Register src) {
247 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
248 EmitUint8(0x89);
249 EmitOperand(src, dst);
250 }
251
252
movl(const Address & dst,const Immediate & imm)253 void X86Assembler::movl(const Address& dst, const Immediate& imm) {
254 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
255 EmitUint8(0xC7);
256 EmitOperand(0, dst);
257 EmitImmediate(imm);
258 }
259
movl(const Address & dst,Label * lbl)260 void X86Assembler::movl(const Address& dst, Label* lbl) {
261 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
262 EmitUint8(0xC7);
263 EmitOperand(0, dst);
264 EmitLabel(lbl, dst.length_ + 5);
265 }
266
movntl(const Address & dst,Register src)267 void X86Assembler::movntl(const Address& dst, Register src) {
268 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
269 EmitUint8(0x0F);
270 EmitUint8(0xC3);
271 EmitOperand(src, dst);
272 }
273
blsi(Register dst,Register src)274 void X86Assembler::blsi(Register dst, Register src) {
275 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
276 uint8_t byte_zero = EmitVexByteZero(/*is_two_byte=*/ false);
277 uint8_t byte_one = EmitVexByte1(/*r=*/ false,
278 /*x=*/ false,
279 /*b=*/ false,
280 /*mmmmm=*/ 2);
281 uint8_t byte_two = EmitVexByte2(/*w=*/ false,
282 /*l=*/ 128,
283 X86ManagedRegister::FromCpuRegister(dst),
284 /*pp=*/ 0);
285 EmitUint8(byte_zero);
286 EmitUint8(byte_one);
287 EmitUint8(byte_two);
288 EmitUint8(0xF3);
289 EmitRegisterOperand(3, src);
290 }
291
blsmsk(Register dst,Register src)292 void X86Assembler::blsmsk(Register dst, Register src) {
293 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
294 uint8_t byte_zero = EmitVexByteZero(/*is_two_byte=*/ false);
295 uint8_t byte_one = EmitVexByte1(/*r=*/ false,
296 /*x=*/ false,
297 /*b=*/ false,
298 /*mmmmm=*/ 2);
299 uint8_t byte_two = EmitVexByte2(/*w=*/ false,
300 /*l=*/ 128,
301 X86ManagedRegister::FromCpuRegister(dst),
302 /*pp=*/ 0);
303 EmitUint8(byte_zero);
304 EmitUint8(byte_one);
305 EmitUint8(byte_two);
306 EmitUint8(0xF3);
307 EmitRegisterOperand(2, src);
308 }
309
blsr(Register dst,Register src)310 void X86Assembler::blsr(Register dst, Register src) {
311 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
312 uint8_t byte_zero = EmitVexByteZero(/*is_two_byte=*/ false);
313 uint8_t byte_one = EmitVexByte1(/*r=*/ false,
314 /*x=*/ false,
315 /*b=*/ false,
316 /*mmmmm=*/ 2);
317 uint8_t byte_two = EmitVexByte2(/*w=*/ false,
318 /*l=*/ 128,
319 X86ManagedRegister::FromCpuRegister(dst),
320 /*pp=*/ 0);
321 EmitUint8(byte_zero);
322 EmitUint8(byte_one);
323 EmitUint8(byte_two);
324 EmitUint8(0xF3);
325 EmitRegisterOperand(1, src);
326 }
327
bswapl(Register dst)328 void X86Assembler::bswapl(Register dst) {
329 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
330 EmitUint8(0x0F);
331 EmitUint8(0xC8 + dst);
332 }
333
bsfl(Register dst,Register src)334 void X86Assembler::bsfl(Register dst, Register src) {
335 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
336 EmitUint8(0x0F);
337 EmitUint8(0xBC);
338 EmitRegisterOperand(dst, src);
339 }
340
bsfl(Register dst,const Address & src)341 void X86Assembler::bsfl(Register dst, const Address& src) {
342 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
343 EmitUint8(0x0F);
344 EmitUint8(0xBC);
345 EmitOperand(dst, src);
346 }
347
bsrl(Register dst,Register src)348 void X86Assembler::bsrl(Register dst, Register src) {
349 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
350 EmitUint8(0x0F);
351 EmitUint8(0xBD);
352 EmitRegisterOperand(dst, src);
353 }
354
bsrl(Register dst,const Address & src)355 void X86Assembler::bsrl(Register dst, const Address& src) {
356 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
357 EmitUint8(0x0F);
358 EmitUint8(0xBD);
359 EmitOperand(dst, src);
360 }
361
popcntl(Register dst,Register src)362 void X86Assembler::popcntl(Register dst, Register src) {
363 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
364 EmitUint8(0xF3);
365 EmitUint8(0x0F);
366 EmitUint8(0xB8);
367 EmitRegisterOperand(dst, src);
368 }
369
popcntl(Register dst,const Address & src)370 void X86Assembler::popcntl(Register dst, const Address& src) {
371 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
372 EmitUint8(0xF3);
373 EmitUint8(0x0F);
374 EmitUint8(0xB8);
375 EmitOperand(dst, src);
376 }
377
movzxb(Register dst,ByteRegister src)378 void X86Assembler::movzxb(Register dst, ByteRegister src) {
379 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
380 EmitUint8(0x0F);
381 EmitUint8(0xB6);
382 EmitRegisterOperand(dst, src);
383 }
384
385
movzxb(Register dst,const Address & src)386 void X86Assembler::movzxb(Register dst, const Address& src) {
387 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
388 EmitUint8(0x0F);
389 EmitUint8(0xB6);
390 EmitOperand(dst, src);
391 }
392
393
movsxb(Register dst,ByteRegister src)394 void X86Assembler::movsxb(Register dst, ByteRegister src) {
395 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
396 EmitUint8(0x0F);
397 EmitUint8(0xBE);
398 EmitRegisterOperand(dst, src);
399 }
400
401
movsxb(Register dst,const Address & src)402 void X86Assembler::movsxb(Register dst, const Address& src) {
403 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
404 EmitUint8(0x0F);
405 EmitUint8(0xBE);
406 EmitOperand(dst, src);
407 }
408
409
movb(Register,const Address &)410 void X86Assembler::movb(Register /*dst*/, const Address& /*src*/) {
411 LOG(FATAL) << "Use movzxb or movsxb instead.";
412 }
413
414
movb(const Address & dst,ByteRegister src)415 void X86Assembler::movb(const Address& dst, ByteRegister src) {
416 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
417 EmitUint8(0x88);
418 EmitOperand(src, dst);
419 }
420
421
movb(const Address & dst,const Immediate & imm)422 void X86Assembler::movb(const Address& dst, const Immediate& imm) {
423 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
424 EmitUint8(0xC6);
425 EmitOperand(EAX, dst);
426 CHECK(imm.is_int8());
427 EmitUint8(imm.value() & 0xFF);
428 }
429
430
movzxw(Register dst,Register src)431 void X86Assembler::movzxw(Register dst, Register src) {
432 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
433 EmitUint8(0x0F);
434 EmitUint8(0xB7);
435 EmitRegisterOperand(dst, src);
436 }
437
438
movzxw(Register dst,const Address & src)439 void X86Assembler::movzxw(Register dst, const Address& src) {
440 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
441 EmitUint8(0x0F);
442 EmitUint8(0xB7);
443 EmitOperand(dst, src);
444 }
445
446
movsxw(Register dst,Register src)447 void X86Assembler::movsxw(Register dst, Register src) {
448 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
449 EmitUint8(0x0F);
450 EmitUint8(0xBF);
451 EmitRegisterOperand(dst, src);
452 }
453
454
movsxw(Register dst,const Address & src)455 void X86Assembler::movsxw(Register dst, const Address& src) {
456 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
457 EmitUint8(0x0F);
458 EmitUint8(0xBF);
459 EmitOperand(dst, src);
460 }
461
462
movw(Register,const Address &)463 void X86Assembler::movw(Register /*dst*/, const Address& /*src*/) {
464 LOG(FATAL) << "Use movzxw or movsxw instead.";
465 }
466
467
movw(const Address & dst,Register src)468 void X86Assembler::movw(const Address& dst, Register src) {
469 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
470 EmitOperandSizeOverride();
471 EmitUint8(0x89);
472 EmitOperand(src, dst);
473 }
474
475
movw(const Address & dst,const Immediate & imm)476 void X86Assembler::movw(const Address& dst, const Immediate& imm) {
477 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
478 EmitOperandSizeOverride();
479 EmitUint8(0xC7);
480 EmitOperand(0, dst);
481 CHECK(imm.is_uint16() || imm.is_int16());
482 EmitUint8(imm.value() & 0xFF);
483 EmitUint8(imm.value() >> 8);
484 }
485
486
leal(Register dst,const Address & src)487 void X86Assembler::leal(Register dst, const Address& src) {
488 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
489 EmitUint8(0x8D);
490 EmitOperand(dst, src);
491 }
492
493
cmovl(Condition condition,Register dst,Register src)494 void X86Assembler::cmovl(Condition condition, Register dst, Register src) {
495 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
496 EmitUint8(0x0F);
497 EmitUint8(0x40 + condition);
498 EmitRegisterOperand(dst, src);
499 }
500
501
cmovl(Condition condition,Register dst,const Address & src)502 void X86Assembler::cmovl(Condition condition, Register dst, const Address& src) {
503 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
504 EmitUint8(0x0F);
505 EmitUint8(0x40 + condition);
506 EmitOperand(dst, src);
507 }
508
509
setb(Condition condition,Register dst)510 void X86Assembler::setb(Condition condition, Register dst) {
511 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
512 EmitUint8(0x0F);
513 EmitUint8(0x90 + condition);
514 EmitOperand(0, Operand(dst));
515 }
516
517
movaps(XmmRegister dst,XmmRegister src)518 void X86Assembler::movaps(XmmRegister dst, XmmRegister src) {
519 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
520 EmitUint8(0x0F);
521 EmitUint8(0x28);
522 EmitXmmRegisterOperand(dst, src);
523 }
524
525
movaps(XmmRegister dst,const Address & src)526 void X86Assembler::movaps(XmmRegister dst, const Address& src) {
527 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
528 EmitUint8(0x0F);
529 EmitUint8(0x28);
530 EmitOperand(dst, src);
531 }
532
533
movups(XmmRegister dst,const Address & src)534 void X86Assembler::movups(XmmRegister dst, const Address& src) {
535 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
536 EmitUint8(0x0F);
537 EmitUint8(0x10);
538 EmitOperand(dst, src);
539 }
540
541
movaps(const Address & dst,XmmRegister src)542 void X86Assembler::movaps(const Address& dst, XmmRegister src) {
543 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
544 EmitUint8(0x0F);
545 EmitUint8(0x29);
546 EmitOperand(src, dst);
547 }
548
549
movups(const Address & dst,XmmRegister src)550 void X86Assembler::movups(const Address& dst, XmmRegister src) {
551 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
552 EmitUint8(0x0F);
553 EmitUint8(0x11);
554 EmitOperand(src, dst);
555 }
556
557
movss(XmmRegister dst,const Address & src)558 void X86Assembler::movss(XmmRegister dst, const Address& src) {
559 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
560 EmitUint8(0xF3);
561 EmitUint8(0x0F);
562 EmitUint8(0x10);
563 EmitOperand(dst, src);
564 }
565
566
movss(const Address & dst,XmmRegister src)567 void X86Assembler::movss(const Address& dst, XmmRegister src) {
568 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
569 EmitUint8(0xF3);
570 EmitUint8(0x0F);
571 EmitUint8(0x11);
572 EmitOperand(src, dst);
573 }
574
575
movss(XmmRegister dst,XmmRegister src)576 void X86Assembler::movss(XmmRegister dst, XmmRegister src) {
577 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
578 EmitUint8(0xF3);
579 EmitUint8(0x0F);
580 EmitUint8(0x11);
581 EmitXmmRegisterOperand(src, dst);
582 }
583
584
movd(XmmRegister dst,Register src)585 void X86Assembler::movd(XmmRegister dst, Register src) {
586 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
587 EmitUint8(0x66);
588 EmitUint8(0x0F);
589 EmitUint8(0x6E);
590 EmitOperand(dst, Operand(src));
591 }
592
593
movd(Register dst,XmmRegister src)594 void X86Assembler::movd(Register dst, XmmRegister src) {
595 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
596 EmitUint8(0x66);
597 EmitUint8(0x0F);
598 EmitUint8(0x7E);
599 EmitOperand(src, Operand(dst));
600 }
601
602
addss(XmmRegister dst,XmmRegister src)603 void X86Assembler::addss(XmmRegister dst, XmmRegister src) {
604 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
605 EmitUint8(0xF3);
606 EmitUint8(0x0F);
607 EmitUint8(0x58);
608 EmitXmmRegisterOperand(dst, src);
609 }
610
611
addss(XmmRegister dst,const Address & src)612 void X86Assembler::addss(XmmRegister dst, const Address& src) {
613 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
614 EmitUint8(0xF3);
615 EmitUint8(0x0F);
616 EmitUint8(0x58);
617 EmitOperand(dst, src);
618 }
619
620
subss(XmmRegister dst,XmmRegister src)621 void X86Assembler::subss(XmmRegister dst, XmmRegister src) {
622 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
623 EmitUint8(0xF3);
624 EmitUint8(0x0F);
625 EmitUint8(0x5C);
626 EmitXmmRegisterOperand(dst, src);
627 }
628
629
subss(XmmRegister dst,const Address & src)630 void X86Assembler::subss(XmmRegister dst, const Address& src) {
631 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
632 EmitUint8(0xF3);
633 EmitUint8(0x0F);
634 EmitUint8(0x5C);
635 EmitOperand(dst, src);
636 }
637
638
mulss(XmmRegister dst,XmmRegister src)639 void X86Assembler::mulss(XmmRegister dst, XmmRegister src) {
640 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
641 EmitUint8(0xF3);
642 EmitUint8(0x0F);
643 EmitUint8(0x59);
644 EmitXmmRegisterOperand(dst, src);
645 }
646
647
mulss(XmmRegister dst,const Address & src)648 void X86Assembler::mulss(XmmRegister dst, const Address& src) {
649 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
650 EmitUint8(0xF3);
651 EmitUint8(0x0F);
652 EmitUint8(0x59);
653 EmitOperand(dst, src);
654 }
655
656
divss(XmmRegister dst,XmmRegister src)657 void X86Assembler::divss(XmmRegister dst, XmmRegister src) {
658 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
659 EmitUint8(0xF3);
660 EmitUint8(0x0F);
661 EmitUint8(0x5E);
662 EmitXmmRegisterOperand(dst, src);
663 }
664
665
divss(XmmRegister dst,const Address & src)666 void X86Assembler::divss(XmmRegister dst, const Address& src) {
667 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
668 EmitUint8(0xF3);
669 EmitUint8(0x0F);
670 EmitUint8(0x5E);
671 EmitOperand(dst, src);
672 }
673
674
addps(XmmRegister dst,XmmRegister src)675 void X86Assembler::addps(XmmRegister dst, XmmRegister src) {
676 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
677 EmitUint8(0x0F);
678 EmitUint8(0x58);
679 EmitXmmRegisterOperand(dst, src);
680 }
681
682
subps(XmmRegister dst,XmmRegister src)683 void X86Assembler::subps(XmmRegister dst, XmmRegister src) {
684 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
685 EmitUint8(0x0F);
686 EmitUint8(0x5C);
687 EmitXmmRegisterOperand(dst, src);
688 }
689
690
mulps(XmmRegister dst,XmmRegister src)691 void X86Assembler::mulps(XmmRegister dst, XmmRegister src) {
692 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
693 EmitUint8(0x0F);
694 EmitUint8(0x59);
695 EmitXmmRegisterOperand(dst, src);
696 }
697
698
divps(XmmRegister dst,XmmRegister src)699 void X86Assembler::divps(XmmRegister dst, XmmRegister src) {
700 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
701 EmitUint8(0x0F);
702 EmitUint8(0x5E);
703 EmitXmmRegisterOperand(dst, src);
704 }
705
706
movapd(XmmRegister dst,XmmRegister src)707 void X86Assembler::movapd(XmmRegister dst, XmmRegister src) {
708 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
709 EmitUint8(0x66);
710 EmitUint8(0x0F);
711 EmitUint8(0x28);
712 EmitXmmRegisterOperand(dst, src);
713 }
714
715
movapd(XmmRegister dst,const Address & src)716 void X86Assembler::movapd(XmmRegister dst, const Address& src) {
717 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
718 EmitUint8(0x66);
719 EmitUint8(0x0F);
720 EmitUint8(0x28);
721 EmitOperand(dst, src);
722 }
723
724
movupd(XmmRegister dst,const Address & src)725 void X86Assembler::movupd(XmmRegister dst, const Address& src) {
726 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
727 EmitUint8(0x66);
728 EmitUint8(0x0F);
729 EmitUint8(0x10);
730 EmitOperand(dst, src);
731 }
732
733
movapd(const Address & dst,XmmRegister src)734 void X86Assembler::movapd(const Address& dst, XmmRegister src) {
735 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
736 EmitUint8(0x66);
737 EmitUint8(0x0F);
738 EmitUint8(0x29);
739 EmitOperand(src, dst);
740 }
741
742
movupd(const Address & dst,XmmRegister src)743 void X86Assembler::movupd(const Address& dst, XmmRegister src) {
744 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
745 EmitUint8(0x66);
746 EmitUint8(0x0F);
747 EmitUint8(0x11);
748 EmitOperand(src, dst);
749 }
750
751
flds(const Address & src)752 void X86Assembler::flds(const Address& src) {
753 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
754 EmitUint8(0xD9);
755 EmitOperand(0, src);
756 }
757
758
fsts(const Address & dst)759 void X86Assembler::fsts(const Address& dst) {
760 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
761 EmitUint8(0xD9);
762 EmitOperand(2, dst);
763 }
764
765
fstps(const Address & dst)766 void X86Assembler::fstps(const Address& dst) {
767 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
768 EmitUint8(0xD9);
769 EmitOperand(3, dst);
770 }
771
772
movsd(XmmRegister dst,const Address & src)773 void X86Assembler::movsd(XmmRegister dst, const Address& src) {
774 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
775 EmitUint8(0xF2);
776 EmitUint8(0x0F);
777 EmitUint8(0x10);
778 EmitOperand(dst, src);
779 }
780
781
movsd(const Address & dst,XmmRegister src)782 void X86Assembler::movsd(const Address& dst, XmmRegister src) {
783 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
784 EmitUint8(0xF2);
785 EmitUint8(0x0F);
786 EmitUint8(0x11);
787 EmitOperand(src, dst);
788 }
789
790
movsd(XmmRegister dst,XmmRegister src)791 void X86Assembler::movsd(XmmRegister dst, XmmRegister src) {
792 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
793 EmitUint8(0xF2);
794 EmitUint8(0x0F);
795 EmitUint8(0x11);
796 EmitXmmRegisterOperand(src, dst);
797 }
798
799
movhpd(XmmRegister dst,const Address & src)800 void X86Assembler::movhpd(XmmRegister dst, const Address& src) {
801 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
802 EmitUint8(0x66);
803 EmitUint8(0x0F);
804 EmitUint8(0x16);
805 EmitOperand(dst, src);
806 }
807
808
movhpd(const Address & dst,XmmRegister src)809 void X86Assembler::movhpd(const Address& dst, XmmRegister src) {
810 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
811 EmitUint8(0x66);
812 EmitUint8(0x0F);
813 EmitUint8(0x17);
814 EmitOperand(src, dst);
815 }
816
817
addsd(XmmRegister dst,XmmRegister src)818 void X86Assembler::addsd(XmmRegister dst, XmmRegister src) {
819 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
820 EmitUint8(0xF2);
821 EmitUint8(0x0F);
822 EmitUint8(0x58);
823 EmitXmmRegisterOperand(dst, src);
824 }
825
826
addsd(XmmRegister dst,const Address & src)827 void X86Assembler::addsd(XmmRegister dst, const Address& src) {
828 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
829 EmitUint8(0xF2);
830 EmitUint8(0x0F);
831 EmitUint8(0x58);
832 EmitOperand(dst, src);
833 }
834
835
subsd(XmmRegister dst,XmmRegister src)836 void X86Assembler::subsd(XmmRegister dst, XmmRegister src) {
837 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
838 EmitUint8(0xF2);
839 EmitUint8(0x0F);
840 EmitUint8(0x5C);
841 EmitXmmRegisterOperand(dst, src);
842 }
843
844
subsd(XmmRegister dst,const Address & src)845 void X86Assembler::subsd(XmmRegister dst, const Address& src) {
846 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
847 EmitUint8(0xF2);
848 EmitUint8(0x0F);
849 EmitUint8(0x5C);
850 EmitOperand(dst, src);
851 }
852
853
mulsd(XmmRegister dst,XmmRegister src)854 void X86Assembler::mulsd(XmmRegister dst, XmmRegister src) {
855 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
856 EmitUint8(0xF2);
857 EmitUint8(0x0F);
858 EmitUint8(0x59);
859 EmitXmmRegisterOperand(dst, src);
860 }
861
862
mulsd(XmmRegister dst,const Address & src)863 void X86Assembler::mulsd(XmmRegister dst, const Address& src) {
864 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
865 EmitUint8(0xF2);
866 EmitUint8(0x0F);
867 EmitUint8(0x59);
868 EmitOperand(dst, src);
869 }
870
871
divsd(XmmRegister dst,XmmRegister src)872 void X86Assembler::divsd(XmmRegister dst, XmmRegister src) {
873 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
874 EmitUint8(0xF2);
875 EmitUint8(0x0F);
876 EmitUint8(0x5E);
877 EmitXmmRegisterOperand(dst, src);
878 }
879
880
divsd(XmmRegister dst,const Address & src)881 void X86Assembler::divsd(XmmRegister dst, const Address& src) {
882 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
883 EmitUint8(0xF2);
884 EmitUint8(0x0F);
885 EmitUint8(0x5E);
886 EmitOperand(dst, src);
887 }
888
889
addpd(XmmRegister dst,XmmRegister src)890 void X86Assembler::addpd(XmmRegister dst, XmmRegister src) {
891 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
892 EmitUint8(0x66);
893 EmitUint8(0x0F);
894 EmitUint8(0x58);
895 EmitXmmRegisterOperand(dst, src);
896 }
897
898
subpd(XmmRegister dst,XmmRegister src)899 void X86Assembler::subpd(XmmRegister dst, XmmRegister src) {
900 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
901 EmitUint8(0x66);
902 EmitUint8(0x0F);
903 EmitUint8(0x5C);
904 EmitXmmRegisterOperand(dst, src);
905 }
906
907
mulpd(XmmRegister dst,XmmRegister src)908 void X86Assembler::mulpd(XmmRegister dst, XmmRegister src) {
909 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
910 EmitUint8(0x66);
911 EmitUint8(0x0F);
912 EmitUint8(0x59);
913 EmitXmmRegisterOperand(dst, src);
914 }
915
916
divpd(XmmRegister dst,XmmRegister src)917 void X86Assembler::divpd(XmmRegister dst, XmmRegister src) {
918 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
919 EmitUint8(0x66);
920 EmitUint8(0x0F);
921 EmitUint8(0x5E);
922 EmitXmmRegisterOperand(dst, src);
923 }
924
925
movdqa(XmmRegister dst,XmmRegister src)926 void X86Assembler::movdqa(XmmRegister dst, XmmRegister src) {
927 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
928 EmitUint8(0x66);
929 EmitUint8(0x0F);
930 EmitUint8(0x6F);
931 EmitXmmRegisterOperand(dst, src);
932 }
933
934
movdqa(XmmRegister dst,const Address & src)935 void X86Assembler::movdqa(XmmRegister dst, const Address& src) {
936 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
937 EmitUint8(0x66);
938 EmitUint8(0x0F);
939 EmitUint8(0x6F);
940 EmitOperand(dst, src);
941 }
942
943
movdqu(XmmRegister dst,const Address & src)944 void X86Assembler::movdqu(XmmRegister dst, const Address& src) {
945 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
946 EmitUint8(0xF3);
947 EmitUint8(0x0F);
948 EmitUint8(0x6F);
949 EmitOperand(dst, src);
950 }
951
952
movdqa(const Address & dst,XmmRegister src)953 void X86Assembler::movdqa(const Address& dst, XmmRegister src) {
954 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
955 EmitUint8(0x66);
956 EmitUint8(0x0F);
957 EmitUint8(0x7F);
958 EmitOperand(src, dst);
959 }
960
961
movdqu(const Address & dst,XmmRegister src)962 void X86Assembler::movdqu(const Address& dst, XmmRegister src) {
963 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
964 EmitUint8(0xF3);
965 EmitUint8(0x0F);
966 EmitUint8(0x7F);
967 EmitOperand(src, dst);
968 }
969
970
paddb(XmmRegister dst,XmmRegister src)971 void X86Assembler::paddb(XmmRegister dst, XmmRegister src) {
972 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
973 EmitUint8(0x66);
974 EmitUint8(0x0F);
975 EmitUint8(0xFC);
976 EmitXmmRegisterOperand(dst, src);
977 }
978
979
psubb(XmmRegister dst,XmmRegister src)980 void X86Assembler::psubb(XmmRegister dst, XmmRegister src) {
981 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
982 EmitUint8(0x66);
983 EmitUint8(0x0F);
984 EmitUint8(0xF8);
985 EmitXmmRegisterOperand(dst, src);
986 }
987
988
paddw(XmmRegister dst,XmmRegister src)989 void X86Assembler::paddw(XmmRegister dst, XmmRegister src) {
990 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
991 EmitUint8(0x66);
992 EmitUint8(0x0F);
993 EmitUint8(0xFD);
994 EmitXmmRegisterOperand(dst, src);
995 }
996
997
psubw(XmmRegister dst,XmmRegister src)998 void X86Assembler::psubw(XmmRegister dst, XmmRegister src) {
999 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1000 EmitUint8(0x66);
1001 EmitUint8(0x0F);
1002 EmitUint8(0xF9);
1003 EmitXmmRegisterOperand(dst, src);
1004 }
1005
1006
pmullw(XmmRegister dst,XmmRegister src)1007 void X86Assembler::pmullw(XmmRegister dst, XmmRegister src) {
1008 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1009 EmitUint8(0x66);
1010 EmitUint8(0x0F);
1011 EmitUint8(0xD5);
1012 EmitXmmRegisterOperand(dst, src);
1013 }
1014
1015
paddd(XmmRegister dst,XmmRegister src)1016 void X86Assembler::paddd(XmmRegister dst, XmmRegister src) {
1017 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1018 EmitUint8(0x66);
1019 EmitUint8(0x0F);
1020 EmitUint8(0xFE);
1021 EmitXmmRegisterOperand(dst, src);
1022 }
1023
1024
psubd(XmmRegister dst,XmmRegister src)1025 void X86Assembler::psubd(XmmRegister dst, XmmRegister src) {
1026 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1027 EmitUint8(0x66);
1028 EmitUint8(0x0F);
1029 EmitUint8(0xFA);
1030 EmitXmmRegisterOperand(dst, src);
1031 }
1032
1033
pmulld(XmmRegister dst,XmmRegister src)1034 void X86Assembler::pmulld(XmmRegister dst, XmmRegister src) {
1035 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1036 EmitUint8(0x66);
1037 EmitUint8(0x0F);
1038 EmitUint8(0x38);
1039 EmitUint8(0x40);
1040 EmitXmmRegisterOperand(dst, src);
1041 }
1042
1043
paddq(XmmRegister dst,XmmRegister src)1044 void X86Assembler::paddq(XmmRegister dst, XmmRegister src) {
1045 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1046 EmitUint8(0x66);
1047 EmitUint8(0x0F);
1048 EmitUint8(0xD4);
1049 EmitXmmRegisterOperand(dst, src);
1050 }
1051
1052
psubq(XmmRegister dst,XmmRegister src)1053 void X86Assembler::psubq(XmmRegister dst, XmmRegister src) {
1054 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1055 EmitUint8(0x66);
1056 EmitUint8(0x0F);
1057 EmitUint8(0xFB);
1058 EmitXmmRegisterOperand(dst, src);
1059 }
1060
1061
paddusb(XmmRegister dst,XmmRegister src)1062 void X86Assembler::paddusb(XmmRegister dst, XmmRegister src) {
1063 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1064 EmitUint8(0x66);
1065 EmitUint8(0x0F);
1066 EmitUint8(0xDC);
1067 EmitXmmRegisterOperand(dst, src);
1068 }
1069
1070
paddsb(XmmRegister dst,XmmRegister src)1071 void X86Assembler::paddsb(XmmRegister dst, XmmRegister src) {
1072 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1073 EmitUint8(0x66);
1074 EmitUint8(0x0F);
1075 EmitUint8(0xEC);
1076 EmitXmmRegisterOperand(dst, src);
1077 }
1078
1079
paddusw(XmmRegister dst,XmmRegister src)1080 void X86Assembler::paddusw(XmmRegister dst, XmmRegister src) {
1081 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1082 EmitUint8(0x66);
1083 EmitUint8(0x0F);
1084 EmitUint8(0xDD);
1085 EmitXmmRegisterOperand(dst, src);
1086 }
1087
1088
paddsw(XmmRegister dst,XmmRegister src)1089 void X86Assembler::paddsw(XmmRegister dst, XmmRegister src) {
1090 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1091 EmitUint8(0x66);
1092 EmitUint8(0x0F);
1093 EmitUint8(0xED);
1094 EmitXmmRegisterOperand(dst, src);
1095 }
1096
1097
psubusb(XmmRegister dst,XmmRegister src)1098 void X86Assembler::psubusb(XmmRegister dst, XmmRegister src) {
1099 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1100 EmitUint8(0x66);
1101 EmitUint8(0x0F);
1102 EmitUint8(0xD8);
1103 EmitXmmRegisterOperand(dst, src);
1104 }
1105
1106
psubsb(XmmRegister dst,XmmRegister src)1107 void X86Assembler::psubsb(XmmRegister dst, XmmRegister src) {
1108 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1109 EmitUint8(0x66);
1110 EmitUint8(0x0F);
1111 EmitUint8(0xE8);
1112 EmitXmmRegisterOperand(dst, src);
1113 }
1114
1115
psubusw(XmmRegister dst,XmmRegister src)1116 void X86Assembler::psubusw(XmmRegister dst, XmmRegister src) {
1117 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1118 EmitUint8(0x66);
1119 EmitUint8(0x0F);
1120 EmitUint8(0xD9);
1121 EmitXmmRegisterOperand(dst, src);
1122 }
1123
1124
psubsw(XmmRegister dst,XmmRegister src)1125 void X86Assembler::psubsw(XmmRegister dst, XmmRegister src) {
1126 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1127 EmitUint8(0x66);
1128 EmitUint8(0x0F);
1129 EmitUint8(0xE9);
1130 EmitXmmRegisterOperand(dst, src);
1131 }
1132
1133
cvtsi2ss(XmmRegister dst,Register src)1134 void X86Assembler::cvtsi2ss(XmmRegister dst, Register src) {
1135 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1136 EmitUint8(0xF3);
1137 EmitUint8(0x0F);
1138 EmitUint8(0x2A);
1139 EmitOperand(dst, Operand(src));
1140 }
1141
1142
cvtsi2sd(XmmRegister dst,Register src)1143 void X86Assembler::cvtsi2sd(XmmRegister dst, Register src) {
1144 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1145 EmitUint8(0xF2);
1146 EmitUint8(0x0F);
1147 EmitUint8(0x2A);
1148 EmitOperand(dst, Operand(src));
1149 }
1150
1151
cvtss2si(Register dst,XmmRegister src)1152 void X86Assembler::cvtss2si(Register dst, XmmRegister src) {
1153 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1154 EmitUint8(0xF3);
1155 EmitUint8(0x0F);
1156 EmitUint8(0x2D);
1157 EmitXmmRegisterOperand(dst, src);
1158 }
1159
1160
cvtss2sd(XmmRegister dst,XmmRegister src)1161 void X86Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) {
1162 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1163 EmitUint8(0xF3);
1164 EmitUint8(0x0F);
1165 EmitUint8(0x5A);
1166 EmitXmmRegisterOperand(dst, src);
1167 }
1168
1169
cvtsd2si(Register dst,XmmRegister src)1170 void X86Assembler::cvtsd2si(Register dst, XmmRegister src) {
1171 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1172 EmitUint8(0xF2);
1173 EmitUint8(0x0F);
1174 EmitUint8(0x2D);
1175 EmitXmmRegisterOperand(dst, src);
1176 }
1177
1178
cvttss2si(Register dst,XmmRegister src)1179 void X86Assembler::cvttss2si(Register dst, XmmRegister src) {
1180 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1181 EmitUint8(0xF3);
1182 EmitUint8(0x0F);
1183 EmitUint8(0x2C);
1184 EmitXmmRegisterOperand(dst, src);
1185 }
1186
1187
cvttsd2si(Register dst,XmmRegister src)1188 void X86Assembler::cvttsd2si(Register dst, XmmRegister src) {
1189 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1190 EmitUint8(0xF2);
1191 EmitUint8(0x0F);
1192 EmitUint8(0x2C);
1193 EmitXmmRegisterOperand(dst, src);
1194 }
1195
1196
cvtsd2ss(XmmRegister dst,XmmRegister src)1197 void X86Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) {
1198 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1199 EmitUint8(0xF2);
1200 EmitUint8(0x0F);
1201 EmitUint8(0x5A);
1202 EmitXmmRegisterOperand(dst, src);
1203 }
1204
1205
cvtdq2ps(XmmRegister dst,XmmRegister src)1206 void X86Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) {
1207 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1208 EmitUint8(0x0F);
1209 EmitUint8(0x5B);
1210 EmitXmmRegisterOperand(dst, src);
1211 }
1212
1213
cvtdq2pd(XmmRegister dst,XmmRegister src)1214 void X86Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) {
1215 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1216 EmitUint8(0xF3);
1217 EmitUint8(0x0F);
1218 EmitUint8(0xE6);
1219 EmitXmmRegisterOperand(dst, src);
1220 }
1221
1222
comiss(XmmRegister a,XmmRegister b)1223 void X86Assembler::comiss(XmmRegister a, XmmRegister b) {
1224 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1225 EmitUint8(0x0F);
1226 EmitUint8(0x2F);
1227 EmitXmmRegisterOperand(a, b);
1228 }
1229
1230
comiss(XmmRegister a,const Address & b)1231 void X86Assembler::comiss(XmmRegister a, const Address& b) {
1232 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1233 EmitUint8(0x0F);
1234 EmitUint8(0x2F);
1235 EmitOperand(a, b);
1236 }
1237
1238
comisd(XmmRegister a,XmmRegister b)1239 void X86Assembler::comisd(XmmRegister a, XmmRegister b) {
1240 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1241 EmitUint8(0x66);
1242 EmitUint8(0x0F);
1243 EmitUint8(0x2F);
1244 EmitXmmRegisterOperand(a, b);
1245 }
1246
1247
comisd(XmmRegister a,const Address & b)1248 void X86Assembler::comisd(XmmRegister a, const Address& b) {
1249 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1250 EmitUint8(0x66);
1251 EmitUint8(0x0F);
1252 EmitUint8(0x2F);
1253 EmitOperand(a, b);
1254 }
1255
1256
ucomiss(XmmRegister a,XmmRegister b)1257 void X86Assembler::ucomiss(XmmRegister a, XmmRegister b) {
1258 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1259 EmitUint8(0x0F);
1260 EmitUint8(0x2E);
1261 EmitXmmRegisterOperand(a, b);
1262 }
1263
1264
ucomiss(XmmRegister a,const Address & b)1265 void X86Assembler::ucomiss(XmmRegister a, const Address& b) {
1266 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1267 EmitUint8(0x0F);
1268 EmitUint8(0x2E);
1269 EmitOperand(a, b);
1270 }
1271
1272
ucomisd(XmmRegister a,XmmRegister b)1273 void X86Assembler::ucomisd(XmmRegister a, XmmRegister b) {
1274 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1275 EmitUint8(0x66);
1276 EmitUint8(0x0F);
1277 EmitUint8(0x2E);
1278 EmitXmmRegisterOperand(a, b);
1279 }
1280
1281
ucomisd(XmmRegister a,const Address & b)1282 void X86Assembler::ucomisd(XmmRegister a, const Address& b) {
1283 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1284 EmitUint8(0x66);
1285 EmitUint8(0x0F);
1286 EmitUint8(0x2E);
1287 EmitOperand(a, b);
1288 }
1289
1290
roundsd(XmmRegister dst,XmmRegister src,const Immediate & imm)1291 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1292 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1293 EmitUint8(0x66);
1294 EmitUint8(0x0F);
1295 EmitUint8(0x3A);
1296 EmitUint8(0x0B);
1297 EmitXmmRegisterOperand(dst, src);
1298 EmitUint8(imm.value());
1299 }
1300
1301
roundss(XmmRegister dst,XmmRegister src,const Immediate & imm)1302 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1303 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1304 EmitUint8(0x66);
1305 EmitUint8(0x0F);
1306 EmitUint8(0x3A);
1307 EmitUint8(0x0A);
1308 EmitXmmRegisterOperand(dst, src);
1309 EmitUint8(imm.value());
1310 }
1311
1312
sqrtsd(XmmRegister dst,XmmRegister src)1313 void X86Assembler::sqrtsd(XmmRegister dst, XmmRegister src) {
1314 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1315 EmitUint8(0xF2);
1316 EmitUint8(0x0F);
1317 EmitUint8(0x51);
1318 EmitXmmRegisterOperand(dst, src);
1319 }
1320
1321
sqrtss(XmmRegister dst,XmmRegister src)1322 void X86Assembler::sqrtss(XmmRegister dst, XmmRegister src) {
1323 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1324 EmitUint8(0xF3);
1325 EmitUint8(0x0F);
1326 EmitUint8(0x51);
1327 EmitXmmRegisterOperand(dst, src);
1328 }
1329
1330
xorpd(XmmRegister dst,const Address & src)1331 void X86Assembler::xorpd(XmmRegister dst, const Address& src) {
1332 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1333 EmitUint8(0x66);
1334 EmitUint8(0x0F);
1335 EmitUint8(0x57);
1336 EmitOperand(dst, src);
1337 }
1338
1339
xorpd(XmmRegister dst,XmmRegister src)1340 void X86Assembler::xorpd(XmmRegister dst, XmmRegister src) {
1341 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1342 EmitUint8(0x66);
1343 EmitUint8(0x0F);
1344 EmitUint8(0x57);
1345 EmitXmmRegisterOperand(dst, src);
1346 }
1347
1348
xorps(XmmRegister dst,const Address & src)1349 void X86Assembler::xorps(XmmRegister dst, const Address& src) {
1350 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1351 EmitUint8(0x0F);
1352 EmitUint8(0x57);
1353 EmitOperand(dst, src);
1354 }
1355
1356
xorps(XmmRegister dst,XmmRegister src)1357 void X86Assembler::xorps(XmmRegister dst, XmmRegister src) {
1358 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1359 EmitUint8(0x0F);
1360 EmitUint8(0x57);
1361 EmitXmmRegisterOperand(dst, src);
1362 }
1363
1364
pxor(XmmRegister dst,XmmRegister src)1365 void X86Assembler::pxor(XmmRegister dst, XmmRegister src) {
1366 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1367 EmitUint8(0x66);
1368 EmitUint8(0x0F);
1369 EmitUint8(0xEF);
1370 EmitXmmRegisterOperand(dst, src);
1371 }
1372
1373
andpd(XmmRegister dst,XmmRegister src)1374 void X86Assembler::andpd(XmmRegister dst, XmmRegister src) {
1375 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1376 EmitUint8(0x66);
1377 EmitUint8(0x0F);
1378 EmitUint8(0x54);
1379 EmitXmmRegisterOperand(dst, src);
1380 }
1381
1382
andpd(XmmRegister dst,const Address & src)1383 void X86Assembler::andpd(XmmRegister dst, const Address& src) {
1384 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1385 EmitUint8(0x66);
1386 EmitUint8(0x0F);
1387 EmitUint8(0x54);
1388 EmitOperand(dst, src);
1389 }
1390
1391
andps(XmmRegister dst,XmmRegister src)1392 void X86Assembler::andps(XmmRegister dst, XmmRegister src) {
1393 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1394 EmitUint8(0x0F);
1395 EmitUint8(0x54);
1396 EmitXmmRegisterOperand(dst, src);
1397 }
1398
1399
andps(XmmRegister dst,const Address & src)1400 void X86Assembler::andps(XmmRegister dst, const Address& src) {
1401 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1402 EmitUint8(0x0F);
1403 EmitUint8(0x54);
1404 EmitOperand(dst, src);
1405 }
1406
1407
pand(XmmRegister dst,XmmRegister src)1408 void X86Assembler::pand(XmmRegister dst, XmmRegister src) {
1409 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1410 EmitUint8(0x66);
1411 EmitUint8(0x0F);
1412 EmitUint8(0xDB);
1413 EmitXmmRegisterOperand(dst, src);
1414 }
1415
andn(Register dst,Register src1,Register src2)1416 void X86Assembler::andn(Register dst, Register src1, Register src2) {
1417 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1418 uint8_t byte_zero = EmitVexByteZero(/*is_two_byte=*/ false);
1419 uint8_t byte_one = EmitVexByte1(/*r=*/ false,
1420 /*x=*/ false,
1421 /*b=*/ false,
1422 /*mmmmm=*/ 2);
1423 uint8_t byte_two = EmitVexByte2(/*w=*/ false,
1424 /*l=*/ 128,
1425 X86ManagedRegister::FromCpuRegister(src1),
1426 /*pp=*/ 0);
1427 EmitUint8(byte_zero);
1428 EmitUint8(byte_one);
1429 EmitUint8(byte_two);
1430 // Opcode field
1431 EmitUint8(0xF2);
1432 EmitRegisterOperand(dst, src2);
1433 }
1434
1435
andnpd(XmmRegister dst,XmmRegister src)1436 void X86Assembler::andnpd(XmmRegister dst, XmmRegister src) {
1437 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1438 EmitUint8(0x66);
1439 EmitUint8(0x0F);
1440 EmitUint8(0x55);
1441 EmitXmmRegisterOperand(dst, src);
1442 }
1443
1444
andnps(XmmRegister dst,XmmRegister src)1445 void X86Assembler::andnps(XmmRegister dst, XmmRegister src) {
1446 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1447 EmitUint8(0x0F);
1448 EmitUint8(0x55);
1449 EmitXmmRegisterOperand(dst, src);
1450 }
1451
1452
pandn(XmmRegister dst,XmmRegister src)1453 void X86Assembler::pandn(XmmRegister dst, XmmRegister src) {
1454 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1455 EmitUint8(0x66);
1456 EmitUint8(0x0F);
1457 EmitUint8(0xDF);
1458 EmitXmmRegisterOperand(dst, src);
1459 }
1460
1461
orpd(XmmRegister dst,XmmRegister src)1462 void X86Assembler::orpd(XmmRegister dst, XmmRegister src) {
1463 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1464 EmitUint8(0x66);
1465 EmitUint8(0x0F);
1466 EmitUint8(0x56);
1467 EmitXmmRegisterOperand(dst, src);
1468 }
1469
1470
orps(XmmRegister dst,XmmRegister src)1471 void X86Assembler::orps(XmmRegister dst, XmmRegister src) {
1472 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1473 EmitUint8(0x0F);
1474 EmitUint8(0x56);
1475 EmitXmmRegisterOperand(dst, src);
1476 }
1477
1478
por(XmmRegister dst,XmmRegister src)1479 void X86Assembler::por(XmmRegister dst, XmmRegister src) {
1480 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1481 EmitUint8(0x66);
1482 EmitUint8(0x0F);
1483 EmitUint8(0xEB);
1484 EmitXmmRegisterOperand(dst, src);
1485 }
1486
1487
pavgb(XmmRegister dst,XmmRegister src)1488 void X86Assembler::pavgb(XmmRegister dst, XmmRegister src) {
1489 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1490 EmitUint8(0x66);
1491 EmitUint8(0x0F);
1492 EmitUint8(0xE0);
1493 EmitXmmRegisterOperand(dst, src);
1494 }
1495
1496
pavgw(XmmRegister dst,XmmRegister src)1497 void X86Assembler::pavgw(XmmRegister dst, XmmRegister src) {
1498 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1499 EmitUint8(0x66);
1500 EmitUint8(0x0F);
1501 EmitUint8(0xE3);
1502 EmitXmmRegisterOperand(dst, src);
1503 }
1504
1505
psadbw(XmmRegister dst,XmmRegister src)1506 void X86Assembler::psadbw(XmmRegister dst, XmmRegister src) {
1507 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1508 EmitUint8(0x66);
1509 EmitUint8(0x0F);
1510 EmitUint8(0xF6);
1511 EmitXmmRegisterOperand(dst, src);
1512 }
1513
1514
pmaddwd(XmmRegister dst,XmmRegister src)1515 void X86Assembler::pmaddwd(XmmRegister dst, XmmRegister src) {
1516 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1517 EmitUint8(0x66);
1518 EmitUint8(0x0F);
1519 EmitUint8(0xF5);
1520 EmitXmmRegisterOperand(dst, src);
1521 }
1522
1523
phaddw(XmmRegister dst,XmmRegister src)1524 void X86Assembler::phaddw(XmmRegister dst, XmmRegister src) {
1525 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1526 EmitUint8(0x66);
1527 EmitUint8(0x0F);
1528 EmitUint8(0x38);
1529 EmitUint8(0x01);
1530 EmitXmmRegisterOperand(dst, src);
1531 }
1532
1533
phaddd(XmmRegister dst,XmmRegister src)1534 void X86Assembler::phaddd(XmmRegister dst, XmmRegister src) {
1535 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1536 EmitUint8(0x66);
1537 EmitUint8(0x0F);
1538 EmitUint8(0x38);
1539 EmitUint8(0x02);
1540 EmitXmmRegisterOperand(dst, src);
1541 }
1542
1543
haddps(XmmRegister dst,XmmRegister src)1544 void X86Assembler::haddps(XmmRegister dst, XmmRegister src) {
1545 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1546 EmitUint8(0xF2);
1547 EmitUint8(0x0F);
1548 EmitUint8(0x7C);
1549 EmitXmmRegisterOperand(dst, src);
1550 }
1551
1552
haddpd(XmmRegister dst,XmmRegister src)1553 void X86Assembler::haddpd(XmmRegister dst, XmmRegister src) {
1554 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1555 EmitUint8(0x66);
1556 EmitUint8(0x0F);
1557 EmitUint8(0x7C);
1558 EmitXmmRegisterOperand(dst, src);
1559 }
1560
1561
phsubw(XmmRegister dst,XmmRegister src)1562 void X86Assembler::phsubw(XmmRegister dst, XmmRegister src) {
1563 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1564 EmitUint8(0x66);
1565 EmitUint8(0x0F);
1566 EmitUint8(0x38);
1567 EmitUint8(0x05);
1568 EmitXmmRegisterOperand(dst, src);
1569 }
1570
1571
phsubd(XmmRegister dst,XmmRegister src)1572 void X86Assembler::phsubd(XmmRegister dst, XmmRegister src) {
1573 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1574 EmitUint8(0x66);
1575 EmitUint8(0x0F);
1576 EmitUint8(0x38);
1577 EmitUint8(0x06);
1578 EmitXmmRegisterOperand(dst, src);
1579 }
1580
1581
hsubps(XmmRegister dst,XmmRegister src)1582 void X86Assembler::hsubps(XmmRegister dst, XmmRegister src) {
1583 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1584 EmitUint8(0xF2);
1585 EmitUint8(0x0F);
1586 EmitUint8(0x7D);
1587 EmitXmmRegisterOperand(dst, src);
1588 }
1589
1590
hsubpd(XmmRegister dst,XmmRegister src)1591 void X86Assembler::hsubpd(XmmRegister dst, XmmRegister src) {
1592 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1593 EmitUint8(0x66);
1594 EmitUint8(0x0F);
1595 EmitUint8(0x7D);
1596 EmitXmmRegisterOperand(dst, src);
1597 }
1598
1599
pminsb(XmmRegister dst,XmmRegister src)1600 void X86Assembler::pminsb(XmmRegister dst, XmmRegister src) {
1601 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1602 EmitUint8(0x66);
1603 EmitUint8(0x0F);
1604 EmitUint8(0x38);
1605 EmitUint8(0x38);
1606 EmitXmmRegisterOperand(dst, src);
1607 }
1608
pmaxsb(XmmRegister dst,XmmRegister src)1609 void X86Assembler::pmaxsb(XmmRegister dst, XmmRegister src) {
1610 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1611 EmitUint8(0x66);
1612 EmitUint8(0x0F);
1613 EmitUint8(0x38);
1614 EmitUint8(0x3C);
1615 EmitXmmRegisterOperand(dst, src);
1616 }
1617
pminsw(XmmRegister dst,XmmRegister src)1618 void X86Assembler::pminsw(XmmRegister dst, XmmRegister src) {
1619 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1620 EmitUint8(0x66);
1621 EmitUint8(0x0F);
1622 EmitUint8(0xEA);
1623 EmitXmmRegisterOperand(dst, src);
1624 }
1625
pmaxsw(XmmRegister dst,XmmRegister src)1626 void X86Assembler::pmaxsw(XmmRegister dst, XmmRegister src) {
1627 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1628 EmitUint8(0x66);
1629 EmitUint8(0x0F);
1630 EmitUint8(0xEE);
1631 EmitXmmRegisterOperand(dst, src);
1632 }
1633
pminsd(XmmRegister dst,XmmRegister src)1634 void X86Assembler::pminsd(XmmRegister dst, XmmRegister src) {
1635 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1636 EmitUint8(0x66);
1637 EmitUint8(0x0F);
1638 EmitUint8(0x38);
1639 EmitUint8(0x39);
1640 EmitXmmRegisterOperand(dst, src);
1641 }
1642
pmaxsd(XmmRegister dst,XmmRegister src)1643 void X86Assembler::pmaxsd(XmmRegister dst, XmmRegister src) {
1644 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1645 EmitUint8(0x66);
1646 EmitUint8(0x0F);
1647 EmitUint8(0x38);
1648 EmitUint8(0x3D);
1649 EmitXmmRegisterOperand(dst, src);
1650 }
1651
pminub(XmmRegister dst,XmmRegister src)1652 void X86Assembler::pminub(XmmRegister dst, XmmRegister src) {
1653 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1654 EmitUint8(0x66);
1655 EmitUint8(0x0F);
1656 EmitUint8(0xDA);
1657 EmitXmmRegisterOperand(dst, src);
1658 }
1659
pmaxub(XmmRegister dst,XmmRegister src)1660 void X86Assembler::pmaxub(XmmRegister dst, XmmRegister src) {
1661 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1662 EmitUint8(0x66);
1663 EmitUint8(0x0F);
1664 EmitUint8(0xDE);
1665 EmitXmmRegisterOperand(dst, src);
1666 }
1667
pminuw(XmmRegister dst,XmmRegister src)1668 void X86Assembler::pminuw(XmmRegister dst, XmmRegister src) {
1669 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1670 EmitUint8(0x66);
1671 EmitUint8(0x0F);
1672 EmitUint8(0x38);
1673 EmitUint8(0x3A);
1674 EmitXmmRegisterOperand(dst, src);
1675 }
1676
pmaxuw(XmmRegister dst,XmmRegister src)1677 void X86Assembler::pmaxuw(XmmRegister dst, XmmRegister src) {
1678 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1679 EmitUint8(0x66);
1680 EmitUint8(0x0F);
1681 EmitUint8(0x38);
1682 EmitUint8(0x3E);
1683 EmitXmmRegisterOperand(dst, src);
1684 }
1685
pminud(XmmRegister dst,XmmRegister src)1686 void X86Assembler::pminud(XmmRegister dst, XmmRegister src) {
1687 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1688 EmitUint8(0x66);
1689 EmitUint8(0x0F);
1690 EmitUint8(0x38);
1691 EmitUint8(0x3B);
1692 EmitXmmRegisterOperand(dst, src);
1693 }
1694
pmaxud(XmmRegister dst,XmmRegister src)1695 void X86Assembler::pmaxud(XmmRegister dst, XmmRegister src) {
1696 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1697 EmitUint8(0x66);
1698 EmitUint8(0x0F);
1699 EmitUint8(0x38);
1700 EmitUint8(0x3F);
1701 EmitXmmRegisterOperand(dst, src);
1702 }
1703
minps(XmmRegister dst,XmmRegister src)1704 void X86Assembler::minps(XmmRegister dst, XmmRegister src) {
1705 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1706 EmitUint8(0x0F);
1707 EmitUint8(0x5D);
1708 EmitXmmRegisterOperand(dst, src);
1709 }
1710
maxps(XmmRegister dst,XmmRegister src)1711 void X86Assembler::maxps(XmmRegister dst, XmmRegister src) {
1712 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1713 EmitUint8(0x0F);
1714 EmitUint8(0x5F);
1715 EmitXmmRegisterOperand(dst, src);
1716 }
1717
minpd(XmmRegister dst,XmmRegister src)1718 void X86Assembler::minpd(XmmRegister dst, XmmRegister src) {
1719 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1720 EmitUint8(0x66);
1721 EmitUint8(0x0F);
1722 EmitUint8(0x5D);
1723 EmitXmmRegisterOperand(dst, src);
1724 }
1725
maxpd(XmmRegister dst,XmmRegister src)1726 void X86Assembler::maxpd(XmmRegister dst, XmmRegister src) {
1727 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1728 EmitUint8(0x66);
1729 EmitUint8(0x0F);
1730 EmitUint8(0x5F);
1731 EmitXmmRegisterOperand(dst, src);
1732 }
1733
pcmpeqb(XmmRegister dst,XmmRegister src)1734 void X86Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) {
1735 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1736 EmitUint8(0x66);
1737 EmitUint8(0x0F);
1738 EmitUint8(0x74);
1739 EmitXmmRegisterOperand(dst, src);
1740 }
1741
1742
pcmpeqw(XmmRegister dst,XmmRegister src)1743 void X86Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) {
1744 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1745 EmitUint8(0x66);
1746 EmitUint8(0x0F);
1747 EmitUint8(0x75);
1748 EmitXmmRegisterOperand(dst, src);
1749 }
1750
1751
pcmpeqd(XmmRegister dst,XmmRegister src)1752 void X86Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) {
1753 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1754 EmitUint8(0x66);
1755 EmitUint8(0x0F);
1756 EmitUint8(0x76);
1757 EmitXmmRegisterOperand(dst, src);
1758 }
1759
1760
pcmpeqq(XmmRegister dst,XmmRegister src)1761 void X86Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) {
1762 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1763 EmitUint8(0x66);
1764 EmitUint8(0x0F);
1765 EmitUint8(0x38);
1766 EmitUint8(0x29);
1767 EmitXmmRegisterOperand(dst, src);
1768 }
1769
1770
pcmpgtb(XmmRegister dst,XmmRegister src)1771 void X86Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) {
1772 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1773 EmitUint8(0x66);
1774 EmitUint8(0x0F);
1775 EmitUint8(0x64);
1776 EmitXmmRegisterOperand(dst, src);
1777 }
1778
1779
pcmpgtw(XmmRegister dst,XmmRegister src)1780 void X86Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) {
1781 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1782 EmitUint8(0x66);
1783 EmitUint8(0x0F);
1784 EmitUint8(0x65);
1785 EmitXmmRegisterOperand(dst, src);
1786 }
1787
1788
pcmpgtd(XmmRegister dst,XmmRegister src)1789 void X86Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) {
1790 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1791 EmitUint8(0x66);
1792 EmitUint8(0x0F);
1793 EmitUint8(0x66);
1794 EmitXmmRegisterOperand(dst, src);
1795 }
1796
1797
pcmpgtq(XmmRegister dst,XmmRegister src)1798 void X86Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) {
1799 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1800 EmitUint8(0x66);
1801 EmitUint8(0x0F);
1802 EmitUint8(0x38);
1803 EmitUint8(0x37);
1804 EmitXmmRegisterOperand(dst, src);
1805 }
1806
1807
shufpd(XmmRegister dst,XmmRegister src,const Immediate & imm)1808 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1809 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1810 EmitUint8(0x66);
1811 EmitUint8(0x0F);
1812 EmitUint8(0xC6);
1813 EmitXmmRegisterOperand(dst, src);
1814 EmitUint8(imm.value());
1815 }
1816
1817
shufps(XmmRegister dst,XmmRegister src,const Immediate & imm)1818 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1819 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1820 EmitUint8(0x0F);
1821 EmitUint8(0xC6);
1822 EmitXmmRegisterOperand(dst, src);
1823 EmitUint8(imm.value());
1824 }
1825
1826
pshufd(XmmRegister dst,XmmRegister src,const Immediate & imm)1827 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
1828 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1829 EmitUint8(0x66);
1830 EmitUint8(0x0F);
1831 EmitUint8(0x70);
1832 EmitXmmRegisterOperand(dst, src);
1833 EmitUint8(imm.value());
1834 }
1835
1836
punpcklbw(XmmRegister dst,XmmRegister src)1837 void X86Assembler::punpcklbw(XmmRegister dst, XmmRegister src) {
1838 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1839 EmitUint8(0x66);
1840 EmitUint8(0x0F);
1841 EmitUint8(0x60);
1842 EmitXmmRegisterOperand(dst, src);
1843 }
1844
1845
punpcklwd(XmmRegister dst,XmmRegister src)1846 void X86Assembler::punpcklwd(XmmRegister dst, XmmRegister src) {
1847 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1848 EmitUint8(0x66);
1849 EmitUint8(0x0F);
1850 EmitUint8(0x61);
1851 EmitXmmRegisterOperand(dst, src);
1852 }
1853
1854
punpckldq(XmmRegister dst,XmmRegister src)1855 void X86Assembler::punpckldq(XmmRegister dst, XmmRegister src) {
1856 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1857 EmitUint8(0x66);
1858 EmitUint8(0x0F);
1859 EmitUint8(0x62);
1860 EmitXmmRegisterOperand(dst, src);
1861 }
1862
1863
punpcklqdq(XmmRegister dst,XmmRegister src)1864 void X86Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) {
1865 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1866 EmitUint8(0x66);
1867 EmitUint8(0x0F);
1868 EmitUint8(0x6C);
1869 EmitXmmRegisterOperand(dst, src);
1870 }
1871
1872
punpckhbw(XmmRegister dst,XmmRegister src)1873 void X86Assembler::punpckhbw(XmmRegister dst, XmmRegister src) {
1874 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1875 EmitUint8(0x66);
1876 EmitUint8(0x0F);
1877 EmitUint8(0x68);
1878 EmitXmmRegisterOperand(dst, src);
1879 }
1880
1881
punpckhwd(XmmRegister dst,XmmRegister src)1882 void X86Assembler::punpckhwd(XmmRegister dst, XmmRegister src) {
1883 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1884 EmitUint8(0x66);
1885 EmitUint8(0x0F);
1886 EmitUint8(0x69);
1887 EmitXmmRegisterOperand(dst, src);
1888 }
1889
1890
punpckhdq(XmmRegister dst,XmmRegister src)1891 void X86Assembler::punpckhdq(XmmRegister dst, XmmRegister src) {
1892 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1893 EmitUint8(0x66);
1894 EmitUint8(0x0F);
1895 EmitUint8(0x6A);
1896 EmitXmmRegisterOperand(dst, src);
1897 }
1898
1899
punpckhqdq(XmmRegister dst,XmmRegister src)1900 void X86Assembler::punpckhqdq(XmmRegister dst, XmmRegister src) {
1901 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1902 EmitUint8(0x66);
1903 EmitUint8(0x0F);
1904 EmitUint8(0x6D);
1905 EmitXmmRegisterOperand(dst, src);
1906 }
1907
1908
psllw(XmmRegister reg,const Immediate & shift_count)1909 void X86Assembler::psllw(XmmRegister reg, const Immediate& shift_count) {
1910 DCHECK(shift_count.is_uint8());
1911 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1912 EmitUint8(0x66);
1913 EmitUint8(0x0F);
1914 EmitUint8(0x71);
1915 EmitXmmRegisterOperand(6, reg);
1916 EmitUint8(shift_count.value());
1917 }
1918
1919
pslld(XmmRegister reg,const Immediate & shift_count)1920 void X86Assembler::pslld(XmmRegister reg, const Immediate& shift_count) {
1921 DCHECK(shift_count.is_uint8());
1922 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1923 EmitUint8(0x66);
1924 EmitUint8(0x0F);
1925 EmitUint8(0x72);
1926 EmitXmmRegisterOperand(6, reg);
1927 EmitUint8(shift_count.value());
1928 }
1929
1930
psllq(XmmRegister reg,const Immediate & shift_count)1931 void X86Assembler::psllq(XmmRegister reg, const Immediate& shift_count) {
1932 DCHECK(shift_count.is_uint8());
1933 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1934 EmitUint8(0x66);
1935 EmitUint8(0x0F);
1936 EmitUint8(0x73);
1937 EmitXmmRegisterOperand(6, reg);
1938 EmitUint8(shift_count.value());
1939 }
1940
1941
psraw(XmmRegister reg,const Immediate & shift_count)1942 void X86Assembler::psraw(XmmRegister reg, const Immediate& shift_count) {
1943 DCHECK(shift_count.is_uint8());
1944 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1945 EmitUint8(0x66);
1946 EmitUint8(0x0F);
1947 EmitUint8(0x71);
1948 EmitXmmRegisterOperand(4, reg);
1949 EmitUint8(shift_count.value());
1950 }
1951
1952
psrad(XmmRegister reg,const Immediate & shift_count)1953 void X86Assembler::psrad(XmmRegister reg, const Immediate& shift_count) {
1954 DCHECK(shift_count.is_uint8());
1955 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1956 EmitUint8(0x66);
1957 EmitUint8(0x0F);
1958 EmitUint8(0x72);
1959 EmitXmmRegisterOperand(4, reg);
1960 EmitUint8(shift_count.value());
1961 }
1962
1963
psrlw(XmmRegister reg,const Immediate & shift_count)1964 void X86Assembler::psrlw(XmmRegister reg, const Immediate& shift_count) {
1965 DCHECK(shift_count.is_uint8());
1966 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1967 EmitUint8(0x66);
1968 EmitUint8(0x0F);
1969 EmitUint8(0x71);
1970 EmitXmmRegisterOperand(2, reg);
1971 EmitUint8(shift_count.value());
1972 }
1973
1974
psrld(XmmRegister reg,const Immediate & shift_count)1975 void X86Assembler::psrld(XmmRegister reg, const Immediate& shift_count) {
1976 DCHECK(shift_count.is_uint8());
1977 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1978 EmitUint8(0x66);
1979 EmitUint8(0x0F);
1980 EmitUint8(0x72);
1981 EmitXmmRegisterOperand(2, reg);
1982 EmitUint8(shift_count.value());
1983 }
1984
1985
psrlq(XmmRegister reg,const Immediate & shift_count)1986 void X86Assembler::psrlq(XmmRegister reg, const Immediate& shift_count) {
1987 DCHECK(shift_count.is_uint8());
1988 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
1989 EmitUint8(0x66);
1990 EmitUint8(0x0F);
1991 EmitUint8(0x73);
1992 EmitXmmRegisterOperand(2, reg);
1993 EmitUint8(shift_count.value());
1994 }
1995
1996
psrldq(XmmRegister reg,const Immediate & shift_count)1997 void X86Assembler::psrldq(XmmRegister reg, const Immediate& shift_count) {
1998 DCHECK(shift_count.is_uint8());
1999 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2000 EmitUint8(0x66);
2001 EmitUint8(0x0F);
2002 EmitUint8(0x73);
2003 EmitXmmRegisterOperand(3, reg);
2004 EmitUint8(shift_count.value());
2005 }
2006
2007
fldl(const Address & src)2008 void X86Assembler::fldl(const Address& src) {
2009 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2010 EmitUint8(0xDD);
2011 EmitOperand(0, src);
2012 }
2013
2014
fstl(const Address & dst)2015 void X86Assembler::fstl(const Address& dst) {
2016 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2017 EmitUint8(0xDD);
2018 EmitOperand(2, dst);
2019 }
2020
2021
fstpl(const Address & dst)2022 void X86Assembler::fstpl(const Address& dst) {
2023 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2024 EmitUint8(0xDD);
2025 EmitOperand(3, dst);
2026 }
2027
2028
fstsw()2029 void X86Assembler::fstsw() {
2030 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2031 EmitUint8(0x9B);
2032 EmitUint8(0xDF);
2033 EmitUint8(0xE0);
2034 }
2035
2036
fnstcw(const Address & dst)2037 void X86Assembler::fnstcw(const Address& dst) {
2038 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2039 EmitUint8(0xD9);
2040 EmitOperand(7, dst);
2041 }
2042
2043
fldcw(const Address & src)2044 void X86Assembler::fldcw(const Address& src) {
2045 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2046 EmitUint8(0xD9);
2047 EmitOperand(5, src);
2048 }
2049
2050
fistpl(const Address & dst)2051 void X86Assembler::fistpl(const Address& dst) {
2052 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2053 EmitUint8(0xDF);
2054 EmitOperand(7, dst);
2055 }
2056
2057
fistps(const Address & dst)2058 void X86Assembler::fistps(const Address& dst) {
2059 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2060 EmitUint8(0xDB);
2061 EmitOperand(3, dst);
2062 }
2063
2064
fildl(const Address & src)2065 void X86Assembler::fildl(const Address& src) {
2066 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2067 EmitUint8(0xDF);
2068 EmitOperand(5, src);
2069 }
2070
2071
filds(const Address & src)2072 void X86Assembler::filds(const Address& src) {
2073 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2074 EmitUint8(0xDB);
2075 EmitOperand(0, src);
2076 }
2077
2078
fincstp()2079 void X86Assembler::fincstp() {
2080 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2081 EmitUint8(0xD9);
2082 EmitUint8(0xF7);
2083 }
2084
2085
ffree(const Immediate & index)2086 void X86Assembler::ffree(const Immediate& index) {
2087 CHECK_LT(index.value(), 7);
2088 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2089 EmitUint8(0xDD);
2090 EmitUint8(0xC0 + index.value());
2091 }
2092
2093
fsin()2094 void X86Assembler::fsin() {
2095 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2096 EmitUint8(0xD9);
2097 EmitUint8(0xFE);
2098 }
2099
2100
fcos()2101 void X86Assembler::fcos() {
2102 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2103 EmitUint8(0xD9);
2104 EmitUint8(0xFF);
2105 }
2106
2107
fptan()2108 void X86Assembler::fptan() {
2109 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2110 EmitUint8(0xD9);
2111 EmitUint8(0xF2);
2112 }
2113
2114
fucompp()2115 void X86Assembler::fucompp() {
2116 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2117 EmitUint8(0xDA);
2118 EmitUint8(0xE9);
2119 }
2120
2121
fprem()2122 void X86Assembler::fprem() {
2123 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2124 EmitUint8(0xD9);
2125 EmitUint8(0xF8);
2126 }
2127
2128
xchgl(Register dst,Register src)2129 void X86Assembler::xchgl(Register dst, Register src) {
2130 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2131 EmitUint8(0x87);
2132 EmitRegisterOperand(dst, src);
2133 }
2134
2135
xchgl(Register reg,const Address & address)2136 void X86Assembler::xchgl(Register reg, const Address& address) {
2137 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2138 EmitUint8(0x87);
2139 EmitOperand(reg, address);
2140 }
2141
2142
cmpb(const Address & address,const Immediate & imm)2143 void X86Assembler::cmpb(const Address& address, const Immediate& imm) {
2144 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2145 EmitUint8(0x80);
2146 EmitOperand(7, address);
2147 EmitUint8(imm.value() & 0xFF);
2148 }
2149
2150
cmpw(const Address & address,const Immediate & imm)2151 void X86Assembler::cmpw(const Address& address, const Immediate& imm) {
2152 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2153 EmitUint8(0x66);
2154 EmitComplex(7, address, imm, /* is_16_op= */ true);
2155 }
2156
2157
cmpl(Register reg,const Immediate & imm)2158 void X86Assembler::cmpl(Register reg, const Immediate& imm) {
2159 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2160 EmitComplex(7, Operand(reg), imm);
2161 }
2162
2163
cmpl(Register reg0,Register reg1)2164 void X86Assembler::cmpl(Register reg0, Register reg1) {
2165 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2166 EmitUint8(0x3B);
2167 EmitOperand(reg0, Operand(reg1));
2168 }
2169
2170
cmpl(Register reg,const Address & address)2171 void X86Assembler::cmpl(Register reg, const Address& address) {
2172 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2173 EmitUint8(0x3B);
2174 EmitOperand(reg, address);
2175 }
2176
2177
addl(Register dst,Register src)2178 void X86Assembler::addl(Register dst, Register src) {
2179 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2180 EmitUint8(0x03);
2181 EmitRegisterOperand(dst, src);
2182 }
2183
2184
addl(Register reg,const Address & address)2185 void X86Assembler::addl(Register reg, const Address& address) {
2186 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2187 EmitUint8(0x03);
2188 EmitOperand(reg, address);
2189 }
2190
2191
cmpl(const Address & address,Register reg)2192 void X86Assembler::cmpl(const Address& address, Register reg) {
2193 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2194 EmitUint8(0x39);
2195 EmitOperand(reg, address);
2196 }
2197
2198
cmpl(const Address & address,const Immediate & imm)2199 void X86Assembler::cmpl(const Address& address, const Immediate& imm) {
2200 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2201 EmitComplex(7, address, imm);
2202 }
2203
2204
testl(Register reg1,Register reg2)2205 void X86Assembler::testl(Register reg1, Register reg2) {
2206 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2207 EmitUint8(0x85);
2208 EmitRegisterOperand(reg1, reg2);
2209 }
2210
2211
testl(Register reg,const Address & address)2212 void X86Assembler::testl(Register reg, const Address& address) {
2213 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2214 EmitUint8(0x85);
2215 EmitOperand(reg, address);
2216 }
2217
2218
testl(Register reg,const Immediate & immediate)2219 void X86Assembler::testl(Register reg, const Immediate& immediate) {
2220 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2221 // For registers that have a byte variant (EAX, EBX, ECX, and EDX)
2222 // we only test the byte register to keep the encoding short.
2223 if (immediate.is_uint8() && reg < 4) {
2224 // Use zero-extended 8-bit immediate.
2225 if (reg == EAX) {
2226 EmitUint8(0xA8);
2227 } else {
2228 EmitUint8(0xF6);
2229 EmitUint8(0xC0 + reg);
2230 }
2231 EmitUint8(immediate.value() & 0xFF);
2232 } else if (reg == EAX) {
2233 // Use short form if the destination is EAX.
2234 EmitUint8(0xA9);
2235 EmitImmediate(immediate);
2236 } else {
2237 EmitUint8(0xF7);
2238 EmitOperand(0, Operand(reg));
2239 EmitImmediate(immediate);
2240 }
2241 }
2242
2243
testb(const Address & dst,const Immediate & imm)2244 void X86Assembler::testb(const Address& dst, const Immediate& imm) {
2245 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2246 EmitUint8(0xF6);
2247 EmitOperand(EAX, dst);
2248 CHECK(imm.is_int8());
2249 EmitUint8(imm.value() & 0xFF);
2250 }
2251
2252
testl(const Address & dst,const Immediate & imm)2253 void X86Assembler::testl(const Address& dst, const Immediate& imm) {
2254 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2255 EmitUint8(0xF7);
2256 EmitOperand(0, dst);
2257 EmitImmediate(imm);
2258 }
2259
2260
andl(Register dst,Register src)2261 void X86Assembler::andl(Register dst, Register src) {
2262 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2263 EmitUint8(0x23);
2264 EmitOperand(dst, Operand(src));
2265 }
2266
2267
andl(Register reg,const Address & address)2268 void X86Assembler::andl(Register reg, const Address& address) {
2269 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2270 EmitUint8(0x23);
2271 EmitOperand(reg, address);
2272 }
2273
2274
andl(Register dst,const Immediate & imm)2275 void X86Assembler::andl(Register dst, const Immediate& imm) {
2276 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2277 EmitComplex(4, Operand(dst), imm);
2278 }
2279
2280
orl(Register dst,Register src)2281 void X86Assembler::orl(Register dst, Register src) {
2282 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2283 EmitUint8(0x0B);
2284 EmitOperand(dst, Operand(src));
2285 }
2286
2287
orl(Register reg,const Address & address)2288 void X86Assembler::orl(Register reg, const Address& address) {
2289 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2290 EmitUint8(0x0B);
2291 EmitOperand(reg, address);
2292 }
2293
2294
orl(Register dst,const Immediate & imm)2295 void X86Assembler::orl(Register dst, const Immediate& imm) {
2296 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2297 EmitComplex(1, Operand(dst), imm);
2298 }
2299
2300
xorl(Register dst,Register src)2301 void X86Assembler::xorl(Register dst, Register src) {
2302 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2303 EmitUint8(0x33);
2304 EmitOperand(dst, Operand(src));
2305 }
2306
2307
xorl(Register reg,const Address & address)2308 void X86Assembler::xorl(Register reg, const Address& address) {
2309 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2310 EmitUint8(0x33);
2311 EmitOperand(reg, address);
2312 }
2313
2314
xorl(Register dst,const Immediate & imm)2315 void X86Assembler::xorl(Register dst, const Immediate& imm) {
2316 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2317 EmitComplex(6, Operand(dst), imm);
2318 }
2319
2320
addl(Register reg,const Immediate & imm)2321 void X86Assembler::addl(Register reg, const Immediate& imm) {
2322 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2323 EmitComplex(0, Operand(reg), imm);
2324 }
2325
2326
addl(const Address & address,Register reg)2327 void X86Assembler::addl(const Address& address, Register reg) {
2328 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2329 EmitUint8(0x01);
2330 EmitOperand(reg, address);
2331 }
2332
2333
addl(const Address & address,const Immediate & imm)2334 void X86Assembler::addl(const Address& address, const Immediate& imm) {
2335 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2336 EmitComplex(0, address, imm);
2337 }
2338
2339
addw(const Address & address,const Immediate & imm)2340 void X86Assembler::addw(const Address& address, const Immediate& imm) {
2341 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2342 CHECK(imm.is_uint16() || imm.is_int16()) << imm.value();
2343 EmitUint8(0x66);
2344 EmitComplex(0, address, imm, /* is_16_op= */ true);
2345 }
2346
2347
adcl(Register reg,const Immediate & imm)2348 void X86Assembler::adcl(Register reg, const Immediate& imm) {
2349 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2350 EmitComplex(2, Operand(reg), imm);
2351 }
2352
2353
adcl(Register dst,Register src)2354 void X86Assembler::adcl(Register dst, Register src) {
2355 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2356 EmitUint8(0x13);
2357 EmitOperand(dst, Operand(src));
2358 }
2359
2360
adcl(Register dst,const Address & address)2361 void X86Assembler::adcl(Register dst, const Address& address) {
2362 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2363 EmitUint8(0x13);
2364 EmitOperand(dst, address);
2365 }
2366
2367
subl(Register dst,Register src)2368 void X86Assembler::subl(Register dst, Register src) {
2369 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2370 EmitUint8(0x2B);
2371 EmitOperand(dst, Operand(src));
2372 }
2373
2374
subl(Register reg,const Immediate & imm)2375 void X86Assembler::subl(Register reg, const Immediate& imm) {
2376 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2377 EmitComplex(5, Operand(reg), imm);
2378 }
2379
2380
subl(Register reg,const Address & address)2381 void X86Assembler::subl(Register reg, const Address& address) {
2382 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2383 EmitUint8(0x2B);
2384 EmitOperand(reg, address);
2385 }
2386
2387
subl(const Address & address,Register reg)2388 void X86Assembler::subl(const Address& address, Register reg) {
2389 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2390 EmitUint8(0x29);
2391 EmitOperand(reg, address);
2392 }
2393
2394
cdq()2395 void X86Assembler::cdq() {
2396 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2397 EmitUint8(0x99);
2398 }
2399
2400
idivl(Register reg)2401 void X86Assembler::idivl(Register reg) {
2402 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2403 EmitUint8(0xF7);
2404 EmitUint8(0xF8 | reg);
2405 }
2406
2407
imull(Register dst,Register src)2408 void X86Assembler::imull(Register dst, Register src) {
2409 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2410 EmitUint8(0x0F);
2411 EmitUint8(0xAF);
2412 EmitOperand(dst, Operand(src));
2413 }
2414
2415
imull(Register dst,Register src,const Immediate & imm)2416 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) {
2417 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2418 // See whether imm can be represented as a sign-extended 8bit value.
2419 int32_t v32 = static_cast<int32_t>(imm.value());
2420 if (IsInt<8>(v32)) {
2421 // Sign-extension works.
2422 EmitUint8(0x6B);
2423 EmitOperand(dst, Operand(src));
2424 EmitUint8(static_cast<uint8_t>(v32 & 0xFF));
2425 } else {
2426 // Not representable, use full immediate.
2427 EmitUint8(0x69);
2428 EmitOperand(dst, Operand(src));
2429 EmitImmediate(imm);
2430 }
2431 }
2432
2433
imull(Register reg,const Immediate & imm)2434 void X86Assembler::imull(Register reg, const Immediate& imm) {
2435 imull(reg, reg, imm);
2436 }
2437
2438
imull(Register reg,const Address & address)2439 void X86Assembler::imull(Register reg, const Address& address) {
2440 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2441 EmitUint8(0x0F);
2442 EmitUint8(0xAF);
2443 EmitOperand(reg, address);
2444 }
2445
2446
imull(Register reg)2447 void X86Assembler::imull(Register reg) {
2448 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2449 EmitUint8(0xF7);
2450 EmitOperand(5, Operand(reg));
2451 }
2452
2453
imull(const Address & address)2454 void X86Assembler::imull(const Address& address) {
2455 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2456 EmitUint8(0xF7);
2457 EmitOperand(5, address);
2458 }
2459
2460
mull(Register reg)2461 void X86Assembler::mull(Register reg) {
2462 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2463 EmitUint8(0xF7);
2464 EmitOperand(4, Operand(reg));
2465 }
2466
2467
mull(const Address & address)2468 void X86Assembler::mull(const Address& address) {
2469 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2470 EmitUint8(0xF7);
2471 EmitOperand(4, address);
2472 }
2473
2474
sbbl(Register dst,Register src)2475 void X86Assembler::sbbl(Register dst, Register src) {
2476 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2477 EmitUint8(0x1B);
2478 EmitOperand(dst, Operand(src));
2479 }
2480
2481
sbbl(Register reg,const Immediate & imm)2482 void X86Assembler::sbbl(Register reg, const Immediate& imm) {
2483 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2484 EmitComplex(3, Operand(reg), imm);
2485 }
2486
2487
sbbl(Register dst,const Address & address)2488 void X86Assembler::sbbl(Register dst, const Address& address) {
2489 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2490 EmitUint8(0x1B);
2491 EmitOperand(dst, address);
2492 }
2493
2494
sbbl(const Address & address,Register src)2495 void X86Assembler::sbbl(const Address& address, Register src) {
2496 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2497 EmitUint8(0x19);
2498 EmitOperand(src, address);
2499 }
2500
2501
incl(Register reg)2502 void X86Assembler::incl(Register reg) {
2503 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2504 EmitUint8(0x40 + reg);
2505 }
2506
2507
incl(const Address & address)2508 void X86Assembler::incl(const Address& address) {
2509 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2510 EmitUint8(0xFF);
2511 EmitOperand(0, address);
2512 }
2513
2514
decl(Register reg)2515 void X86Assembler::decl(Register reg) {
2516 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2517 EmitUint8(0x48 + reg);
2518 }
2519
2520
decl(const Address & address)2521 void X86Assembler::decl(const Address& address) {
2522 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2523 EmitUint8(0xFF);
2524 EmitOperand(1, address);
2525 }
2526
2527
shll(Register reg,const Immediate & imm)2528 void X86Assembler::shll(Register reg, const Immediate& imm) {
2529 EmitGenericShift(4, Operand(reg), imm);
2530 }
2531
2532
shll(Register operand,Register shifter)2533 void X86Assembler::shll(Register operand, Register shifter) {
2534 EmitGenericShift(4, Operand(operand), shifter);
2535 }
2536
2537
shll(const Address & address,const Immediate & imm)2538 void X86Assembler::shll(const Address& address, const Immediate& imm) {
2539 EmitGenericShift(4, address, imm);
2540 }
2541
2542
shll(const Address & address,Register shifter)2543 void X86Assembler::shll(const Address& address, Register shifter) {
2544 EmitGenericShift(4, address, shifter);
2545 }
2546
2547
shrl(Register reg,const Immediate & imm)2548 void X86Assembler::shrl(Register reg, const Immediate& imm) {
2549 EmitGenericShift(5, Operand(reg), imm);
2550 }
2551
2552
shrl(Register operand,Register shifter)2553 void X86Assembler::shrl(Register operand, Register shifter) {
2554 EmitGenericShift(5, Operand(operand), shifter);
2555 }
2556
2557
shrl(const Address & address,const Immediate & imm)2558 void X86Assembler::shrl(const Address& address, const Immediate& imm) {
2559 EmitGenericShift(5, address, imm);
2560 }
2561
2562
shrl(const Address & address,Register shifter)2563 void X86Assembler::shrl(const Address& address, Register shifter) {
2564 EmitGenericShift(5, address, shifter);
2565 }
2566
2567
sarl(Register reg,const Immediate & imm)2568 void X86Assembler::sarl(Register reg, const Immediate& imm) {
2569 EmitGenericShift(7, Operand(reg), imm);
2570 }
2571
2572
sarl(Register operand,Register shifter)2573 void X86Assembler::sarl(Register operand, Register shifter) {
2574 EmitGenericShift(7, Operand(operand), shifter);
2575 }
2576
2577
sarl(const Address & address,const Immediate & imm)2578 void X86Assembler::sarl(const Address& address, const Immediate& imm) {
2579 EmitGenericShift(7, address, imm);
2580 }
2581
2582
sarl(const Address & address,Register shifter)2583 void X86Assembler::sarl(const Address& address, Register shifter) {
2584 EmitGenericShift(7, address, shifter);
2585 }
2586
2587
shld(Register dst,Register src,Register shifter)2588 void X86Assembler::shld(Register dst, Register src, Register shifter) {
2589 DCHECK_EQ(ECX, shifter);
2590 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2591 EmitUint8(0x0F);
2592 EmitUint8(0xA5);
2593 EmitRegisterOperand(src, dst);
2594 }
2595
2596
shld(Register dst,Register src,const Immediate & imm)2597 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) {
2598 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2599 EmitUint8(0x0F);
2600 EmitUint8(0xA4);
2601 EmitRegisterOperand(src, dst);
2602 EmitUint8(imm.value() & 0xFF);
2603 }
2604
2605
shrd(Register dst,Register src,Register shifter)2606 void X86Assembler::shrd(Register dst, Register src, Register shifter) {
2607 DCHECK_EQ(ECX, shifter);
2608 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2609 EmitUint8(0x0F);
2610 EmitUint8(0xAD);
2611 EmitRegisterOperand(src, dst);
2612 }
2613
2614
shrd(Register dst,Register src,const Immediate & imm)2615 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) {
2616 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2617 EmitUint8(0x0F);
2618 EmitUint8(0xAC);
2619 EmitRegisterOperand(src, dst);
2620 EmitUint8(imm.value() & 0xFF);
2621 }
2622
2623
roll(Register reg,const Immediate & imm)2624 void X86Assembler::roll(Register reg, const Immediate& imm) {
2625 EmitGenericShift(0, Operand(reg), imm);
2626 }
2627
2628
roll(Register operand,Register shifter)2629 void X86Assembler::roll(Register operand, Register shifter) {
2630 EmitGenericShift(0, Operand(operand), shifter);
2631 }
2632
2633
rorl(Register reg,const Immediate & imm)2634 void X86Assembler::rorl(Register reg, const Immediate& imm) {
2635 EmitGenericShift(1, Operand(reg), imm);
2636 }
2637
2638
rorl(Register operand,Register shifter)2639 void X86Assembler::rorl(Register operand, Register shifter) {
2640 EmitGenericShift(1, Operand(operand), shifter);
2641 }
2642
2643
negl(Register reg)2644 void X86Assembler::negl(Register reg) {
2645 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2646 EmitUint8(0xF7);
2647 EmitOperand(3, Operand(reg));
2648 }
2649
2650
notl(Register reg)2651 void X86Assembler::notl(Register reg) {
2652 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2653 EmitUint8(0xF7);
2654 EmitUint8(0xD0 | reg);
2655 }
2656
2657
enter(const Immediate & imm)2658 void X86Assembler::enter(const Immediate& imm) {
2659 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2660 EmitUint8(0xC8);
2661 CHECK(imm.is_uint16());
2662 EmitUint8(imm.value() & 0xFF);
2663 EmitUint8((imm.value() >> 8) & 0xFF);
2664 EmitUint8(0x00);
2665 }
2666
2667
leave()2668 void X86Assembler::leave() {
2669 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2670 EmitUint8(0xC9);
2671 }
2672
2673
ret()2674 void X86Assembler::ret() {
2675 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2676 EmitUint8(0xC3);
2677 }
2678
2679
ret(const Immediate & imm)2680 void X86Assembler::ret(const Immediate& imm) {
2681 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2682 EmitUint8(0xC2);
2683 CHECK(imm.is_uint16());
2684 EmitUint8(imm.value() & 0xFF);
2685 EmitUint8((imm.value() >> 8) & 0xFF);
2686 }
2687
2688
2689
nop()2690 void X86Assembler::nop() {
2691 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2692 EmitUint8(0x90);
2693 }
2694
2695
int3()2696 void X86Assembler::int3() {
2697 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2698 EmitUint8(0xCC);
2699 }
2700
2701
hlt()2702 void X86Assembler::hlt() {
2703 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2704 EmitUint8(0xF4);
2705 }
2706
2707
j(Condition condition,Label * label)2708 void X86Assembler::j(Condition condition, Label* label) {
2709 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2710 if (label->IsBound()) {
2711 static const int kShortSize = 2;
2712 static const int kLongSize = 6;
2713 int offset = label->Position() - buffer_.Size();
2714 CHECK_LE(offset, 0);
2715 if (IsInt<8>(offset - kShortSize)) {
2716 EmitUint8(0x70 + condition);
2717 EmitUint8((offset - kShortSize) & 0xFF);
2718 } else {
2719 EmitUint8(0x0F);
2720 EmitUint8(0x80 + condition);
2721 EmitInt32(offset - kLongSize);
2722 }
2723 } else {
2724 EmitUint8(0x0F);
2725 EmitUint8(0x80 + condition);
2726 EmitLabelLink(label);
2727 }
2728 }
2729
2730
j(Condition condition,NearLabel * label)2731 void X86Assembler::j(Condition condition, NearLabel* label) {
2732 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2733 if (label->IsBound()) {
2734 static const int kShortSize = 2;
2735 int offset = label->Position() - buffer_.Size();
2736 CHECK_LE(offset, 0);
2737 CHECK(IsInt<8>(offset - kShortSize));
2738 EmitUint8(0x70 + condition);
2739 EmitUint8((offset - kShortSize) & 0xFF);
2740 } else {
2741 EmitUint8(0x70 + condition);
2742 EmitLabelLink(label);
2743 }
2744 }
2745
2746
jecxz(NearLabel * label)2747 void X86Assembler::jecxz(NearLabel* label) {
2748 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2749 if (label->IsBound()) {
2750 static const int kShortSize = 2;
2751 int offset = label->Position() - buffer_.Size();
2752 CHECK_LE(offset, 0);
2753 CHECK(IsInt<8>(offset - kShortSize));
2754 EmitUint8(0xE3);
2755 EmitUint8((offset - kShortSize) & 0xFF);
2756 } else {
2757 EmitUint8(0xE3);
2758 EmitLabelLink(label);
2759 }
2760 }
2761
2762
jmp(Register reg)2763 void X86Assembler::jmp(Register reg) {
2764 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2765 EmitUint8(0xFF);
2766 EmitRegisterOperand(4, reg);
2767 }
2768
jmp(const Address & address)2769 void X86Assembler::jmp(const Address& address) {
2770 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2771 EmitUint8(0xFF);
2772 EmitOperand(4, address);
2773 }
2774
jmp(Label * label)2775 void X86Assembler::jmp(Label* label) {
2776 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2777 if (label->IsBound()) {
2778 static const int kShortSize = 2;
2779 static const int kLongSize = 5;
2780 int offset = label->Position() - buffer_.Size();
2781 CHECK_LE(offset, 0);
2782 if (IsInt<8>(offset - kShortSize)) {
2783 EmitUint8(0xEB);
2784 EmitUint8((offset - kShortSize) & 0xFF);
2785 } else {
2786 EmitUint8(0xE9);
2787 EmitInt32(offset - kLongSize);
2788 }
2789 } else {
2790 EmitUint8(0xE9);
2791 EmitLabelLink(label);
2792 }
2793 }
2794
2795
jmp(NearLabel * label)2796 void X86Assembler::jmp(NearLabel* label) {
2797 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2798 if (label->IsBound()) {
2799 static const int kShortSize = 2;
2800 int offset = label->Position() - buffer_.Size();
2801 CHECK_LE(offset, 0);
2802 CHECK(IsInt<8>(offset - kShortSize));
2803 EmitUint8(0xEB);
2804 EmitUint8((offset - kShortSize) & 0xFF);
2805 } else {
2806 EmitUint8(0xEB);
2807 EmitLabelLink(label);
2808 }
2809 }
2810
2811
repne_scasb()2812 void X86Assembler::repne_scasb() {
2813 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2814 EmitUint8(0xF2);
2815 EmitUint8(0xAE);
2816 }
2817
2818
repne_scasw()2819 void X86Assembler::repne_scasw() {
2820 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2821 EmitUint8(0x66);
2822 EmitUint8(0xF2);
2823 EmitUint8(0xAF);
2824 }
2825
2826
repe_cmpsb()2827 void X86Assembler::repe_cmpsb() {
2828 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2829 EmitUint8(0xF2);
2830 EmitUint8(0xA6);
2831 }
2832
2833
repe_cmpsw()2834 void X86Assembler::repe_cmpsw() {
2835 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2836 EmitUint8(0x66);
2837 EmitUint8(0xF3);
2838 EmitUint8(0xA7);
2839 }
2840
2841
repe_cmpsl()2842 void X86Assembler::repe_cmpsl() {
2843 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2844 EmitUint8(0xF3);
2845 EmitUint8(0xA7);
2846 }
2847
2848
rep_movsb()2849 void X86Assembler::rep_movsb() {
2850 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2851 EmitUint8(0xF3);
2852 EmitUint8(0xA4);
2853 }
2854
2855
rep_movsw()2856 void X86Assembler::rep_movsw() {
2857 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2858 EmitUint8(0x66);
2859 EmitUint8(0xF3);
2860 EmitUint8(0xA5);
2861 }
2862
2863
lock()2864 X86Assembler* X86Assembler::lock() {
2865 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2866 EmitUint8(0xF0);
2867 return this;
2868 }
2869
2870
cmpxchgl(const Address & address,Register reg)2871 void X86Assembler::cmpxchgl(const Address& address, Register reg) {
2872 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2873 EmitUint8(0x0F);
2874 EmitUint8(0xB1);
2875 EmitOperand(reg, address);
2876 }
2877
2878
cmpxchg8b(const Address & address)2879 void X86Assembler::cmpxchg8b(const Address& address) {
2880 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2881 EmitUint8(0x0F);
2882 EmitUint8(0xC7);
2883 EmitOperand(1, address);
2884 }
2885
2886
mfence()2887 void X86Assembler::mfence() {
2888 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2889 EmitUint8(0x0F);
2890 EmitUint8(0xAE);
2891 EmitUint8(0xF0);
2892 }
2893
fs()2894 X86Assembler* X86Assembler::fs() {
2895 // TODO: fs is a prefix and not an instruction
2896 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2897 EmitUint8(0x64);
2898 return this;
2899 }
2900
gs()2901 X86Assembler* X86Assembler::gs() {
2902 // TODO: fs is a prefix and not an instruction
2903 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
2904 EmitUint8(0x65);
2905 return this;
2906 }
2907
AddImmediate(Register reg,const Immediate & imm)2908 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) {
2909 int value = imm.value();
2910 if (value > 0) {
2911 if (value == 1) {
2912 incl(reg);
2913 } else if (value != 0) {
2914 addl(reg, imm);
2915 }
2916 } else if (value < 0) {
2917 value = -value;
2918 if (value == 1) {
2919 decl(reg);
2920 } else if (value != 0) {
2921 subl(reg, Immediate(value));
2922 }
2923 }
2924 }
2925
2926
LoadLongConstant(XmmRegister dst,int64_t value)2927 void X86Assembler::LoadLongConstant(XmmRegister dst, int64_t value) {
2928 // TODO: Need to have a code constants table.
2929 pushl(Immediate(High32Bits(value)));
2930 pushl(Immediate(Low32Bits(value)));
2931 movsd(dst, Address(ESP, 0));
2932 addl(ESP, Immediate(2 * sizeof(int32_t)));
2933 }
2934
2935
LoadDoubleConstant(XmmRegister dst,double value)2936 void X86Assembler::LoadDoubleConstant(XmmRegister dst, double value) {
2937 // TODO: Need to have a code constants table.
2938 int64_t constant = bit_cast<int64_t, double>(value);
2939 LoadLongConstant(dst, constant);
2940 }
2941
2942
Align(int alignment,int offset)2943 void X86Assembler::Align(int alignment, int offset) {
2944 CHECK(IsPowerOfTwo(alignment));
2945 // Emit nop instruction until the real position is aligned.
2946 while (((offset + buffer_.GetPosition()) & (alignment-1)) != 0) {
2947 nop();
2948 }
2949 }
2950
2951
Bind(Label * label)2952 void X86Assembler::Bind(Label* label) {
2953 int bound = buffer_.Size();
2954 CHECK(!label->IsBound()); // Labels can only be bound once.
2955 while (label->IsLinked()) {
2956 int position = label->LinkPosition();
2957 int next = buffer_.Load<int32_t>(position);
2958 buffer_.Store<int32_t>(position, bound - (position + 4));
2959 label->position_ = next;
2960 }
2961 label->BindTo(bound);
2962 }
2963
2964
Bind(NearLabel * label)2965 void X86Assembler::Bind(NearLabel* label) {
2966 int bound = buffer_.Size();
2967 CHECK(!label->IsBound()); // Labels can only be bound once.
2968 while (label->IsLinked()) {
2969 int position = label->LinkPosition();
2970 uint8_t delta = buffer_.Load<uint8_t>(position);
2971 int offset = bound - (position + 1);
2972 CHECK(IsInt<8>(offset));
2973 buffer_.Store<int8_t>(position, offset);
2974 label->position_ = delta != 0u ? label->position_ - delta : 0;
2975 }
2976 label->BindTo(bound);
2977 }
2978
2979
EmitOperand(int reg_or_opcode,const Operand & operand)2980 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) {
2981 CHECK_GE(reg_or_opcode, 0);
2982 CHECK_LT(reg_or_opcode, 8);
2983 const int length = operand.length_;
2984 CHECK_GT(length, 0);
2985 // Emit the ModRM byte updated with the given reg value.
2986 CHECK_EQ(operand.encoding_[0] & 0x38, 0);
2987 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3));
2988 // Emit the rest of the encoded operand.
2989 for (int i = 1; i < length; i++) {
2990 EmitUint8(operand.encoding_[i]);
2991 }
2992 AssemblerFixup* fixup = operand.GetFixup();
2993 if (fixup != nullptr) {
2994 EmitFixup(fixup);
2995 }
2996 }
2997
2998
EmitImmediate(const Immediate & imm,bool is_16_op)2999 void X86Assembler::EmitImmediate(const Immediate& imm, bool is_16_op) {
3000 if (is_16_op) {
3001 EmitUint8(imm.value() & 0xFF);
3002 EmitUint8(imm.value() >> 8);
3003 } else {
3004 EmitInt32(imm.value());
3005 }
3006 }
3007
3008
EmitComplex(int reg_or_opcode,const Operand & operand,const Immediate & immediate,bool is_16_op)3009 void X86Assembler::EmitComplex(int reg_or_opcode,
3010 const Operand& operand,
3011 const Immediate& immediate,
3012 bool is_16_op) {
3013 CHECK_GE(reg_or_opcode, 0);
3014 CHECK_LT(reg_or_opcode, 8);
3015 if (immediate.is_int8()) {
3016 // Use sign-extended 8-bit immediate.
3017 EmitUint8(0x83);
3018 EmitOperand(reg_or_opcode, operand);
3019 EmitUint8(immediate.value() & 0xFF);
3020 } else if (operand.IsRegister(EAX)) {
3021 // Use short form if the destination is eax.
3022 EmitUint8(0x05 + (reg_or_opcode << 3));
3023 EmitImmediate(immediate, is_16_op);
3024 } else {
3025 EmitUint8(0x81);
3026 EmitOperand(reg_or_opcode, operand);
3027 EmitImmediate(immediate, is_16_op);
3028 }
3029 }
3030
3031
EmitLabel(Label * label,int instruction_size)3032 void X86Assembler::EmitLabel(Label* label, int instruction_size) {
3033 if (label->IsBound()) {
3034 int offset = label->Position() - buffer_.Size();
3035 CHECK_LE(offset, 0);
3036 EmitInt32(offset - instruction_size);
3037 } else {
3038 EmitLabelLink(label);
3039 }
3040 }
3041
3042
EmitLabelLink(Label * label)3043 void X86Assembler::EmitLabelLink(Label* label) {
3044 CHECK(!label->IsBound());
3045 int position = buffer_.Size();
3046 EmitInt32(label->position_);
3047 label->LinkTo(position);
3048 }
3049
3050
EmitLabelLink(NearLabel * label)3051 void X86Assembler::EmitLabelLink(NearLabel* label) {
3052 CHECK(!label->IsBound());
3053 int position = buffer_.Size();
3054 if (label->IsLinked()) {
3055 // Save the delta in the byte that we have to play with.
3056 uint32_t delta = position - label->LinkPosition();
3057 CHECK(IsUint<8>(delta));
3058 EmitUint8(delta & 0xFF);
3059 } else {
3060 EmitUint8(0);
3061 }
3062 label->LinkTo(position);
3063 }
3064
3065
EmitGenericShift(int reg_or_opcode,const Operand & operand,const Immediate & imm)3066 void X86Assembler::EmitGenericShift(int reg_or_opcode,
3067 const Operand& operand,
3068 const Immediate& imm) {
3069 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
3070 CHECK(imm.is_int8());
3071 if (imm.value() == 1) {
3072 EmitUint8(0xD1);
3073 EmitOperand(reg_or_opcode, operand);
3074 } else {
3075 EmitUint8(0xC1);
3076 EmitOperand(reg_or_opcode, operand);
3077 EmitUint8(imm.value() & 0xFF);
3078 }
3079 }
3080
3081
EmitGenericShift(int reg_or_opcode,const Operand & operand,Register shifter)3082 void X86Assembler::EmitGenericShift(int reg_or_opcode,
3083 const Operand& operand,
3084 Register shifter) {
3085 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
3086 CHECK_EQ(shifter, ECX);
3087 EmitUint8(0xD3);
3088 EmitOperand(reg_or_opcode, operand);
3089 }
3090
AddConstantArea()3091 void X86Assembler::AddConstantArea() {
3092 ArrayRef<const int32_t> area = constant_area_.GetBuffer();
3093 // Generate the data for the literal area.
3094 for (size_t i = 0, e = area.size(); i < e; i++) {
3095 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
3096 EmitInt32(area[i]);
3097 }
3098 }
3099
AppendInt32(int32_t v)3100 size_t ConstantArea::AppendInt32(int32_t v) {
3101 size_t result = buffer_.size() * elem_size_;
3102 buffer_.push_back(v);
3103 return result;
3104 }
3105
AddInt32(int32_t v)3106 size_t ConstantArea::AddInt32(int32_t v) {
3107 for (size_t i = 0, e = buffer_.size(); i < e; i++) {
3108 if (v == buffer_[i]) {
3109 return i * elem_size_;
3110 }
3111 }
3112
3113 // Didn't match anything.
3114 return AppendInt32(v);
3115 }
3116
AddInt64(int64_t v)3117 size_t ConstantArea::AddInt64(int64_t v) {
3118 int32_t v_low = Low32Bits(v);
3119 int32_t v_high = High32Bits(v);
3120 if (buffer_.size() > 1) {
3121 // Ensure we don't pass the end of the buffer.
3122 for (size_t i = 0, e = buffer_.size() - 1; i < e; i++) {
3123 if (v_low == buffer_[i] && v_high == buffer_[i + 1]) {
3124 return i * elem_size_;
3125 }
3126 }
3127 }
3128
3129 // Didn't match anything.
3130 size_t result = buffer_.size() * elem_size_;
3131 buffer_.push_back(v_low);
3132 buffer_.push_back(v_high);
3133 return result;
3134 }
3135
AddDouble(double v)3136 size_t ConstantArea::AddDouble(double v) {
3137 // Treat the value as a 64-bit integer value.
3138 return AddInt64(bit_cast<int64_t, double>(v));
3139 }
3140
AddFloat(float v)3141 size_t ConstantArea::AddFloat(float v) {
3142 // Treat the value as a 32-bit integer value.
3143 return AddInt32(bit_cast<int32_t, float>(v));
3144 }
3145
3146 } // namespace x86
3147 } // namespace art
3148