28 # define PUP CONFIG_AT91_GPIO_PULLUP  macro
30 # define PUP 0  macro
36 	at91_set_a_periph(AT91_PIO_PORTA, 27, PUP);		/* RXD0 */  in at91_serial0_hw_init()
43 	at91_set_a_periph(AT91_PIO_PORTD, 1, PUP);		/* RXD1 */  in at91_serial1_hw_init()
50 	at91_set_a_periph(AT91_PIO_PORTD, 3, PUP);		/* RXD2 */  in at91_serial2_hw_init()
56 	at91_set_a_periph(AT91_PIO_PORTC, 30, PUP);		/* DRXD */  in at91_seriald_hw_init()
64 	at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */  in at91_spi0_hw_init()
65 	at91_set_b_periph(AT91_PIO_PORTA, 1, PUP);	/* SPI0_MOSI */  in at91_spi0_hw_init()
66 	at91_set_b_periph(AT91_PIO_PORTA, 2, PUP);	/* SPI0_SPCK */  in at91_spi0_hw_init()
98 	at91_set_a_periph(AT91_PIO_PORTB, 12, PUP);	/* SPI1_MISO */  in at91_spi1_hw_init()
99 	at91_set_a_periph(AT91_PIO_PORTB, 13, PUP);	/* SPI1_MOSI */  in at91_spi1_hw_init()
100 	at91_set_a_periph(AT91_PIO_PORTB, 14, PUP);	/* SPI1_SPCK */  in at91_spi1_hw_init()
136 	at91_set_a_periph(AT91_PIO_PORTA, 6, PUP);	/* MCI1_CK */  in at91_mci_hw_init()
139 	at91_set_a_periph(AT91_PIO_PORTA, 21, PUP);	/* MCI1_CDB */  in at91_mci_hw_init()
140 	at91_set_a_periph(AT91_PIO_PORTA, 22, PUP);	/* MCI1_DB0 */  in at91_mci_hw_init()
141 	at91_set_a_periph(AT91_PIO_PORTA, 23, PUP);	/* MCI1_DB1 */  in at91_mci_hw_init()
142 	at91_set_a_periph(AT91_PIO_PORTA, 24, PUP);	/* MCI1_DB2 */  in at91_mci_hw_init()
143 	at91_set_a_periph(AT91_PIO_PORTA, 25, PUP);	/* MCI1_DB3 */  in at91_mci_hw_init()
145 	at91_set_a_periph(AT91_PIO_PORTA, 7, PUP);	/* MCI1_CDA */  in at91_mci_hw_init()
146 	at91_set_a_periph(AT91_PIO_PORTA, 8, PUP);	/* MCI1_DA0 */  in at91_mci_hw_init()
147 	at91_set_a_periph(AT91_PIO_PORTA, 9, PUP);	/* MCI1_DA1 */  in at91_mci_hw_init()
148 	at91_set_a_periph(AT91_PIO_PORTA, 10, PUP);	/* MCI1_DA2 */  in at91_mci_hw_init()
149 	at91_set_a_periph(AT91_PIO_PORTA, 11, PUP);	/* MCI1_DA3 */  in at91_mci_hw_init()