/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 93 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() 106 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 102 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() 115 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
D | ARCExpandPseudos.cpp | 63 unsigned AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in ExpandStore() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SILoadStoreOptimizer.cpp | 315 const MachineOperand *AddrReg[3]; in findMatchingInst() local 485 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair() local 581 const MachineOperand *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeWrite2Pair() local
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D | R600InstrInfo.cpp | 1126 unsigned AddrReg; in buildIndirectWrite() local 1158 unsigned AddrReg; in buildIndirectRead() local
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D | SIInstrInfo.cpp | 277 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local 312 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local 327 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86CallLowering.cpp | 119 unsigned AddrReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local 233 unsigned AddrReg = MRI.createGenericVirtualRegister( in getStackAddress() local
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D | X86InstructionSelector.cpp | 1345 unsigned AddrReg = MRI.createVirtualRegister(&X86::GR64RegClass); in materializeFP() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64CallLowering.cpp | 64 unsigned AddrReg = MRI.createGenericVirtualRegister(LLT::pointer(0, 64)); in getStackAddress() local 142 unsigned AddrReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
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D | AArch64ExpandPseudoInsts.cpp | 601 unsigned AddrReg = MI.getOperand(2).getReg(); in expandCMP_SWAP() local 681 unsigned AddrReg = MI.getOperand(3).getReg(); in expandCMP_SWAP_128() local
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D | AArch64SIMDInstrOpt.cpp | 505 unsigned SeqReg, AddrReg; in optimizeLdStInterleave() local
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D | AArch64FastISel.cpp | 2055 unsigned AddrReg, in emitStoreRelease() 2195 unsigned AddrReg = getRegForValue(PtrV); in selectStore() local 2510 unsigned AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local 5027 const unsigned AddrReg = constrainOperandRegClass( in selectAtomicCmpXchg() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMCallLowering.cpp | 107 unsigned AddrReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local 306 unsigned AddrReg = in getStackAddress() local
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D | ARMExpandPseudoInsts.cpp | 932 unsigned AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP() local 1051 unsigned AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP_64() local
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D | ARMFastISel.cpp | 1336 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsCallLowering.cpp | 101 unsigned AddrReg = MRI.createGenericVirtualRegister(LLT::pointer(0, 32)); in getStackAddress() local 162 unsigned AddrReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
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/external/llvm/lib/Target/AMDGPU/ |
D | SILoadStoreOptimizer.cpp | 200 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr); in mergeRead2Pair() local
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D | SIInstrInfo.cpp | 215 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local 250 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local 264 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local 290 const MachineOperand *AddrReg = getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() local
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D | R600InstrInfo.cpp | 1145 unsigned AddrReg; in buildIndirectWrite() local 1177 unsigned AddrReg; in buildIndirectRead() local
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 705 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 727 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst() local
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 1767 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCFastISel.cpp | 1854 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 1335 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 3594 unsigned AddrReg = createResultReg(&X86::GR64RegClass); in X86MaterializeFP() local
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