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Searched defs:ImmReg (Results 1 – 10 of 10) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSILoadStoreOptimizer.cpp519 unsigned ImmReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in mergeRead2Pair() local
607 unsigned ImmReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in mergeWrite2Pair() local
DSIInstrInfo.cpp4490 unsigned ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
4509 unsigned ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
4519 unsigned ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
DR600ISelLowering.cpp2155 unsigned ImmReg = R600::ALU_LITERAL_X; in FoldOperand() local
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp2099 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in PPCMaterializeInt() local
2119 unsigned ImmReg = createResultReg(RC); in PPCMaterializeInt() local
2273 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in fastEmit_i() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp2200 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in PPCMaterializeInt() local
2220 unsigned ImmReg = createResultReg(RC); in PPCMaterializeInt() local
2381 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in fastEmit_i() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMFastISel.cpp478 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt() local
494 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt() local
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp483 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt() local
499 unsigned ImmReg = createResultReg(RC); in ARMMaterializeInt() local
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp2253 unsigned ImmReg = AMDGPU::ALU_LITERAL_X; in FoldOperand() local
/external/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp1433 unsigned ImmReg = genTfrConst(MRI.getRegClass(DR), C, B, At, DL); in processBlock() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp1482 unsigned ImmReg = genTfrConst(MRI.getRegClass(DR), C, B, At, DL); in processBlock() local