| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 2496 __ Ins(dst_high, lhs_high, shift_value, kMipsBitsPerWord - shift_value); in HandleShift() local
2500 __ Ins(dst_low, lhs_high, kMipsBitsPerWord - shift_value, shift_value); in HandleShift() local
2504 __ Ins(dst_low, lhs_high, kMipsBitsPerWord - shift_value, shift_value); in HandleShift() local
2508 __ Ins(dst_low, lhs_high, kMipsBitsPerWord - shift_value, shift_value); in HandleShift() local
2510 __ Ins(dst_high, lhs_low, kMipsBitsPerWord - shift_value, shift_value); in HandleShift() local
2556 __ Ins(dst_low, lhs_low, kMipsBitsPerWord - shift_value_high, shift_value_high); in HandleShift() local
2558 __ Ins(dst_high, lhs_high, kMipsBitsPerWord - shift_value_high, shift_value_high); in HandleShift() local
3932 __ Ins(out, ZERO, ctz_imm, 32 - ctz_imm); in DivRemByPowerOfTwo() local
3964 __ Ins(out_low, out_high, 32 - ctz_imm, ctz_imm); in DivRemByPowerOfTwo() local
4038 __ Ins(out_low, out_high, ctz_imm, 32 - ctz_imm); in DivRemByPowerOfTwo() local
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| D | intrinsics_mips.cc | 815 __ Ins(out, AT, 8, 24); in VisitMemoryPeekShortNative() local
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| D | code_generator_mips64.cc | 3444 __ Ins(out, ZERO, ctz_imm, 32 - ctz_imm); in DivRemByPowerOfTwo() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 486 TEST_F(AssemblerMIPSTest, Ins) { in TEST_F() argument
494 __ Ins(*reg1, *reg2, pos, size); in TEST_F() local
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| D | assembler_mips.cc | 686 void MipsAssembler::Ins(Register rd, Register rt, int pos, int size) { in Ins() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1366 TEST_F(AssemblerMIPS64Test, Ins) { in TEST_F() argument
1374 __ Ins(*reg1, *reg2, pos, size); in TEST_F() local
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| D | assembler_mips64.cc | 433 void Mips64Assembler::Ins(GpuRegister rd, GpuRegister rt, int pos, int size) { in Ins() function in art::mips64::Mips64Assembler
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