| /external/syzkaller/pkg/ifuzz/ |
| D | ifuzz.go | 22 type Insn struct { struct
23 Name string
24 Extension string
26 Mode int // bitmask of compatible modes
27 Priv bool // CPL=0
28 Pseudo bool // pseudo instructions can consist of several real instructions
30 Opcode []byte
31 Prefix []byte
32 Suffix []byte
33 Modrm bool
[all …]
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 46 uint64_t &Size, uint16_t &Insn) { in readInstruction16()
58 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
275 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2OpInstructionFail()
345 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RInstruction()
358 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RImmInstruction()
371 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeR2RInstruction()
384 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RSrcDstInstruction()
398 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeRUSInstruction()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 46 uint64_t &Size, uint16_t &Insn) { in readInstruction16()
58 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
275 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2OpInstructionFail()
345 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RInstruction()
358 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RImmInstruction()
371 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeR2RInstruction()
384 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RSrcDstInstruction()
398 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeRUSInstruction()
[all …]
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| /external/capstone/arch/XCore/ |
| D | XCoreDisassembler.c | 192 static DecodeStatus Decode2OpInstruction(unsigned Insn, unsigned *Op1, unsigned *Op2) in Decode2OpInstruction()
215 static DecodeStatus Decode3OpInstruction(unsigned Insn, in Decode3OpInstruction()
235 static DecodeStatus Decode2OpInstructionFail(MCInst *Inst, unsigned Insn, uint64_t Address, in Decode2OpInstructionFail()
306 static DecodeStatus Decode2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in Decode2RInstruction()
320 static DecodeStatus Decode2RImmInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in Decode2RImmInstruction()
334 static DecodeStatus DecodeR2RInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in DecodeR2RInstruction()
348 static DecodeStatus Decode2RSrcDstInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in Decode2RSrcDstInstruction()
363 static DecodeStatus DecodeRUSInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in DecodeRUSInstruction()
377 static DecodeStatus DecodeRUSBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in DecodeRUSBitpInstruction()
391 static DecodeStatus DecodeRUSSrcDstBitpInstruction(MCInst *Inst, unsigned Insn, uint64_t Address, in DecodeRUSSrcDstBitpInstruction()
[all …]
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| /external/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 75 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
89 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust()
135 uint32_t Insn; in getInstruction() local
173 static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn, in decodeRiMemoryValue()
185 static DecodeStatus decodeRrMemoryValue(MCInst &Inst, unsigned Insn, in decodeRrMemoryValue()
197 static DecodeStatus decodeSplsValue(MCInst &Inst, unsigned Insn, in decodeSplsValue()
218 static DecodeStatus decodeBranch(MCInst &MI, unsigned Insn, uint64_t Address, in decodeBranch()
226 static DecodeStatus decodeShiftImm(MCInst &Inst, unsigned Insn, in decodeShiftImm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 75 uint32_t &Insn) { in readInstruction32()
89 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust()
133 uint32_t Insn; in getInstruction() local
172 static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn, in decodeRiMemoryValue()
184 static DecodeStatus decodeRrMemoryValue(MCInst &Inst, unsigned Insn, in decodeRrMemoryValue()
196 static DecodeStatus decodeSplsValue(MCInst &Inst, unsigned Insn, in decodeSplsValue()
217 static DecodeStatus decodeBranch(MCInst &MI, unsigned Insn, uint64_t Address, in decodeBranch()
225 static DecodeStatus decodeShiftImm(MCInst &Inst, unsigned Insn, in decodeShiftImm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/Disassembler/ |
| D | ARCDisassembler.cpp | 52 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
61 uint64_t &Size, uint64_t &Insn) { in readInstruction64()
71 uint64_t &Size, uint64_t &Insn) { in readInstruction48()
80 uint64_t &Size, uint32_t &Insn) { in readInstruction16()
146 static unsigned decodeCField(unsigned Insn) { in decodeCField()
150 static unsigned decodeBField(unsigned Insn) { in decodeBField()
155 static unsigned decodeAField(unsigned Insn) { in decodeAField()
159 static DecodeStatus DecodeMEMrs9(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMEMrs9()
219 static DecodeStatus DecodeStLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeStLImmInstruction()
236 static DecodeStatus DecodeLdLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeLdLImmInstruction()
[all …]
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| /external/syzkaller/pkg/ifuzz/gen/ |
| D | gen.go | 183 func parsePattern(insn *ifuzz.Insn, vals []string) error {
482 func parseOperands(insn *ifuzz.Insn, vals []string) error {
530 func addImm(insn *ifuzz.Insn, imm int8) {
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 909 uint64_t &Size, uint32_t &Insn, in readInstruction16()
929 uint64_t &Size, uint32_t &Insn, in readInstruction32()
967 uint32_t Insn; in getInstruction() local
1267 unsigned Insn, in DecodeMem()
1289 unsigned Insn, in DecodeMemEVA()
1310 unsigned Insn, in DecodeLoadByte9()
1328 unsigned Insn, in DecodeLoadByte15()
1346 unsigned Insn, in DecodeCacheOp()
1363 unsigned Insn, in DecodeCacheOpMM()
1380 unsigned Insn, in DecodePrefeOpMM()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1064 static DecodeStatus DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address, in DecodeDEXT()
1104 static DecodeStatus DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address, in DecodeDINS()
1144 static DecodeStatus DecodeCRC(MCInst &MI, InsnType Insn, uint64_t Address, in DecodeCRC()
1160 uint64_t &Size, uint32_t &Insn, in readInstruction16()
1180 uint64_t &Size, uint32_t &Insn, in readInstruction32()
1218 uint32_t Insn; in getInstruction() local
1520 unsigned Insn, in DecodeMem()
1542 unsigned Insn, in DecodeMemEVA()
1563 unsigned Insn, in DecodeLoadByte15()
1581 unsigned Insn, in DecodeCacheOp()
[all …]
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| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 1366 static DecodeStatus DecodeCopMemInstruction(MCInst *Inst, unsigned Insn, in DecodeCopMemInstruction()
1511 static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned Insn, in DecodeAddrMode2IdxInstruction()
1663 static DecodeStatus DecodeAddrMode3Instruction(MCInst *Inst, unsigned Insn, in DecodeAddrMode3Instruction()
1856 static DecodeStatus DecodeRFEInstruction(MCInst *Inst, unsigned Insn, in DecodeRFEInstruction()
1886 static DecodeStatus DecodeQADDInstruction(MCInst *Inst, unsigned Insn, in DecodeQADDInstruction()
1911 unsigned Insn, uint64_t Address, const void *Decoder) in DecodeMemMultipleWritebackInstruction()
2000 static DecodeStatus DecodeCPSInstruction(MCInst *Inst, unsigned Insn, in DecodeCPSInstruction()
2048 static DecodeStatus DecodeT2CPSInstruction(MCInst *Inst, unsigned Insn, in DecodeT2CPSInstruction()
2091 static DecodeStatus DecodeT2MOVTWInstruction(MCInst *Inst, unsigned Insn, in DecodeT2MOVTWInstruction()
2115 static DecodeStatus DecodeArmMOVTWInstruction(MCInst *Inst, unsigned Insn, in DecodeArmMOVTWInstruction()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 430 uint32_t Insn, in checkDecodedInstruction()
464 uint32_t Insn = in getInstruction() local
1320 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, in DecodeCopMemInstruction()
1470 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, in DecodeAddrMode2IdxInstruction()
1619 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, in DecodeAddrMode3Instruction()
1810 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn, in DecodeRFEInstruction()
1839 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn, in DecodeQADDInstruction()
1863 unsigned Insn, in DecodeMemMultipleWritebackInstruction()
1954 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn, in DecodeHINTInstruction()
1976 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn, in DecodeCPSInstruction()
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 418 uint32_t Insn, in checkDecodedInstruction()
453 uint32_t Insn = in getInstruction() local
1321 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, in DecodeCopMemInstruction()
1471 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, in DecodeAddrMode2IdxInstruction()
1620 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, in DecodeAddrMode3Instruction()
1811 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn, in DecodeRFEInstruction()
1840 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn, in DecodeQADDInstruction()
1864 unsigned Insn, in DecodeMemMultipleWritebackInstruction()
1955 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn, in DecodeHINTInstruction()
1977 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn, in DecodeCPSInstruction()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1181 static DecodeStatus DecodeCopMemInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeCopMemInstruction()
1336 DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeAddrMode2IdxInstruction()
1480 DecodeAddrMode3Instruction(llvm::MCInst &Inst, unsigned Insn, in DecodeAddrMode3Instruction()
1591 static DecodeStatus DecodeRFEInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeRFEInstruction()
1621 unsigned Insn, in DecodeMemMultipleWritebackInstruction()
1705 static DecodeStatus DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeCPSInstruction()
1745 static DecodeStatus DecodeT2CPSInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeT2CPSInstruction()
1785 static DecodeStatus DecodeT2MOVTWInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeT2MOVTWInstruction()
1809 static DecodeStatus DecodeArmMOVTWInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeArmMOVTWInstruction()
1835 static DecodeStatus DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn, in DecodeSMLAInstruction()
[all …]
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| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 325 uint32_t Insn; in MipsDisassembler_getInstruction() local
411 uint32_t Insn; in Mips64Disassembler_getInstruction() local
887 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeMem()
908 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeCachePref()
923 static DecodeStatus DecodeMSA128Mem(MCInst *Inst, unsigned Insn, in DecodeMSA128Mem()
971 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeMemMMImm12()
991 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeMemMMImm16()
1008 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeFMem()
1025 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeCOP2Mem()
1042 unsigned Insn, uint64_t Address, MCRegisterInfo *Decoder) in DecodeCOP3Mem()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/Disassembler/ |
| D | AVRDisassembler.cpp | 79 uint64_t &Size, uint32_t &Insn) { in readInstruction16()
92 uint64_t &Size, uint32_t &Insn) { in readInstruction32()
119 uint32_t Insn; in getInstruction() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/Disassembler/ |
| D | BPFDisassembler.cpp | 129 static DecodeStatus decodeMemoryOpValue(MCInst &Inst, unsigned Insn, in decodeMemoryOpValue()
141 uint64_t &Size, uint64_t &Insn, in readInstruction64()
170 uint64_t Insn, Hi; in getInstruction() local
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 27 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, in addDagOperandMapping()
93 CodeGenInstruction Insn(Operator); in evaluateExpansion() local
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| D | ARMDecoderEmitter.cpp | 424 void insnWithID(insn_t &Insn, unsigned Opcode) const { in insnWithID()
558 insn_t Insn; in ARMFilter() local
853 bool ARMFilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn, in fieldFromInsn()
935 insn_t &Insn) { in getIslands()
998 insn_t Insn; in emitSingletonDecoder() local
1117 insn_t Insn; in filterProcessor() local
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| D | FixedLenDecoderEmitter.cpp | 285 void insnWithID(insn_t &Insn, unsigned Opcode) const { in insnWithID()
396 insn_t Insn; in Filter() local
600 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn, in fieldFromInsn()
682 insn_t &Insn) { in getIslands()
809 insn_t Insn; in emitSingletonDecoder() local
953 insn_t Insn; in filterProcessor() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsHazardSchedule.cpp | 97 I = std::find_if_not(I, E, [](const Iter &Insn) { return Insn->isTransient(); }); in getNextMachineInstr()
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| /external/llvm/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 74 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, in addDagOperandMapping()
140 CodeGenInstruction Insn(Operator); in evaluateExpansion() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 74 addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn, in addDagOperandMapping()
140 CodeGenInstruction Insn(Operator); in evaluateExpansion() local
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| D | FixedLenDecoderEmitter.cpp | 383 void insnWithID(insn_t &Insn, unsigned Opcode) const { in insnWithID()
521 insn_t Insn; in Filter() local
955 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn, in fieldFromInsn()
1313 insn_t Insn; in emitSingletonTableEntry() local
1447 insn_t Insn; in filterProcessor() local
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| /external/capstone/arch/Sparc/ |
| D | SparcDisassembler.c | 205 static DecodeStatus readInstruction32(const uint8_t *code, size_t len, uint32_t *Insn) in readInstruction32()
227 uint32_t Insn; in Sparc_getInstruction() local
|