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1 //===------------ FixedLenDecoderEmitter.cpp - Decoder Generator ----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // It contains the tablegen backend that emits the decoder functions for
11 // targets with fixed length instruction set.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #define DEBUG_TYPE "decoder-emitter"
16 
17 #include "FixedLenDecoderEmitter.h"
18 #include "CodeGenTarget.h"
19 #include "llvm/TableGen/Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/raw_ostream.h"
23 
24 #include <vector>
25 #include <map>
26 #include <string>
27 
28 using namespace llvm;
29 
30 // The set (BIT_TRUE, BIT_FALSE, BIT_UNSET) represents a ternary logic system
31 // for a bit value.
32 //
33 // BIT_UNFILTERED is used as the init value for a filter position.  It is used
34 // only for filter processings.
35 typedef enum {
36   BIT_TRUE,      // '1'
37   BIT_FALSE,     // '0'
38   BIT_UNSET,     // '?'
39   BIT_UNFILTERED // unfiltered
40 } bit_value_t;
41 
ValueSet(bit_value_t V)42 static bool ValueSet(bit_value_t V) {
43   return (V == BIT_TRUE || V == BIT_FALSE);
44 }
ValueNotSet(bit_value_t V)45 static bool ValueNotSet(bit_value_t V) {
46   return (V == BIT_UNSET);
47 }
Value(bit_value_t V)48 static int Value(bit_value_t V) {
49   return ValueNotSet(V) ? -1 : (V == BIT_FALSE ? 0 : 1);
50 }
bitFromBits(BitsInit & bits,unsigned index)51 static bit_value_t bitFromBits(BitsInit &bits, unsigned index) {
52   if (BitInit *bit = dynamic_cast<BitInit*>(bits.getBit(index)))
53     return bit->getValue() ? BIT_TRUE : BIT_FALSE;
54 
55   // The bit is uninitialized.
56   return BIT_UNSET;
57 }
58 // Prints the bit value for each position.
dumpBits(raw_ostream & o,BitsInit & bits)59 static void dumpBits(raw_ostream &o, BitsInit &bits) {
60   unsigned index;
61 
62   for (index = bits.getNumBits(); index > 0; index--) {
63     switch (bitFromBits(bits, index - 1)) {
64     case BIT_TRUE:
65       o << "1";
66       break;
67     case BIT_FALSE:
68       o << "0";
69       break;
70     case BIT_UNSET:
71       o << "_";
72       break;
73     default:
74       assert(0 && "unexpected return value from bitFromBits");
75     }
76   }
77 }
78 
getBitsField(const Record & def,const char * str)79 static BitsInit &getBitsField(const Record &def, const char *str) {
80   BitsInit *bits = def.getValueAsBitsInit(str);
81   return *bits;
82 }
83 
84 // Forward declaration.
85 class FilterChooser;
86 
87 // Representation of the instruction to work on.
88 typedef std::vector<bit_value_t> insn_t;
89 
90 /// Filter - Filter works with FilterChooser to produce the decoding tree for
91 /// the ISA.
92 ///
93 /// It is useful to think of a Filter as governing the switch stmts of the
94 /// decoding tree in a certain level.  Each case stmt delegates to an inferior
95 /// FilterChooser to decide what further decoding logic to employ, or in another
96 /// words, what other remaining bits to look at.  The FilterChooser eventually
97 /// chooses a best Filter to do its job.
98 ///
99 /// This recursive scheme ends when the number of Opcodes assigned to the
100 /// FilterChooser becomes 1 or if there is a conflict.  A conflict happens when
101 /// the Filter/FilterChooser combo does not know how to distinguish among the
102 /// Opcodes assigned.
103 ///
104 /// An example of a conflict is
105 ///
106 /// Conflict:
107 ///                     111101000.00........00010000....
108 ///                     111101000.00........0001........
109 ///                     1111010...00........0001........
110 ///                     1111010...00....................
111 ///                     1111010.........................
112 ///                     1111............................
113 ///                     ................................
114 ///     VST4q8a         111101000_00________00010000____
115 ///     VST4q8b         111101000_00________00010000____
116 ///
117 /// The Debug output shows the path that the decoding tree follows to reach the
118 /// the conclusion that there is a conflict.  VST4q8a is a vst4 to double-spaced
119 /// even registers, while VST4q8b is a vst4 to double-spaced odd regsisters.
120 ///
121 /// The encoding info in the .td files does not specify this meta information,
122 /// which could have been used by the decoder to resolve the conflict.  The
123 /// decoder could try to decode the even/odd register numbering and assign to
124 /// VST4q8a or VST4q8b, but for the time being, the decoder chooses the "a"
125 /// version and return the Opcode since the two have the same Asm format string.
126 class Filter {
127 protected:
128   FilterChooser *Owner; // points to the FilterChooser who owns this filter
129   unsigned StartBit; // the starting bit position
130   unsigned NumBits; // number of bits to filter
131   bool Mixed; // a mixed region contains both set and unset bits
132 
133   // Map of well-known segment value to the set of uid's with that value.
134   std::map<uint64_t, std::vector<unsigned> > FilteredInstructions;
135 
136   // Set of uid's with non-constant segment values.
137   std::vector<unsigned> VariableInstructions;
138 
139   // Map of well-known segment value to its delegate.
140   std::map<unsigned, FilterChooser*> FilterChooserMap;
141 
142   // Number of instructions which fall under FilteredInstructions category.
143   unsigned NumFiltered;
144 
145   // Keeps track of the last opcode in the filtered bucket.
146   unsigned LastOpcFiltered;
147 
148   // Number of instructions which fall under VariableInstructions category.
149   unsigned NumVariable;
150 
151 public:
getNumFiltered()152   unsigned getNumFiltered() { return NumFiltered; }
getNumVariable()153   unsigned getNumVariable() { return NumVariable; }
getSingletonOpc()154   unsigned getSingletonOpc() {
155     assert(NumFiltered == 1);
156     return LastOpcFiltered;
157   }
158   // Return the filter chooser for the group of instructions without constant
159   // segment values.
getVariableFC()160   FilterChooser &getVariableFC() {
161     assert(NumFiltered == 1);
162     assert(FilterChooserMap.size() == 1);
163     return *(FilterChooserMap.find((unsigned)-1)->second);
164   }
165 
166   Filter(const Filter &f);
167   Filter(FilterChooser &owner, unsigned startBit, unsigned numBits, bool mixed);
168 
169   ~Filter();
170 
171   // Divides the decoding task into sub tasks and delegates them to the
172   // inferior FilterChooser's.
173   //
174   // A special case arises when there's only one entry in the filtered
175   // instructions.  In order to unambiguously decode the singleton, we need to
176   // match the remaining undecoded encoding bits against the singleton.
177   void recurse();
178 
179   // Emit code to decode instructions given a segment or segments of bits.
180   void emit(raw_ostream &o, unsigned &Indentation);
181 
182   // Returns the number of fanout produced by the filter.  More fanout implies
183   // the filter distinguishes more categories of instructions.
184   unsigned usefulness() const;
185 }; // End of class Filter
186 
187 // These are states of our finite state machines used in FilterChooser's
188 // filterProcessor() which produces the filter candidates to use.
189 typedef enum {
190   ATTR_NONE,
191   ATTR_FILTERED,
192   ATTR_ALL_SET,
193   ATTR_ALL_UNSET,
194   ATTR_MIXED
195 } bitAttr_t;
196 
197 /// FilterChooser - FilterChooser chooses the best filter among a set of Filters
198 /// in order to perform the decoding of instructions at the current level.
199 ///
200 /// Decoding proceeds from the top down.  Based on the well-known encoding bits
201 /// of instructions available, FilterChooser builds up the possible Filters that
202 /// can further the task of decoding by distinguishing among the remaining
203 /// candidate instructions.
204 ///
205 /// Once a filter has been chosen, it is called upon to divide the decoding task
206 /// into sub-tasks and delegates them to its inferior FilterChoosers for further
207 /// processings.
208 ///
209 /// It is useful to think of a Filter as governing the switch stmts of the
210 /// decoding tree.  And each case is delegated to an inferior FilterChooser to
211 /// decide what further remaining bits to look at.
212 class FilterChooser {
213 protected:
214   friend class Filter;
215 
216   // Vector of codegen instructions to choose our filter.
217   const std::vector<const CodeGenInstruction*> &AllInstructions;
218 
219   // Vector of uid's for this filter chooser to work on.
220   const std::vector<unsigned> Opcodes;
221 
222   // Lookup table for the operand decoding of instructions.
223   std::map<unsigned, std::vector<OperandInfo> > &Operands;
224 
225   // Vector of candidate filters.
226   std::vector<Filter> Filters;
227 
228   // Array of bit values passed down from our parent.
229   // Set to all BIT_UNFILTERED's for Parent == NULL.
230   std::vector<bit_value_t> FilterBitValues;
231 
232   // Links to the FilterChooser above us in the decoding tree.
233   FilterChooser *Parent;
234 
235   // Index of the best filter from Filters.
236   int BestIndex;
237 
238   // Width of instructions
239   unsigned BitWidth;
240 
241   // Parent emitter
242   const FixedLenDecoderEmitter *Emitter;
243 
244 public:
FilterChooser(const FilterChooser & FC)245   FilterChooser(const FilterChooser &FC) :
246     AllInstructions(FC.AllInstructions), Opcodes(FC.Opcodes),
247       Operands(FC.Operands), Filters(FC.Filters),
248       FilterBitValues(FC.FilterBitValues), Parent(FC.Parent),
249     BestIndex(FC.BestIndex), BitWidth(FC.BitWidth),
250     Emitter(FC.Emitter) { }
251 
FilterChooser(const std::vector<const CodeGenInstruction * > & Insts,const std::vector<unsigned> & IDs,std::map<unsigned,std::vector<OperandInfo>> & Ops,unsigned BW,const FixedLenDecoderEmitter * E)252   FilterChooser(const std::vector<const CodeGenInstruction*> &Insts,
253                 const std::vector<unsigned> &IDs,
254     std::map<unsigned, std::vector<OperandInfo> > &Ops,
255                 unsigned BW,
256                 const FixedLenDecoderEmitter *E) :
257       AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(),
258       Parent(NULL), BestIndex(-1), BitWidth(BW), Emitter(E) {
259     for (unsigned i = 0; i < BitWidth; ++i)
260       FilterBitValues.push_back(BIT_UNFILTERED);
261 
262     doFilter();
263   }
264 
FilterChooser(const std::vector<const CodeGenInstruction * > & Insts,const std::vector<unsigned> & IDs,std::map<unsigned,std::vector<OperandInfo>> & Ops,std::vector<bit_value_t> & ParentFilterBitValues,FilterChooser & parent)265   FilterChooser(const std::vector<const CodeGenInstruction*> &Insts,
266                 const std::vector<unsigned> &IDs,
267         std::map<unsigned, std::vector<OperandInfo> > &Ops,
268                 std::vector<bit_value_t> &ParentFilterBitValues,
269                 FilterChooser &parent) :
270       AllInstructions(Insts), Opcodes(IDs), Operands(Ops),
271       Filters(), FilterBitValues(ParentFilterBitValues),
272       Parent(&parent), BestIndex(-1), BitWidth(parent.BitWidth),
273       Emitter(parent.Emitter) {
274     doFilter();
275   }
276 
277   // The top level filter chooser has NULL as its parent.
isTopLevel()278   bool isTopLevel() { return Parent == NULL; }
279 
280   // Emit the top level typedef and decodeInstruction() function.
281   void emitTop(raw_ostream &o, unsigned Indentation, std::string Namespace);
282 
283 protected:
284   // Populates the insn given the uid.
insnWithID(insn_t & Insn,unsigned Opcode) const285   void insnWithID(insn_t &Insn, unsigned Opcode) const {
286     BitsInit &Bits = getBitsField(*AllInstructions[Opcode]->TheDef, "Inst");
287 
288     for (unsigned i = 0; i < BitWidth; ++i)
289       Insn.push_back(bitFromBits(Bits, i));
290   }
291 
292   // Returns the record name.
nameWithID(unsigned Opcode) const293   const std::string &nameWithID(unsigned Opcode) const {
294     return AllInstructions[Opcode]->TheDef->getName();
295   }
296 
297   // Populates the field of the insn given the start position and the number of
298   // consecutive bits to scan for.
299   //
300   // Returns false if there exists any uninitialized bit value in the range.
301   // Returns true, otherwise.
302   bool fieldFromInsn(uint64_t &Field, insn_t &Insn, unsigned StartBit,
303       unsigned NumBits) const;
304 
305   /// dumpFilterArray - dumpFilterArray prints out debugging info for the given
306   /// filter array as a series of chars.
307   void dumpFilterArray(raw_ostream &o, std::vector<bit_value_t> & filter);
308 
309   /// dumpStack - dumpStack traverses the filter chooser chain and calls
310   /// dumpFilterArray on each filter chooser up to the top level one.
311   void dumpStack(raw_ostream &o, const char *prefix);
312 
bestFilter()313   Filter &bestFilter() {
314     assert(BestIndex != -1 && "BestIndex not set");
315     return Filters[BestIndex];
316   }
317 
318   // Called from Filter::recurse() when singleton exists.  For debug purpose.
319   void SingletonExists(unsigned Opc);
320 
PositionFiltered(unsigned i)321   bool PositionFiltered(unsigned i) {
322     return ValueSet(FilterBitValues[i]);
323   }
324 
325   // Calculates the island(s) needed to decode the instruction.
326   // This returns a lit of undecoded bits of an instructions, for example,
327   // Inst{20} = 1 && Inst{3-0} == 0b1111 represents two islands of yet-to-be
328   // decoded bits in order to verify that the instruction matches the Opcode.
329   unsigned getIslands(std::vector<unsigned> &StartBits,
330       std::vector<unsigned> &EndBits, std::vector<uint64_t> &FieldVals,
331       insn_t &Insn);
332 
333   // Emits code to check the Predicates member of an instruction are true.
334   // Returns true if predicate matches were emitted, false otherwise.
335   bool emitPredicateMatch(raw_ostream &o, unsigned &Indentation,unsigned Opc);
336 
337   // Emits code to decode the singleton.  Return true if we have matched all the
338   // well-known bits.
339   bool emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,unsigned Opc);
340 
341   // Emits code to decode the singleton, and then to decode the rest.
342   void emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,Filter &Best);
343 
344   void emitBinaryParser(raw_ostream &o , unsigned &Indentation,
345                         OperandInfo &OpInfo);
346 
347   // Assign a single filter and run with it.
348   void runSingleFilter(FilterChooser &owner, unsigned startBit, unsigned numBit,
349       bool mixed);
350 
351   // reportRegion is a helper function for filterProcessor to mark a region as
352   // eligible for use as a filter region.
353   void reportRegion(bitAttr_t RA, unsigned StartBit, unsigned BitIndex,
354       bool AllowMixed);
355 
356   // FilterProcessor scans the well-known encoding bits of the instructions and
357   // builds up a list of candidate filters.  It chooses the best filter and
358   // recursively descends down the decoding tree.
359   bool filterProcessor(bool AllowMixed, bool Greedy = true);
360 
361   // Decides on the best configuration of filter(s) to use in order to decode
362   // the instructions.  A conflict of instructions may occur, in which case we
363   // dump the conflict set to the standard error.
364   void doFilter();
365 
366   // Emits code to decode our share of instructions.  Returns true if the
367   // emitted code causes a return, which occurs if we know how to decode
368   // the instruction at this level or the instruction is not decodeable.
369   bool emit(raw_ostream &o, unsigned &Indentation);
370 };
371 
372 ///////////////////////////
373 //                       //
374 // Filter Implmenetation //
375 //                       //
376 ///////////////////////////
377 
Filter(const Filter & f)378 Filter::Filter(const Filter &f) :
379   Owner(f.Owner), StartBit(f.StartBit), NumBits(f.NumBits), Mixed(f.Mixed),
380   FilteredInstructions(f.FilteredInstructions),
381   VariableInstructions(f.VariableInstructions),
382   FilterChooserMap(f.FilterChooserMap), NumFiltered(f.NumFiltered),
383   LastOpcFiltered(f.LastOpcFiltered), NumVariable(f.NumVariable) {
384 }
385 
Filter(FilterChooser & owner,unsigned startBit,unsigned numBits,bool mixed)386 Filter::Filter(FilterChooser &owner, unsigned startBit, unsigned numBits,
387     bool mixed) : Owner(&owner), StartBit(startBit), NumBits(numBits),
388                   Mixed(mixed) {
389   assert(StartBit + NumBits - 1 < Owner->BitWidth);
390 
391   NumFiltered = 0;
392   LastOpcFiltered = 0;
393   NumVariable = 0;
394 
395   for (unsigned i = 0, e = Owner->Opcodes.size(); i != e; ++i) {
396     insn_t Insn;
397 
398     // Populates the insn given the uid.
399     Owner->insnWithID(Insn, Owner->Opcodes[i]);
400 
401     uint64_t Field;
402     // Scans the segment for possibly well-specified encoding bits.
403     bool ok = Owner->fieldFromInsn(Field, Insn, StartBit, NumBits);
404 
405     if (ok) {
406       // The encoding bits are well-known.  Lets add the uid of the
407       // instruction into the bucket keyed off the constant field value.
408       LastOpcFiltered = Owner->Opcodes[i];
409       FilteredInstructions[Field].push_back(LastOpcFiltered);
410       ++NumFiltered;
411     } else {
412       // Some of the encoding bit(s) are unspecfied.  This contributes to
413       // one additional member of "Variable" instructions.
414       VariableInstructions.push_back(Owner->Opcodes[i]);
415       ++NumVariable;
416     }
417   }
418 
419   assert((FilteredInstructions.size() + VariableInstructions.size() > 0)
420          && "Filter returns no instruction categories");
421 }
422 
~Filter()423 Filter::~Filter() {
424   std::map<unsigned, FilterChooser*>::iterator filterIterator;
425   for (filterIterator = FilterChooserMap.begin();
426        filterIterator != FilterChooserMap.end();
427        filterIterator++) {
428     delete filterIterator->second;
429   }
430 }
431 
432 // Divides the decoding task into sub tasks and delegates them to the
433 // inferior FilterChooser's.
434 //
435 // A special case arises when there's only one entry in the filtered
436 // instructions.  In order to unambiguously decode the singleton, we need to
437 // match the remaining undecoded encoding bits against the singleton.
recurse()438 void Filter::recurse() {
439   std::map<uint64_t, std::vector<unsigned> >::const_iterator mapIterator;
440 
441   // Starts by inheriting our parent filter chooser's filter bit values.
442   std::vector<bit_value_t> BitValueArray(Owner->FilterBitValues);
443 
444   unsigned bitIndex;
445 
446   if (VariableInstructions.size()) {
447     // Conservatively marks each segment position as BIT_UNSET.
448     for (bitIndex = 0; bitIndex < NumBits; bitIndex++)
449       BitValueArray[StartBit + bitIndex] = BIT_UNSET;
450 
451     // Delegates to an inferior filter chooser for further processing on this
452     // group of instructions whose segment values are variable.
453     FilterChooserMap.insert(std::pair<unsigned, FilterChooser*>(
454                               (unsigned)-1,
455                               new FilterChooser(Owner->AllInstructions,
456                                                 VariableInstructions,
457                                                 Owner->Operands,
458                                                 BitValueArray,
459                                                 *Owner)
460                               ));
461   }
462 
463   // No need to recurse for a singleton filtered instruction.
464   // See also Filter::emit().
465   if (getNumFiltered() == 1) {
466     //Owner->SingletonExists(LastOpcFiltered);
467     assert(FilterChooserMap.size() == 1);
468     return;
469   }
470 
471   // Otherwise, create sub choosers.
472   for (mapIterator = FilteredInstructions.begin();
473        mapIterator != FilteredInstructions.end();
474        mapIterator++) {
475 
476     // Marks all the segment positions with either BIT_TRUE or BIT_FALSE.
477     for (bitIndex = 0; bitIndex < NumBits; bitIndex++) {
478       if (mapIterator->first & (1ULL << bitIndex))
479         BitValueArray[StartBit + bitIndex] = BIT_TRUE;
480       else
481         BitValueArray[StartBit + bitIndex] = BIT_FALSE;
482     }
483 
484     // Delegates to an inferior filter chooser for further processing on this
485     // category of instructions.
486     FilterChooserMap.insert(std::pair<unsigned, FilterChooser*>(
487                               mapIterator->first,
488                               new FilterChooser(Owner->AllInstructions,
489                                                 mapIterator->second,
490                                                 Owner->Operands,
491                                                 BitValueArray,
492                                                 *Owner)
493                               ));
494   }
495 }
496 
497 // Emit code to decode instructions given a segment or segments of bits.
emit(raw_ostream & o,unsigned & Indentation)498 void Filter::emit(raw_ostream &o, unsigned &Indentation) {
499   o.indent(Indentation) << "// Check Inst{";
500 
501   if (NumBits > 1)
502     o << (StartBit + NumBits - 1) << '-';
503 
504   o << StartBit << "} ...\n";
505 
506   o.indent(Indentation) << "switch (fieldFromInstruction" << Owner->BitWidth
507                         << "(insn, " << StartBit << ", "
508                         << NumBits << ")) {\n";
509 
510   std::map<unsigned, FilterChooser*>::iterator filterIterator;
511 
512   bool DefaultCase = false;
513   for (filterIterator = FilterChooserMap.begin();
514        filterIterator != FilterChooserMap.end();
515        filterIterator++) {
516 
517     // Field value -1 implies a non-empty set of variable instructions.
518     // See also recurse().
519     if (filterIterator->first == (unsigned)-1) {
520       DefaultCase = true;
521 
522       o.indent(Indentation) << "default:\n";
523       o.indent(Indentation) << "  break; // fallthrough\n";
524 
525       // Closing curly brace for the switch statement.
526       // This is unconventional because we want the default processing to be
527       // performed for the fallthrough cases as well, i.e., when the "cases"
528       // did not prove a decoded instruction.
529       o.indent(Indentation) << "}\n";
530 
531     } else
532       o.indent(Indentation) << "case " << filterIterator->first << ":\n";
533 
534     // We arrive at a category of instructions with the same segment value.
535     // Now delegate to the sub filter chooser for further decodings.
536     // The case may fallthrough, which happens if the remaining well-known
537     // encoding bits do not match exactly.
538     if (!DefaultCase) { ++Indentation; ++Indentation; }
539 
540     bool finished = filterIterator->second->emit(o, Indentation);
541     // For top level default case, there's no need for a break statement.
542     if (Owner->isTopLevel() && DefaultCase)
543       break;
544     if (!finished)
545       o.indent(Indentation) << "break;\n";
546 
547     if (!DefaultCase) { --Indentation; --Indentation; }
548   }
549 
550   // If there is no default case, we still need to supply a closing brace.
551   if (!DefaultCase) {
552     // Closing curly brace for the switch statement.
553     o.indent(Indentation) << "}\n";
554   }
555 }
556 
557 // Returns the number of fanout produced by the filter.  More fanout implies
558 // the filter distinguishes more categories of instructions.
usefulness() const559 unsigned Filter::usefulness() const {
560   if (VariableInstructions.size())
561     return FilteredInstructions.size();
562   else
563     return FilteredInstructions.size() + 1;
564 }
565 
566 //////////////////////////////////
567 //                              //
568 // Filterchooser Implementation //
569 //                              //
570 //////////////////////////////////
571 
572 // Emit the top level typedef and decodeInstruction() function.
emitTop(raw_ostream & o,unsigned Indentation,std::string Namespace)573 void FilterChooser::emitTop(raw_ostream &o, unsigned Indentation,
574                             std::string Namespace) {
575   o.indent(Indentation) <<
576     "static MCDisassembler::DecodeStatus decode" << Namespace << "Instruction" << BitWidth
577     << "(MCInst &MI, uint" << BitWidth << "_t insn, uint64_t Address, "
578     << "const void *Decoder, const MCSubtargetInfo &STI) {\n";
579   o.indent(Indentation) << "  unsigned tmp = 0;\n  (void)tmp;\n" << Emitter->Locals << "\n";
580   o.indent(Indentation) << "  uint64_t Bits = STI.getFeatureBits();\n";
581 
582   ++Indentation; ++Indentation;
583   // Emits code to decode the instructions.
584   emit(o, Indentation);
585 
586   o << '\n';
587   o.indent(Indentation) << "return " << Emitter->ReturnFail << ";\n";
588   --Indentation; --Indentation;
589 
590   o.indent(Indentation) << "}\n";
591 
592   o << '\n';
593 }
594 
595 // Populates the field of the insn given the start position and the number of
596 // consecutive bits to scan for.
597 //
598 // Returns false if and on the first uninitialized bit value encountered.
599 // Returns true, otherwise.
fieldFromInsn(uint64_t & Field,insn_t & Insn,unsigned StartBit,unsigned NumBits) const600 bool FilterChooser::fieldFromInsn(uint64_t &Field, insn_t &Insn,
601     unsigned StartBit, unsigned NumBits) const {
602   Field = 0;
603 
604   for (unsigned i = 0; i < NumBits; ++i) {
605     if (Insn[StartBit + i] == BIT_UNSET)
606       return false;
607 
608     if (Insn[StartBit + i] == BIT_TRUE)
609       Field = Field | (1ULL << i);
610   }
611 
612   return true;
613 }
614 
615 /// dumpFilterArray - dumpFilterArray prints out debugging info for the given
616 /// filter array as a series of chars.
dumpFilterArray(raw_ostream & o,std::vector<bit_value_t> & filter)617 void FilterChooser::dumpFilterArray(raw_ostream &o,
618                                     std::vector<bit_value_t> &filter) {
619   unsigned bitIndex;
620 
621   for (bitIndex = BitWidth; bitIndex > 0; bitIndex--) {
622     switch (filter[bitIndex - 1]) {
623     case BIT_UNFILTERED:
624       o << ".";
625       break;
626     case BIT_UNSET:
627       o << "_";
628       break;
629     case BIT_TRUE:
630       o << "1";
631       break;
632     case BIT_FALSE:
633       o << "0";
634       break;
635     }
636   }
637 }
638 
639 /// dumpStack - dumpStack traverses the filter chooser chain and calls
640 /// dumpFilterArray on each filter chooser up to the top level one.
dumpStack(raw_ostream & o,const char * prefix)641 void FilterChooser::dumpStack(raw_ostream &o, const char *prefix) {
642   FilterChooser *current = this;
643 
644   while (current) {
645     o << prefix;
646     dumpFilterArray(o, current->FilterBitValues);
647     o << '\n';
648     current = current->Parent;
649   }
650 }
651 
652 // Called from Filter::recurse() when singleton exists.  For debug purpose.
SingletonExists(unsigned Opc)653 void FilterChooser::SingletonExists(unsigned Opc) {
654   insn_t Insn0;
655   insnWithID(Insn0, Opc);
656 
657   errs() << "Singleton exists: " << nameWithID(Opc)
658          << " with its decoding dominating ";
659   for (unsigned i = 0; i < Opcodes.size(); ++i) {
660     if (Opcodes[i] == Opc) continue;
661     errs() << nameWithID(Opcodes[i]) << ' ';
662   }
663   errs() << '\n';
664 
665   dumpStack(errs(), "\t\t");
666   for (unsigned i = 0; i < Opcodes.size(); i++) {
667     const std::string &Name = nameWithID(Opcodes[i]);
668 
669     errs() << '\t' << Name << " ";
670     dumpBits(errs(),
671              getBitsField(*AllInstructions[Opcodes[i]]->TheDef, "Inst"));
672     errs() << '\n';
673   }
674 }
675 
676 // Calculates the island(s) needed to decode the instruction.
677 // This returns a list of undecoded bits of an instructions, for example,
678 // Inst{20} = 1 && Inst{3-0} == 0b1111 represents two islands of yet-to-be
679 // decoded bits in order to verify that the instruction matches the Opcode.
getIslands(std::vector<unsigned> & StartBits,std::vector<unsigned> & EndBits,std::vector<uint64_t> & FieldVals,insn_t & Insn)680 unsigned FilterChooser::getIslands(std::vector<unsigned> &StartBits,
681     std::vector<unsigned> &EndBits, std::vector<uint64_t> &FieldVals,
682     insn_t &Insn) {
683   unsigned Num, BitNo;
684   Num = BitNo = 0;
685 
686   uint64_t FieldVal = 0;
687 
688   // 0: Init
689   // 1: Water (the bit value does not affect decoding)
690   // 2: Island (well-known bit value needed for decoding)
691   int State = 0;
692   int Val = -1;
693 
694   for (unsigned i = 0; i < BitWidth; ++i) {
695     Val = Value(Insn[i]);
696     bool Filtered = PositionFiltered(i);
697     switch (State) {
698     default:
699       assert(0 && "Unreachable code!");
700       break;
701     case 0:
702     case 1:
703       if (Filtered || Val == -1)
704         State = 1; // Still in Water
705       else {
706         State = 2; // Into the Island
707         BitNo = 0;
708         StartBits.push_back(i);
709         FieldVal = Val;
710       }
711       break;
712     case 2:
713       if (Filtered || Val == -1) {
714         State = 1; // Into the Water
715         EndBits.push_back(i - 1);
716         FieldVals.push_back(FieldVal);
717         ++Num;
718       } else {
719         State = 2; // Still in Island
720         ++BitNo;
721         FieldVal = FieldVal | Val << BitNo;
722       }
723       break;
724     }
725   }
726   // If we are still in Island after the loop, do some housekeeping.
727   if (State == 2) {
728     EndBits.push_back(BitWidth - 1);
729     FieldVals.push_back(FieldVal);
730     ++Num;
731   }
732 
733   assert(StartBits.size() == Num && EndBits.size() == Num &&
734          FieldVals.size() == Num);
735   return Num;
736 }
737 
emitBinaryParser(raw_ostream & o,unsigned & Indentation,OperandInfo & OpInfo)738 void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation,
739                          OperandInfo &OpInfo) {
740   std::string &Decoder = OpInfo.Decoder;
741 
742   if (OpInfo.numFields() == 1) {
743     OperandInfo::iterator OI = OpInfo.begin();
744     o.indent(Indentation) << "  tmp = fieldFromInstruction" << BitWidth
745                             << "(insn, " << OI->Base << ", " << OI->Width
746                             << ");\n";
747   } else {
748     o.indent(Indentation) << "  tmp = 0;\n";
749     for (OperandInfo::iterator OI = OpInfo.begin(), OE = OpInfo.end();
750          OI != OE; ++OI) {
751       o.indent(Indentation) << "  tmp |= (fieldFromInstruction" << BitWidth
752                             << "(insn, " << OI->Base << ", " << OI->Width
753                             << ") << " << OI->Offset << ");\n";
754     }
755   }
756 
757   if (Decoder != "")
758     o.indent(Indentation) << "  " << Emitter->GuardPrefix << Decoder
759                           << "(MI, tmp, Address, Decoder)" << Emitter->GuardPostfix << "\n";
760   else
761     o.indent(Indentation) << "  MI.addOperand(MCOperand::CreateImm(tmp));\n";
762 
763 }
764 
emitSinglePredicateMatch(raw_ostream & o,StringRef str,std::string PredicateNamespace)765 static void emitSinglePredicateMatch(raw_ostream &o, StringRef str,
766                                      std::string PredicateNamespace) {
767   if (str[0] == '!')
768     o << "!(Bits & " << PredicateNamespace << "::"
769       << str.slice(1,str.size()) << ")";
770   else
771     o << "(Bits & " << PredicateNamespace << "::" << str << ")";
772 }
773 
emitPredicateMatch(raw_ostream & o,unsigned & Indentation,unsigned Opc)774 bool FilterChooser::emitPredicateMatch(raw_ostream &o, unsigned &Indentation,
775                                            unsigned Opc) {
776   ListInit *Predicates = AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
777   for (unsigned i = 0; i < Predicates->getSize(); ++i) {
778     Record *Pred = Predicates->getElementAsRecord(i);
779     if (!Pred->getValue("AssemblerMatcherPredicate"))
780       continue;
781 
782     std::string P = Pred->getValueAsString("AssemblerCondString");
783 
784     if (!P.length())
785       continue;
786 
787     if (i != 0)
788       o << " && ";
789 
790     StringRef SR(P);
791     std::pair<StringRef, StringRef> pairs = SR.split(',');
792     while (pairs.second.size()) {
793       emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace);
794       o << " && ";
795       pairs = pairs.second.split(',');
796     }
797     emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace);
798   }
799   return Predicates->getSize() > 0;
800 }
801 
802 // Emits code to decode the singleton.  Return true if we have matched all the
803 // well-known bits.
emitSingletonDecoder(raw_ostream & o,unsigned & Indentation,unsigned Opc)804 bool FilterChooser::emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,
805                                          unsigned Opc) {
806   std::vector<unsigned> StartBits;
807   std::vector<unsigned> EndBits;
808   std::vector<uint64_t> FieldVals;
809   insn_t Insn;
810   insnWithID(Insn, Opc);
811 
812   // Look for islands of undecoded bits of the singleton.
813   getIslands(StartBits, EndBits, FieldVals, Insn);
814 
815   unsigned Size = StartBits.size();
816   unsigned I, NumBits;
817 
818   // If we have matched all the well-known bits, just issue a return.
819   if (Size == 0) {
820     o.indent(Indentation) << "if (";
821     if (!emitPredicateMatch(o, Indentation, Opc))
822       o << "1";
823     o << ") {\n";
824     o.indent(Indentation) << "  MI.setOpcode(" << Opc << ");\n";
825     std::vector<OperandInfo>& InsnOperands = Operands[Opc];
826     for (std::vector<OperandInfo>::iterator
827          I = InsnOperands.begin(), E = InsnOperands.end(); I != E; ++I) {
828       // If a custom instruction decoder was specified, use that.
829       if (I->numFields() == 0 && I->Decoder.size()) {
830         o.indent(Indentation) << "  " << Emitter->GuardPrefix << I->Decoder
831                               << "(MI, insn, Address, Decoder)" << Emitter->GuardPostfix << "\n";
832         break;
833       }
834 
835       emitBinaryParser(o, Indentation, *I);
836     }
837 
838     o.indent(Indentation) << "  return " << Emitter->ReturnOK << "; // " << nameWithID(Opc)
839                           << '\n';
840     o.indent(Indentation) << "}\n"; // Closing predicate block.
841     return true;
842   }
843 
844   // Otherwise, there are more decodings to be done!
845 
846   // Emit code to match the island(s) for the singleton.
847   o.indent(Indentation) << "// Check ";
848 
849   for (I = Size; I != 0; --I) {
850     o << "Inst{" << EndBits[I-1] << '-' << StartBits[I-1] << "} ";
851     if (I > 1)
852       o << " && ";
853     else
854       o << "for singleton decoding...\n";
855   }
856 
857   o.indent(Indentation) << "if (";
858   if (emitPredicateMatch(o, Indentation, Opc)) {
859     o << " &&\n";
860     o.indent(Indentation+4);
861   }
862 
863   for (I = Size; I != 0; --I) {
864     NumBits = EndBits[I-1] - StartBits[I-1] + 1;
865     o << "fieldFromInstruction" << BitWidth << "(insn, "
866       << StartBits[I-1] << ", " << NumBits
867       << ") == " << FieldVals[I-1];
868     if (I > 1)
869       o << " && ";
870     else
871       o << ") {\n";
872   }
873   o.indent(Indentation) << "  MI.setOpcode(" << Opc << ");\n";
874   std::vector<OperandInfo>& InsnOperands = Operands[Opc];
875   for (std::vector<OperandInfo>::iterator
876        I = InsnOperands.begin(), E = InsnOperands.end(); I != E; ++I) {
877     // If a custom instruction decoder was specified, use that.
878     if (I->numFields() == 0 && I->Decoder.size()) {
879       o.indent(Indentation) << "  " << Emitter->GuardPrefix << I->Decoder
880                             << "(MI, insn, Address, Decoder)" << Emitter->GuardPostfix << "\n";
881       break;
882     }
883 
884     emitBinaryParser(o, Indentation, *I);
885   }
886   o.indent(Indentation) << "  return " << Emitter->ReturnOK << "; // " << nameWithID(Opc)
887                         << '\n';
888   o.indent(Indentation) << "}\n";
889 
890   return false;
891 }
892 
893 // Emits code to decode the singleton, and then to decode the rest.
emitSingletonDecoder(raw_ostream & o,unsigned & Indentation,Filter & Best)894 void FilterChooser::emitSingletonDecoder(raw_ostream &o, unsigned &Indentation,
895     Filter &Best) {
896 
897   unsigned Opc = Best.getSingletonOpc();
898 
899   emitSingletonDecoder(o, Indentation, Opc);
900 
901   // Emit code for the rest.
902   o.indent(Indentation) << "else\n";
903 
904   Indentation += 2;
905   Best.getVariableFC().emit(o, Indentation);
906   Indentation -= 2;
907 }
908 
909 // Assign a single filter and run with it.  Top level API client can initialize
910 // with a single filter to start the filtering process.
runSingleFilter(FilterChooser & owner,unsigned startBit,unsigned numBit,bool mixed)911 void FilterChooser::runSingleFilter(FilterChooser &owner, unsigned startBit,
912     unsigned numBit, bool mixed) {
913   Filters.clear();
914   Filter F(*this, startBit, numBit, true);
915   Filters.push_back(F);
916   BestIndex = 0; // Sole Filter instance to choose from.
917   bestFilter().recurse();
918 }
919 
920 // reportRegion is a helper function for filterProcessor to mark a region as
921 // eligible for use as a filter region.
reportRegion(bitAttr_t RA,unsigned StartBit,unsigned BitIndex,bool AllowMixed)922 void FilterChooser::reportRegion(bitAttr_t RA, unsigned StartBit,
923     unsigned BitIndex, bool AllowMixed) {
924   if (RA == ATTR_MIXED && AllowMixed)
925     Filters.push_back(Filter(*this, StartBit, BitIndex - StartBit, true));
926   else if (RA == ATTR_ALL_SET && !AllowMixed)
927     Filters.push_back(Filter(*this, StartBit, BitIndex - StartBit, false));
928 }
929 
930 // FilterProcessor scans the well-known encoding bits of the instructions and
931 // builds up a list of candidate filters.  It chooses the best filter and
932 // recursively descends down the decoding tree.
filterProcessor(bool AllowMixed,bool Greedy)933 bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
934   Filters.clear();
935   BestIndex = -1;
936   unsigned numInstructions = Opcodes.size();
937 
938   assert(numInstructions && "Filter created with no instructions");
939 
940   // No further filtering is necessary.
941   if (numInstructions == 1)
942     return true;
943 
944   // Heuristics.  See also doFilter()'s "Heuristics" comment when num of
945   // instructions is 3.
946   if (AllowMixed && !Greedy) {
947     assert(numInstructions == 3);
948 
949     for (unsigned i = 0; i < Opcodes.size(); ++i) {
950       std::vector<unsigned> StartBits;
951       std::vector<unsigned> EndBits;
952       std::vector<uint64_t> FieldVals;
953       insn_t Insn;
954 
955       insnWithID(Insn, Opcodes[i]);
956 
957       // Look for islands of undecoded bits of any instruction.
958       if (getIslands(StartBits, EndBits, FieldVals, Insn) > 0) {
959         // Found an instruction with island(s).  Now just assign a filter.
960         runSingleFilter(*this, StartBits[0], EndBits[0] - StartBits[0] + 1,
961                         true);
962         return true;
963       }
964     }
965   }
966 
967   unsigned BitIndex, InsnIndex;
968 
969   // We maintain BIT_WIDTH copies of the bitAttrs automaton.
970   // The automaton consumes the corresponding bit from each
971   // instruction.
972   //
973   //   Input symbols: 0, 1, and _ (unset).
974   //   States:        NONE, FILTERED, ALL_SET, ALL_UNSET, and MIXED.
975   //   Initial state: NONE.
976   //
977   // (NONE) ------- [01] -> (ALL_SET)
978   // (NONE) ------- _ ----> (ALL_UNSET)
979   // (ALL_SET) ---- [01] -> (ALL_SET)
980   // (ALL_SET) ---- _ ----> (MIXED)
981   // (ALL_UNSET) -- [01] -> (MIXED)
982   // (ALL_UNSET) -- _ ----> (ALL_UNSET)
983   // (MIXED) ------ . ----> (MIXED)
984   // (FILTERED)---- . ----> (FILTERED)
985 
986   std::vector<bitAttr_t> bitAttrs;
987 
988   // FILTERED bit positions provide no entropy and are not worthy of pursuing.
989   // Filter::recurse() set either BIT_TRUE or BIT_FALSE for each position.
990   for (BitIndex = 0; BitIndex < BitWidth; ++BitIndex)
991     if (FilterBitValues[BitIndex] == BIT_TRUE ||
992         FilterBitValues[BitIndex] == BIT_FALSE)
993       bitAttrs.push_back(ATTR_FILTERED);
994     else
995       bitAttrs.push_back(ATTR_NONE);
996 
997   for (InsnIndex = 0; InsnIndex < numInstructions; ++InsnIndex) {
998     insn_t insn;
999 
1000     insnWithID(insn, Opcodes[InsnIndex]);
1001 
1002     for (BitIndex = 0; BitIndex < BitWidth; ++BitIndex) {
1003       switch (bitAttrs[BitIndex]) {
1004       case ATTR_NONE:
1005         if (insn[BitIndex] == BIT_UNSET)
1006           bitAttrs[BitIndex] = ATTR_ALL_UNSET;
1007         else
1008           bitAttrs[BitIndex] = ATTR_ALL_SET;
1009         break;
1010       case ATTR_ALL_SET:
1011         if (insn[BitIndex] == BIT_UNSET)
1012           bitAttrs[BitIndex] = ATTR_MIXED;
1013         break;
1014       case ATTR_ALL_UNSET:
1015         if (insn[BitIndex] != BIT_UNSET)
1016           bitAttrs[BitIndex] = ATTR_MIXED;
1017         break;
1018       case ATTR_MIXED:
1019       case ATTR_FILTERED:
1020         break;
1021       }
1022     }
1023   }
1024 
1025   // The regionAttr automaton consumes the bitAttrs automatons' state,
1026   // lowest-to-highest.
1027   //
1028   //   Input symbols: F(iltered), (all_)S(et), (all_)U(nset), M(ixed)
1029   //   States:        NONE, ALL_SET, MIXED
1030   //   Initial state: NONE
1031   //
1032   // (NONE) ----- F --> (NONE)
1033   // (NONE) ----- S --> (ALL_SET)     ; and set region start
1034   // (NONE) ----- U --> (NONE)
1035   // (NONE) ----- M --> (MIXED)       ; and set region start
1036   // (ALL_SET) -- F --> (NONE)        ; and report an ALL_SET region
1037   // (ALL_SET) -- S --> (ALL_SET)
1038   // (ALL_SET) -- U --> (NONE)        ; and report an ALL_SET region
1039   // (ALL_SET) -- M --> (MIXED)       ; and report an ALL_SET region
1040   // (MIXED) ---- F --> (NONE)        ; and report a MIXED region
1041   // (MIXED) ---- S --> (ALL_SET)     ; and report a MIXED region
1042   // (MIXED) ---- U --> (NONE)        ; and report a MIXED region
1043   // (MIXED) ---- M --> (MIXED)
1044 
1045   bitAttr_t RA = ATTR_NONE;
1046   unsigned StartBit = 0;
1047 
1048   for (BitIndex = 0; BitIndex < BitWidth; BitIndex++) {
1049     bitAttr_t bitAttr = bitAttrs[BitIndex];
1050 
1051     assert(bitAttr != ATTR_NONE && "Bit without attributes");
1052 
1053     switch (RA) {
1054     case ATTR_NONE:
1055       switch (bitAttr) {
1056       case ATTR_FILTERED:
1057         break;
1058       case ATTR_ALL_SET:
1059         StartBit = BitIndex;
1060         RA = ATTR_ALL_SET;
1061         break;
1062       case ATTR_ALL_UNSET:
1063         break;
1064       case ATTR_MIXED:
1065         StartBit = BitIndex;
1066         RA = ATTR_MIXED;
1067         break;
1068       default:
1069         assert(0 && "Unexpected bitAttr!");
1070       }
1071       break;
1072     case ATTR_ALL_SET:
1073       switch (bitAttr) {
1074       case ATTR_FILTERED:
1075         reportRegion(RA, StartBit, BitIndex, AllowMixed);
1076         RA = ATTR_NONE;
1077         break;
1078       case ATTR_ALL_SET:
1079         break;
1080       case ATTR_ALL_UNSET:
1081         reportRegion(RA, StartBit, BitIndex, AllowMixed);
1082         RA = ATTR_NONE;
1083         break;
1084       case ATTR_MIXED:
1085         reportRegion(RA, StartBit, BitIndex, AllowMixed);
1086         StartBit = BitIndex;
1087         RA = ATTR_MIXED;
1088         break;
1089       default:
1090         assert(0 && "Unexpected bitAttr!");
1091       }
1092       break;
1093     case ATTR_MIXED:
1094       switch (bitAttr) {
1095       case ATTR_FILTERED:
1096         reportRegion(RA, StartBit, BitIndex, AllowMixed);
1097         StartBit = BitIndex;
1098         RA = ATTR_NONE;
1099         break;
1100       case ATTR_ALL_SET:
1101         reportRegion(RA, StartBit, BitIndex, AllowMixed);
1102         StartBit = BitIndex;
1103         RA = ATTR_ALL_SET;
1104         break;
1105       case ATTR_ALL_UNSET:
1106         reportRegion(RA, StartBit, BitIndex, AllowMixed);
1107         RA = ATTR_NONE;
1108         break;
1109       case ATTR_MIXED:
1110         break;
1111       default:
1112         assert(0 && "Unexpected bitAttr!");
1113       }
1114       break;
1115     case ATTR_ALL_UNSET:
1116       assert(0 && "regionAttr state machine has no ATTR_UNSET state");
1117     case ATTR_FILTERED:
1118       assert(0 && "regionAttr state machine has no ATTR_FILTERED state");
1119     }
1120   }
1121 
1122   // At the end, if we're still in ALL_SET or MIXED states, report a region
1123   switch (RA) {
1124   case ATTR_NONE:
1125     break;
1126   case ATTR_FILTERED:
1127     break;
1128   case ATTR_ALL_SET:
1129     reportRegion(RA, StartBit, BitIndex, AllowMixed);
1130     break;
1131   case ATTR_ALL_UNSET:
1132     break;
1133   case ATTR_MIXED:
1134     reportRegion(RA, StartBit, BitIndex, AllowMixed);
1135     break;
1136   }
1137 
1138   // We have finished with the filter processings.  Now it's time to choose
1139   // the best performing filter.
1140   BestIndex = 0;
1141   bool AllUseless = true;
1142   unsigned BestScore = 0;
1143 
1144   for (unsigned i = 0, e = Filters.size(); i != e; ++i) {
1145     unsigned Usefulness = Filters[i].usefulness();
1146 
1147     if (Usefulness)
1148       AllUseless = false;
1149 
1150     if (Usefulness > BestScore) {
1151       BestIndex = i;
1152       BestScore = Usefulness;
1153     }
1154   }
1155 
1156   if (!AllUseless)
1157     bestFilter().recurse();
1158 
1159   return !AllUseless;
1160 } // end of FilterChooser::filterProcessor(bool)
1161 
1162 // Decides on the best configuration of filter(s) to use in order to decode
1163 // the instructions.  A conflict of instructions may occur, in which case we
1164 // dump the conflict set to the standard error.
doFilter()1165 void FilterChooser::doFilter() {
1166   unsigned Num = Opcodes.size();
1167   assert(Num && "FilterChooser created with no instructions");
1168 
1169   // Try regions of consecutive known bit values first.
1170   if (filterProcessor(false))
1171     return;
1172 
1173   // Then regions of mixed bits (both known and unitialized bit values allowed).
1174   if (filterProcessor(true))
1175     return;
1176 
1177   // Heuristics to cope with conflict set {t2CMPrs, t2SUBSrr, t2SUBSrs} where
1178   // no single instruction for the maximum ATTR_MIXED region Inst{14-4} has a
1179   // well-known encoding pattern.  In such case, we backtrack and scan for the
1180   // the very first consecutive ATTR_ALL_SET region and assign a filter to it.
1181   if (Num == 3 && filterProcessor(true, false))
1182     return;
1183 
1184   // If we come to here, the instruction decoding has failed.
1185   // Set the BestIndex to -1 to indicate so.
1186   BestIndex = -1;
1187 }
1188 
1189 // Emits code to decode our share of instructions.  Returns true if the
1190 // emitted code causes a return, which occurs if we know how to decode
1191 // the instruction at this level or the instruction is not decodeable.
emit(raw_ostream & o,unsigned & Indentation)1192 bool FilterChooser::emit(raw_ostream &o, unsigned &Indentation) {
1193   if (Opcodes.size() == 1)
1194     // There is only one instruction in the set, which is great!
1195     // Call emitSingletonDecoder() to see whether there are any remaining
1196     // encodings bits.
1197     return emitSingletonDecoder(o, Indentation, Opcodes[0]);
1198 
1199   // Choose the best filter to do the decodings!
1200   if (BestIndex != -1) {
1201     Filter &Best = bestFilter();
1202     if (Best.getNumFiltered() == 1)
1203       emitSingletonDecoder(o, Indentation, Best);
1204     else
1205       bestFilter().emit(o, Indentation);
1206     return false;
1207   }
1208 
1209   // We don't know how to decode these instructions!  Return 0 and dump the
1210   // conflict set!
1211   o.indent(Indentation) << "return 0;" << " // Conflict set: ";
1212   for (int i = 0, N = Opcodes.size(); i < N; ++i) {
1213     o << nameWithID(Opcodes[i]);
1214     if (i < (N - 1))
1215       o << ", ";
1216     else
1217       o << '\n';
1218   }
1219 
1220   // Print out useful conflict information for postmortem analysis.
1221   errs() << "Decoding Conflict:\n";
1222 
1223   dumpStack(errs(), "\t\t");
1224 
1225   for (unsigned i = 0; i < Opcodes.size(); i++) {
1226     const std::string &Name = nameWithID(Opcodes[i]);
1227 
1228     errs() << '\t' << Name << " ";
1229     dumpBits(errs(),
1230              getBitsField(*AllInstructions[Opcodes[i]]->TheDef, "Inst"));
1231     errs() << '\n';
1232   }
1233 
1234   return true;
1235 }
1236 
populateInstruction(const CodeGenInstruction & CGI,unsigned Opc,std::map<unsigned,std::vector<OperandInfo>> & Operands)1237 static bool populateInstruction(const CodeGenInstruction &CGI,
1238                                 unsigned Opc,
1239                       std::map<unsigned, std::vector<OperandInfo> >& Operands){
1240   const Record &Def = *CGI.TheDef;
1241   // If all the bit positions are not specified; do not decode this instruction.
1242   // We are bound to fail!  For proper disassembly, the well-known encoding bits
1243   // of the instruction must be fully specified.
1244   //
1245   // This also removes pseudo instructions from considerations of disassembly,
1246   // which is a better design and less fragile than the name matchings.
1247   // Ignore "asm parser only" instructions.
1248   if (Def.getValueAsBit("isAsmParserOnly") ||
1249       Def.getValueAsBit("isCodeGenOnly"))
1250     return false;
1251 
1252   BitsInit &Bits = getBitsField(Def, "Inst");
1253   if (Bits.allInComplete()) return false;
1254 
1255   std::vector<OperandInfo> InsnOperands;
1256 
1257   // If the instruction has specified a custom decoding hook, use that instead
1258   // of trying to auto-generate the decoder.
1259   std::string InstDecoder = Def.getValueAsString("DecoderMethod");
1260   if (InstDecoder != "") {
1261     InsnOperands.push_back(OperandInfo(InstDecoder));
1262     Operands[Opc] = InsnOperands;
1263     return true;
1264   }
1265 
1266   // Generate a description of the operand of the instruction that we know
1267   // how to decode automatically.
1268   // FIXME: We'll need to have a way to manually override this as needed.
1269 
1270   // Gather the outputs/inputs of the instruction, so we can find their
1271   // positions in the encoding.  This assumes for now that they appear in the
1272   // MCInst in the order that they're listed.
1273   std::vector<std::pair<Init*, std::string> > InOutOperands;
1274   DagInit *Out  = Def.getValueAsDag("OutOperandList");
1275   DagInit *In  = Def.getValueAsDag("InOperandList");
1276   for (unsigned i = 0; i < Out->getNumArgs(); ++i)
1277     InOutOperands.push_back(std::make_pair(Out->getArg(i), Out->getArgName(i)));
1278   for (unsigned i = 0; i < In->getNumArgs(); ++i)
1279     InOutOperands.push_back(std::make_pair(In->getArg(i), In->getArgName(i)));
1280 
1281   // Search for tied operands, so that we can correctly instantiate
1282   // operands that are not explicitly represented in the encoding.
1283   std::map<std::string, std::string> TiedNames;
1284   for (unsigned i = 0; i < CGI.Operands.size(); ++i) {
1285     int tiedTo = CGI.Operands[i].getTiedRegister();
1286     if (tiedTo != -1) {
1287       TiedNames[InOutOperands[i].second] = InOutOperands[tiedTo].second;
1288       TiedNames[InOutOperands[tiedTo].second] = InOutOperands[i].second;
1289     }
1290   }
1291 
1292   // For each operand, see if we can figure out where it is encoded.
1293   for (std::vector<std::pair<Init*, std::string> >::iterator
1294        NI = InOutOperands.begin(), NE = InOutOperands.end(); NI != NE; ++NI) {
1295     std::string Decoder = "";
1296 
1297     // At this point, we can locate the field, but we need to know how to
1298     // interpret it.  As a first step, require the target to provide callbacks
1299     // for decoding register classes.
1300     // FIXME: This need to be extended to handle instructions with custom
1301     // decoder methods, and operands with (simple) MIOperandInfo's.
1302     TypedInit *TI = dynamic_cast<TypedInit*>(NI->first);
1303     RecordRecTy *Type = dynamic_cast<RecordRecTy*>(TI->getType());
1304     Record *TypeRecord = Type->getRecord();
1305     bool isReg = false;
1306     if (TypeRecord->isSubClassOf("RegisterOperand"))
1307       TypeRecord = TypeRecord->getValueAsDef("RegClass");
1308     if (TypeRecord->isSubClassOf("RegisterClass")) {
1309       Decoder = "Decode" + TypeRecord->getName() + "RegisterClass";
1310       isReg = true;
1311     }
1312 
1313     RecordVal *DecoderString = TypeRecord->getValue("DecoderMethod");
1314     StringInit *String = DecoderString ?
1315       dynamic_cast<StringInit*>(DecoderString->getValue()) : 0;
1316     if (!isReg && String && String->getValue() != "")
1317       Decoder = String->getValue();
1318 
1319     OperandInfo OpInfo(Decoder);
1320     unsigned Base = ~0U;
1321     unsigned Width = 0;
1322     unsigned Offset = 0;
1323 
1324     for (unsigned bi = 0; bi < Bits.getNumBits(); ++bi) {
1325       VarInit *Var = 0;
1326       VarBitInit *BI = dynamic_cast<VarBitInit*>(Bits.getBit(bi));
1327       if (BI)
1328         Var = dynamic_cast<VarInit*>(BI->getVariable());
1329       else
1330         Var = dynamic_cast<VarInit*>(Bits.getBit(bi));
1331 
1332       if (!Var) {
1333         if (Base != ~0U) {
1334           OpInfo.addField(Base, Width, Offset);
1335           Base = ~0U;
1336           Width = 0;
1337           Offset = 0;
1338         }
1339         continue;
1340       }
1341 
1342       if (Var->getName() != NI->second &&
1343           Var->getName() != TiedNames[NI->second]) {
1344         if (Base != ~0U) {
1345           OpInfo.addField(Base, Width, Offset);
1346           Base = ~0U;
1347           Width = 0;
1348           Offset = 0;
1349         }
1350         continue;
1351       }
1352 
1353       if (Base == ~0U) {
1354         Base = bi;
1355         Width = 1;
1356         Offset = BI ? BI->getBitNum() : 0;
1357       } else if (BI && BI->getBitNum() != Offset + Width) {
1358         OpInfo.addField(Base, Width, Offset);
1359         Base = bi;
1360         Width = 1;
1361         Offset = BI->getBitNum();
1362       } else {
1363         ++Width;
1364       }
1365     }
1366 
1367     if (Base != ~0U)
1368       OpInfo.addField(Base, Width, Offset);
1369 
1370     if (OpInfo.numFields() > 0)
1371       InsnOperands.push_back(OpInfo);
1372   }
1373 
1374   Operands[Opc] = InsnOperands;
1375 
1376 
1377 #if 0
1378   DEBUG({
1379       // Dumps the instruction encoding bits.
1380       dumpBits(errs(), Bits);
1381 
1382       errs() << '\n';
1383 
1384       // Dumps the list of operand info.
1385       for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
1386         const CGIOperandList::OperandInfo &Info = CGI.Operands[i];
1387         const std::string &OperandName = Info.Name;
1388         const Record &OperandDef = *Info.Rec;
1389 
1390         errs() << "\t" << OperandName << " (" << OperandDef.getName() << ")\n";
1391       }
1392     });
1393 #endif
1394 
1395   return true;
1396 }
1397 
emitHelper(llvm::raw_ostream & o,unsigned BitWidth)1398 static void emitHelper(llvm::raw_ostream &o, unsigned BitWidth) {
1399   unsigned Indentation = 0;
1400   std::string WidthStr = "uint" + utostr(BitWidth) + "_t";
1401 
1402   o << '\n';
1403 
1404   o.indent(Indentation) << "static " << WidthStr <<
1405     " fieldFromInstruction" << BitWidth <<
1406     "(" << WidthStr <<" insn, unsigned startBit, unsigned numBits)\n";
1407 
1408   o.indent(Indentation) << "{\n";
1409 
1410   ++Indentation; ++Indentation;
1411   o.indent(Indentation) << "assert(startBit + numBits <= " << BitWidth
1412                         << " && \"Instruction field out of bounds!\");\n";
1413   o << '\n';
1414   o.indent(Indentation) << WidthStr << " fieldMask;\n";
1415   o << '\n';
1416   o.indent(Indentation) << "if (numBits == " << BitWidth << ")\n";
1417 
1418   ++Indentation; ++Indentation;
1419   o.indent(Indentation) << "fieldMask = (" << WidthStr << ")-1;\n";
1420   --Indentation; --Indentation;
1421 
1422   o.indent(Indentation) << "else\n";
1423 
1424   ++Indentation; ++Indentation;
1425   o.indent(Indentation) << "fieldMask = ((1 << numBits) - 1) << startBit;\n";
1426   --Indentation; --Indentation;
1427 
1428   o << '\n';
1429   o.indent(Indentation) << "return (insn & fieldMask) >> startBit;\n";
1430   --Indentation; --Indentation;
1431 
1432   o.indent(Indentation) << "}\n";
1433 
1434   o << '\n';
1435 }
1436 
1437 // Emits disassembler code for instruction decoding.
run(raw_ostream & o)1438 void FixedLenDecoderEmitter::run(raw_ostream &o)
1439 {
1440   o << "#include \"llvm/MC/MCInst.h\"\n";
1441   o << "#include \"llvm/Support/DataTypes.h\"\n";
1442   o << "#include <assert.h>\n";
1443   o << '\n';
1444   o << "namespace llvm {\n\n";
1445 
1446   // Parameterize the decoders based on namespace and instruction width.
1447   NumberedInstructions = Target.getInstructionsByEnumValue();
1448   std::map<std::pair<std::string, unsigned>,
1449            std::vector<unsigned> > OpcMap;
1450   std::map<unsigned, std::vector<OperandInfo> > Operands;
1451 
1452   for (unsigned i = 0; i < NumberedInstructions.size(); ++i) {
1453     const CodeGenInstruction *Inst = NumberedInstructions[i];
1454     Record *Def = Inst->TheDef;
1455     unsigned Size = Def->getValueAsInt("Size");
1456     if (Def->getValueAsString("Namespace") == "TargetOpcode" ||
1457         Def->getValueAsBit("isPseudo") ||
1458         Def->getValueAsBit("isAsmParserOnly") ||
1459         Def->getValueAsBit("isCodeGenOnly"))
1460       continue;
1461 
1462     std::string DecoderNamespace = Def->getValueAsString("DecoderNamespace");
1463 
1464     if (Size) {
1465       if (populateInstruction(*Inst, i, Operands)) {
1466         OpcMap[std::make_pair(DecoderNamespace, Size)].push_back(i);
1467       }
1468     }
1469   }
1470 
1471   std::set<unsigned> Sizes;
1472   for (std::map<std::pair<std::string, unsigned>,
1473                 std::vector<unsigned> >::iterator
1474        I = OpcMap.begin(), E = OpcMap.end(); I != E; ++I) {
1475     // If we haven't visited this instruction width before, emit the
1476     // helper method to extract fields.
1477     if (!Sizes.count(I->first.second)) {
1478       emitHelper(o, 8*I->first.second);
1479       Sizes.insert(I->first.second);
1480     }
1481 
1482     // Emit the decoder for this namespace+width combination.
1483     FilterChooser FC(NumberedInstructions, I->second, Operands,
1484                      8*I->first.second, this);
1485     FC.emitTop(o, 0, I->first.first);
1486   }
1487 
1488   o << "\n} // End llvm namespace \n";
1489 }
1490