| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 1091 unsigned OpReg = getRegForValue(TI->getOperand(0)); in X86SelectBranch() local 1114 unsigned OpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local 1127 unsigned CReg = 0, OpReg = 0; in X86SelectShift() local 1240 unsigned OpReg = getRegForValue(V); in X86SelectFPExt() local 1259 unsigned OpReg = getRegForValue(V); in X86SelectFPTrunc() local
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1654 unsigned OpReg = getRegForValue(TI->getOperand(0)); in X86SelectBranch() local 1690 unsigned OpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local 1702 unsigned CReg = 0, OpReg = 0; in X86SelectShift() local 2240 unsigned OpReg = getRegForValue(Opnd); in X86SelectSelect() local 2281 unsigned OpReg = getRegForValue(I->getOperand(0)); in X86SelectSIToFP() local 2316 unsigned OpReg = getRegForValue(I->getOperand(0)); in X86SelectFPExtOrFPTrunc() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 341 unsigned OpReg = MI.getOperand(0).getReg(); in narrowScalar() local 394 unsigned OpReg = MI.getOperand(2).getReg(); in narrowScalar() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1736 unsigned OpReg = getRegForValue(TI->getOperand(0)); in X86SelectBranch() local 1773 unsigned OpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local 1796 unsigned CReg = 0, OpReg = 0; in X86SelectShift() local 2389 unsigned OpReg = getRegForValue(Opnd); in X86SelectSelect() local 2435 unsigned OpReg = getRegForValue(I->getOperand(0)); in X86SelectIntToFP() local 2489 unsigned OpReg = getRegForValue(I->getOperand(0)); in X86SelectFPExtOrFPTrunc() local
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| D | X86SpeculativeLoadHardening.cpp | 1763 unsigned OpReg = Op->getReg(); in hardenLoadAddr() local
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 176 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandVectorVT() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 218 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandNumElts() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 300 unsigned OpReg = MI->getOperand(I).getReg(); in optimizeSDPattern() local
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| D | ARMInstructionSelector.cpp | 852 unsigned OpReg = I.getOperand(2).getReg(); in select() local
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| D | ARMFastISel.cpp | 1278 unsigned OpReg = getRegForValue(TI->getOperand(0)); in SelectBranch() local
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| /external/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 306 unsigned OpReg = MI->getOperand(I).getReg(); in optimizeSDPattern() local
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| D | ARMFastISel.cpp | 1277 unsigned OpReg = getRegForValue(TI->getOperand(0)); in SelectBranch() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.cpp | 163 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet, in encodeRegister() 172 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister() 177 IValueT encodeFPRegister(const Operand *OpReg, const char *RegName, in encodeFPRegister()
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| D | IceAssemblerARM32.cpp | 540 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet, in encodeRegister() 549 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister() 554 IValueT encodeSRegister(const Operand *OpReg, const char *RegName, in encodeSRegister() 559 IValueT encodeDRegister(const Operand *OpReg, const char *RegName, in encodeDRegister() 564 IValueT encodeQRegister(const Operand *OpReg, const char *RegName, in encodeQRegister()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 796 unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); in SelectFNeg() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1634 unsigned OpReg = MO.getReg(); in clearRegisterKills() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1168 unsigned OpReg = getRegForValue(TI->getOperand(0)); in SelectBranch() local
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 2013 unsigned OpReg = MO.getReg(); in clearRegisterKills() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 3968 unsigned OpReg = Inst.getOperand(i).getReg(); in checkLowRegisterList() local 3982 unsigned OpReg = Inst.getOperand(i).getReg(); in listContainsReg() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1478 unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); in selectFNeg() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1683 unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); in selectFNeg() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6291 unsigned OpReg = Inst.getOperand(i).getReg(); in checkLowRegisterList() local 6305 unsigned OpReg = Inst.getOperand(i).getReg(); in listContainsReg() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6106 unsigned OpReg = Inst.getOperand(i).getReg(); in checkLowRegisterList() local 6120 unsigned OpReg = Inst.getOperand(i).getReg(); in listContainsReg() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 3452 unsigned OpReg = Op.getReg(); in legalizeGenericOperand() local
|