| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 2192 __ Or(dst, lhs, rhs_reg); in HandleBinaryOp() local
2242 __ Or(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local
2243 __ Or(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local
2277 __ Or(dst_low, lhs_low, TMP); in HandleBinaryOp() local
2287 __ Or(dst_high, lhs_high, TMP); in HandleBinaryOp() local
2455 __ Or(dst, dst, TMP); in HandleShift() local
2477 __ Or(dst, dst, TMP); in HandleShift() local
2517 __ Or(dst_high, dst_high, TMP); in HandleShift() local
2522 __ Or(dst_low, dst_low, TMP); in HandleShift() local
2527 __ Or(dst_low, dst_low, TMP); in HandleShift() local
[all …]
|
| D | intrinsics_mips.cc | 273 __ Or(out, out, TMP); in GenReverse() local
287 __ Or(out, out, TMP); in GenReverse() local
294 __ Or(out, out, TMP); in GenReverse() local
305 __ Or(out, TMP, out); in GenReverse() local
311 __ Or(out, TMP, out); in GenReverse() local
317 __ Or(out, TMP, out); in GenReverse() local
339 __ Or(TMP, TMP, AT); // Hold in TMP until it's safe in GenReverse() local
346 __ Or(out_lo, out_lo, AT); in GenReverse() local
353 __ Or(out_hi, out_hi, TMP); in GenReverse() local
359 __ Or(out_lo, out_lo, TMP); in GenReverse() local
[all …]
|
| D | code_generator_mips64.cc | 2027 __ Or(dst, lhs, rhs_reg); in HandleBinaryOp() local
4734 __ Or(dst.AsRegister<GpuRegister>(), AT, TMP); in GenConditionalMove() local
6910 __ Or(out, out, AT); in GenerateMinMaxInt() local
|
| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 418 TEST_F(AssemblerMIPSTest, Or) { in TEST_F() argument
2321 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F() local
2467 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F() local
|
| D | assembler_mips.cc | 565 void MipsAssembler::Or(Register rd, Register rs, Register rt) { in Or() function in art::mips::MipsAssembler
|
| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1199 TEST_F(AssemblerMIPS64Test, Or) { in TEST_F() argument
|
| D | assembler_mips64.cc | 383 void Mips64Assembler::Or(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Or() function in art::mips64::Mips64Assembler
|