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Searched defs:Ord (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DLocalStackSlotAllocation.cpp62 FrameRef(MachineInstr *I, int64_t Offset, int Idx, unsigned Ord) : in FrameRef()
/external/spirv-llvm/lib/SPIRV/
DSPIRVToOCL20.cpp362 [](unsigned Ord) { return mapSPIRVMemOrderToOCL(Ord); }); in visitCallSPIRVAtomicBuiltin()
DOCL20ToSPIRV.cpp797 [](unsigned Ord) { in transAtomicBuiltin()
/external/llvm/lib/Target/AArch64/
DAArch64A57FPLoadBalancing.cpp534 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64A57FPLoadBalancing.cpp521 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister() local
DAArch64FastISel.cpp2191 AtomicOrdering Ord = SI->getOrdering(); in selectStore() local
/external/llvm/include/llvm/Target/
DTargetLowering.h1157 AtomicOrdering Ord) const { in emitLoadLinked()
1164 Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional()
1199 AtomicOrdering Ord, bool IsStore, in emitLeadingFence()
1208 AtomicOrdering Ord, bool IsStore, in emitTrailingFence()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetLowering.h1541 AtomicOrdering Ord) const { in emitLoadLinked()
1548 Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional()
1586 AtomicOrdering Ord) const { in emitLeadingFence()
1595 AtomicOrdering Ord) const { in emitTrailingFence()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/ObjectYAML/
DCodeViewYAMLSymbols.cpp168 ThunkOrdinal &Ord) { in enumeration()
/external/swiftshader/third_party/LLVM/bindings/ocaml/llvm/
Dllvm.ml125 | Ord Constructor
Dllvm.mli174 | Ord Constructor
/external/llvm/bindings/ocaml/llvm/
Dllvm.ml137 | Ord Constructor
Dllvm.mli194 | Ord (** Ordered (no operand is NaN) *) Constructor
Dllvm_ocaml.c2056 LLVMValueRef Val, value Ord, in llvm_build_atomicrmw_native()
/external/swiftshader/third_party/llvm-7.0/llvm/bindings/ocaml/llvm/
Dllvm.ml162 | Ord Constructor
Dllvm.mli183 | Ord (** Ordered (no operand is NaN) *) Constructor
Dllvm_ocaml.c2135 LLVMValueRef Val, value Ord, in llvm_build_atomicrmw_native()
/external/llvm/lib/Target/Hexagon/
DHexagonGenInsert.cpp383 const RegisterOrdering &Ord; member in __anon144790630711::OrderedRegisterList
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonGenInsert.cpp411 const RegisterOrdering &Ord; member in __anonb8aaa0bb0311::OrderedRegisterList
/external/llvm/include/llvm/DebugInfo/CodeView/
DSymbolRecord.h94 uint8_t Ord; // ThunkOrdinal enumeration member
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp3014 AtomicOrdering Ord = static_cast<AtomicOrdering>(OrdN->getZExtValue()); in LowerATOMIC_FENCE() local
12356 AtomicOrdering Ord, bool IsStore, in emitLeadingFence()
12381 AtomicOrdering Ord, bool IsStore, in emitTrailingFence()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp8397 AtomicOrdering Ord, bool IsStore, in emitLeadingFence()
8407 AtomicOrdering Ord, bool IsStore, in emitTrailingFence()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp3447 AtomicOrdering Ord = static_cast<AtomicOrdering>(OrdN->getZExtValue()); in LowerATOMIC_FENCE() local