/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | LocalStackSlotAllocation.cpp | 62 FrameRef(MachineInstr *I, int64_t Offset, int Idx, unsigned Ord) : in FrameRef()
|
/external/spirv-llvm/lib/SPIRV/ |
D | SPIRVToOCL20.cpp | 362 [](unsigned Ord) { return mapSPIRVMemOrderToOCL(Ord); }); in visitCallSPIRVAtomicBuiltin()
|
D | OCL20ToSPIRV.cpp | 797 [](unsigned Ord) { in transAtomicBuiltin()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64A57FPLoadBalancing.cpp | 534 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64A57FPLoadBalancing.cpp | 521 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister() local
|
D | AArch64FastISel.cpp | 2191 AtomicOrdering Ord = SI->getOrdering(); in selectStore() local
|
/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 1157 AtomicOrdering Ord) const { in emitLoadLinked() 1164 Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional() 1199 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() 1208 AtomicOrdering Ord, bool IsStore, in emitTrailingFence()
|
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 1541 AtomicOrdering Ord) const { in emitLoadLinked() 1548 Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional() 1586 AtomicOrdering Ord) const { in emitLeadingFence() 1595 AtomicOrdering Ord) const { in emitTrailingFence()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/ObjectYAML/ |
D | CodeViewYAMLSymbols.cpp | 168 ThunkOrdinal &Ord) { in enumeration()
|
/external/swiftshader/third_party/LLVM/bindings/ocaml/llvm/ |
D | llvm.ml | 125 | Ord Constructor
|
D | llvm.mli | 174 | Ord Constructor
|
/external/llvm/bindings/ocaml/llvm/ |
D | llvm.ml | 137 | Ord Constructor
|
D | llvm.mli | 194 | Ord (** Ordered (no operand is NaN) *) Constructor
|
D | llvm_ocaml.c | 2056 LLVMValueRef Val, value Ord, in llvm_build_atomicrmw_native()
|
/external/swiftshader/third_party/llvm-7.0/llvm/bindings/ocaml/llvm/ |
D | llvm.ml | 162 | Ord Constructor
|
D | llvm.mli | 183 | Ord (** Ordered (no operand is NaN) *) Constructor
|
D | llvm_ocaml.c | 2135 LLVMValueRef Val, value Ord, in llvm_build_atomicrmw_native()
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonGenInsert.cpp | 383 const RegisterOrdering &Ord; member in __anon144790630711::OrderedRegisterList
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonGenInsert.cpp | 411 const RegisterOrdering &Ord; member in __anonb8aaa0bb0311::OrderedRegisterList
|
/external/llvm/include/llvm/DebugInfo/CodeView/ |
D | SymbolRecord.h | 94 uint8_t Ord; // ThunkOrdinal enumeration member
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3014 AtomicOrdering Ord = static_cast<AtomicOrdering>(OrdN->getZExtValue()); in LowerATOMIC_FENCE() local 12356 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() 12381 AtomicOrdering Ord, bool IsStore, in emitTrailingFence()
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 8397 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() 8407 AtomicOrdering Ord, bool IsStore, in emitTrailingFence()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3447 AtomicOrdering Ord = static_cast<AtomicOrdering>(OrdN->getZExtValue()); in LowerATOMIC_FENCE() local
|