| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
| D | SparseBitVector.h | 683 void intersectWithComplement(const SparseBitVector<ElementSize> &RHS1, in intersectWithComplement()
729 void intersectWithComplement(const SparseBitVector<ElementSize> *RHS1, in intersectWithComplement()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | GuardWidening.cpp | 410 ConstantInt *RHS0, *RHS1; in widenCondCommon() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | GuardWidening.cpp | 467 ConstantInt *RHS0, *RHS1; in widenCondCommon() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 1088 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); in foldLogicOfFCmps() local
2361 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); in foldXorOfICmps() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 570 SDValue RHS1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_0, in getAVRCmp() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3773 SDValue RHS1 = Op.getOperand(1); in isSaturatingConditional() local
4045 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local
8364 unsigned RHS1 = MI.getOperand(3).getReg(); in EmitInstrWithCustomInserter() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 2922 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local
6199 unsigned RHS1 = MI->getOperand(3).getReg(); in EmitInstrWithCustomInserter() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4303 SDValue RHS1 = Op.getOperand(1); in isSaturatingConditional() local
4653 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local
9401 unsigned RHS1 = MI.getOperand(3).getReg(); in EmitInstrWithCustomInserter() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 1699 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); in simplifyAndOrOfFCmps() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 8445 SDValue RHS1 = Extract128BitVector(RHS, Idx0, DAG, dl); in Lower256IntVSETCC() local
9799 SDValue RHS1 = Extract128BitVector(RHS, Idx0, DAG, dl); in Lower256IntArith() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15123 SDValue RHS1 = extract128BitVector(RHS, 0, DAG, dl); in Lower256IntVSETCC() local
19227 SDValue RHS1 = extract128BitVector(RHS, 0, DAG, dl); in Lower256IntArith() local
19256 SDValue RHS1 = extract256BitVector(RHS, 0, DAG, dl); in Lower512IntArith() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18255 SDValue RHS1 = extract128BitVector(RHS, 0, DAG, dl); in Lower256IntVSETCC() local
22441 SDValue RHS1 = extract128BitVector(RHS, 0, DAG, dl); in Lower256IntArith() local
22470 SDValue RHS1 = extract256BitVector(RHS, 0, DAG, dl); in Lower512IntArith() local
|