| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | LiveRegUnits.h | 57 unsigned Reg = O->getReg(); in accumulateUsedDefed() local
88 void addReg(unsigned Reg) { in addReg()
95 void addRegMasked(unsigned Reg, LaneBitmask Mask) { in addRegMasked()
104 void removeReg(unsigned Reg) { in removeReg()
118 bool available(unsigned Reg) const { in available()
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| D | MachineRegisterInfo.h | 287 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
303 reg_instructions(unsigned Reg) const { in reg_instructions()
318 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
338 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
355 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
372 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
390 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
406 def_instructions(unsigned Reg) const { in def_instructions()
421 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
429 StringRef getVRegName(unsigned Reg) const { in getVRegName()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 34 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
49 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
60 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
77 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVectorPrint.cpp | 74 static bool isVecReg(unsigned Reg) { in isVecReg()
96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr()
108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg()
144 unsigned Reg = 0; in runOnMachineFunction() local
152 unsigned Reg = 0; in runOnMachineFunction() local
168 unsigned Reg = 0; in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 44 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register()
60 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register()
72 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register()
90 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 62 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
67 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
72 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
77 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCTargetDesc.h | 67 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
72 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
77 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
82 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 252 inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { in reg_operands()
268 reg_instructions(unsigned Reg) const { in reg_instructions()
283 inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { in reg_bundles()
303 reg_nodbg_operands(unsigned Reg) const { in reg_nodbg_operands()
320 reg_nodbg_instructions(unsigned Reg) const { in reg_nodbg_instructions()
337 reg_nodbg_bundles(unsigned Reg) const { in reg_nodbg_bundles()
355 inline iterator_range<def_iterator> def_operands(unsigned Reg) const { in def_operands()
371 def_instructions(unsigned Reg) const { in def_instructions()
386 inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { in def_bundles()
411 inline iterator_range<use_iterator> use_operands(unsigned Reg) const { in use_operands()
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| D | LivePhysRegs.h | 74 void addReg(unsigned Reg) { in addReg()
84 void removeReg(unsigned Reg) { in removeReg()
100 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } in contains()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 143 for (unsigned Reg : Regs) { in removeRegsFromMap() local
159 unsigned Reg = I->first; in removeClobberedRegsFromMap() local
165 void MachineCopyPropagation::ClobberRegister(unsigned Reg) { in ClobberRegister()
178 void MachineCopyPropagation::ReadRegister(unsigned Reg) { in ReadRegister()
443 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
466 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
491 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
510 unsigned Reg = MO.getReg(); in CopyPropagateBlock() local
533 unsigned Reg = MaybeDead->getOperand(0).getReg(); in CopyPropagateBlock() local
565 for (unsigned Reg : Defs) in CopyPropagateBlock() local
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| D | AggressiveAntiDepBreaker.cpp | 76 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
89 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
110 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup()
120 bool AggressiveAntiDepState::IsLive(unsigned Reg) { in IsLive()
166 unsigned Reg = *AI; in StartBlock() local
180 unsigned Reg = *I; in StartBlock() local
211 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
236 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
256 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
302 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| D | LivePhysRegs.cpp | 50 unsigned Reg = O->getReg(); in removeDefs() local
64 unsigned Reg = O->getReg(); in addUses() local
90 unsigned Reg = O->getReg(); in stepForward() local
108 for (auto Reg : Clobbers) { in stepForward() local
160 unsigned Reg = LI.PhysReg; in addBlockLiveIns() local
263 for (MCPhysReg Reg : LiveRegs) { in addLiveIns() local
296 unsigned Reg = MO->getReg(); in recomputeLivenessFlags() local
313 unsigned Reg = MO->getReg(); in recomputeLivenessFlags() local
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| D | MachineRegisterInfo.cpp | 59 MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { in setRegClass()
64 void MachineRegisterInfo::setRegBank(unsigned Reg, in setRegBank()
70 constrainRegClass(MachineRegisterInfo &MRI, unsigned Reg, in constrainRegClass()
86 MachineRegisterInfo::constrainRegClass(unsigned Reg, in constrainRegClass()
93 MachineRegisterInfo::constrainRegAttrs(unsigned Reg, in constrainRegAttrs()
130 MachineRegisterInfo::recomputeRegClass(unsigned Reg) { in recomputeRegClass()
155 unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs()); in createIncompleteVirtualRegister() local
173 unsigned Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local
192 unsigned Reg = createIncompleteVirtualRegister(Name); in createGenericVirtualRegister() local
207 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); in clearVirtRegs() local
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| D | CriticalAntiDepBreaker.cpp | 76 unsigned Reg = *AI; in StartBlock() local
90 unsigned Reg = *I; in StartBlock() local
94 unsigned Reg = *AI; in StartBlock() local
120 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
191 unsigned Reg = MO.getReg(); in PrescanInstruction() local
276 unsigned Reg = MO.getReg(); in ScanInstruction() local
307 unsigned Reg = MO.getReg(); in ScanInstruction() local
467 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
616 unsigned Reg = MO.getReg(); in BreakAntiDependencies() local
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| /external/llvm/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 60 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
73 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
95 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup()
106 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive()
154 unsigned Reg = *AI; in StartBlock() local
167 unsigned Reg = *I; in StartBlock() local
197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
222 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
242 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
288 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | AggressiveAntiDepBreaker.cpp | 61 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
74 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
96 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup()
107 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive()
190 unsigned Reg = *I; in StartBlock() local
220 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
246 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
266 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
283 unsigned Reg = P->getReg(); in AntiDepEdges() local
317 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| D | DeadMachineInstructionElim.cpp | 72 unsigned Reg = MO.getReg(); in isDead() local
108 unsigned Reg = *LOI; in runOnMachineFunction() local
138 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
166 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
183 unsigned Reg = MO.getReg(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 211 const TargetRegisterClass *getRegClass(unsigned Reg) const { in getRegClass()
251 void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint()
259 getRegAllocationHint(unsigned Reg) const { in getRegAllocationHint()
265 unsigned getSimpleHint(unsigned Reg) const { in getSimpleHint()
277 bool isPhysRegUsed(unsigned Reg) const { return UsedPhysRegs[Reg]; } in isPhysRegUsed()
281 void setPhysRegUsed(unsigned Reg) { UsedPhysRegs[Reg] = true; } in setPhysRegUsed()
289 void setPhysRegUnused(unsigned Reg) { UsedPhysRegs[Reg] = false; } in setPhysRegUnused()
304 void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); } in addLiveOut()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.cpp | 34 for (auto Reg : RegList) { in CC_X86_32_RegCall_Assign2Regs() local
47 unsigned Reg = State.AllocateReg(AvailableRegs[I]); in CC_X86_32_RegCall_Assign2Regs() local
95 for (auto Reg : RegList) { in CC_X86_VectorCallAssignRegister() local
148 if (unsigned Reg = State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT))) { in CC_X86_64_VectorCall() local
191 if (unsigned Reg = State.AllocateReg(CC_X86_VectorCallGetSSEs(ValVT))) { in CC_X86_32_VectorCall() local
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/ |
| D | MBlazeBaseInfo.h | 81 static inline bool isMBlazeRegister(unsigned Reg) { in isMBlazeRegister()
85 static inline bool isSpecialMBlazeRegister(unsigned Reg) { in isSpecialMBlazeRegister()
168 static inline unsigned getMBlazeRegisterFromNumbering(unsigned Reg) { in getMBlazeRegisterFromNumbering()
207 static inline unsigned getSpecialMBlazeRegisterFromNumbering(unsigned Reg) { in getSpecialMBlazeRegisterFromNumbering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 55 unsigned Reg; member
73 void setReg(unsigned Reg) { in setReg()
279 unsigned Reg = getRegForValue(Op); in computeAddress() local
366 unsigned Reg = getRegForValue(Obj); in computeAddress() local
375 unsigned Reg = Addr.getReg(); in materializeLoadStoreOperands() local
410 unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { in maskI1Value()
428 unsigned Reg = getRegForValue(V); in getRegForI1Value() local
434 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, in zeroExtendToI32()
472 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, in signExtendToI32()
508 unsigned WebAssemblyFastISel::zeroExtend(unsigned Reg, const Value *V, in zeroExtend()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXMachineFunctionInfo.h | 82 void addRetReg(unsigned Reg) { in addRetReg()
93 void addArgReg(unsigned Reg) { in addArgReg()
103 void addVirtualRegister(const TargetRegisterClass *TRC, unsigned Reg) { in addVirtualRegister()
131 const char *getRegisterName(unsigned Reg) const { in getRegisterName()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsRegisterInfo.cpp | 205 for (const unsigned *Reg = ReservedCPURegs; *Reg; ++Reg) in getReservedRegs() local
209 for (const unsigned *Reg = ReservedCPU64Regs; *Reg; ++Reg) in getReservedRegs() local
213 for (RegIter Reg = Mips::AFGR64RegisterClass->begin(); in getReservedRegs() local
219 for (RegIter Reg = Mips::CPU64RegsRegisterClass->begin(); in getReservedRegs() local
223 for (RegIter Reg = Mips::FGR64RegisterClass->begin(); in getReservedRegs() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 38 static inline bool isARMArea1Register(unsigned Reg, bool isDarwin) { in isARMArea1Register()
53 static inline bool isARMArea2Register(unsigned Reg, bool isDarwin) { in isARMArea2Register()
64 static inline bool isARMArea3Register(unsigned Reg, bool isDarwin) { in isARMArea3Register()
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| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 770 unsigned Reg; in DecodeGPR64RegisterClass() local
783 unsigned Reg; in DecodeGPR32RegisterClass() local
811 unsigned Reg; in DecodeFGR64RegisterClass() local
824 unsigned Reg; in DecodeFGR32RegisterClass() local
837 unsigned Reg; in DecodeCCRRegisterClass() local
850 unsigned Reg; in DecodeFCCRegisterClass() local
863 unsigned Reg; in DecodeCCRegisterClass() local
876 unsigned Reg; in DecodeFGRCCRegisterClass() local
890 unsigned Reg = fieldFromInstruction(Insn, 16, 5); in DecodeMem() local
927 unsigned Reg = fieldFromInstruction(Insn, 6, 5); in DecodeMSA128Mem() local
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