| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 1259 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS() local 1307 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
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| /external/v8/src/arm/ |
| D | constants-arm.h | 223 SetCC = 1 << 20, // Set condition code. enumerator
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 1261 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15613 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerSETCC() local 15642 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerSETCC() local 15665 SDValue SetCC = DAG.getNode(X86ISD::SETCC, DL, MVT::i8, in LowerSETCCE() local 17773 SDValue SetCC; in LowerINTRINSIC_WO_CHAIN() local 18021 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test); in LowerINTRINSIC_WO_CHAIN() local 18031 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test); in LowerINTRINSIC_WO_CHAIN() local 18093 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_WO_CHAIN() local 18467 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_W_CHAIN() local 18485 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_W_CHAIN() local 20530 SDValue SetCC = in LowerXALUO() local [all …]
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| /external/v8/src/x64/ |
| D | disasm-x64.cc | 870 int DisassemblerX64::SetCC(byte* data) { in SetCC() function in disasm::DisassemblerX64
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 3933 SDNode *SetCC = SetCCs[i]; in ExtendSetCCUses() local 5751 SDValue SetCC = in visitBRCOND() local 5818 SDValue SetCC = DAG.getSetCC(TheXor->getDebugLoc(), in visitBRCOND() local
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| D | LegalizeIntegerTypes.cpp | 519 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0), in PromoteIntRes_SETCC() local
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | GPRArith.cpp | 32 TEST_F(AssemblerX8664Test, SetCC) { in TEST_F() argument
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| /external/v8/src/ia32/ |
| D | disasm-ia32.cc | 712 int DisassemblerIA32::SetCC(byte* data) { in SetCC() function in disasm::DisassemblerIA32
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | GPRArith.cpp | 47 TEST_F(AssemblerX8632Test, SetCC) { in TEST_F() argument
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 9231 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, in LowerINTRINSIC_WO_CHAIN() local 9310 SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, CC, Test); in LowerINTRINSIC_WO_CHAIN() local 10096 SDValue SetCC = in LowerXALUO() local 10109 SDValue SetCC = in LowerXALUO() local 14139 SDValue SetCC = Ext.getOperand(0); in OptimizeConditionalInDecrement() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 1027 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
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| D | MipsISelLowering.cpp | 582 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20893 SDValue SetCC; in LowerINTRINSIC_WO_CHAIN() local 21082 SDValue SetCC = getSETCC(X86CC, Test, dl, DAG); in LowerINTRINSIC_WO_CHAIN() local 21144 SDValue SetCC = getSETCC(X86CC, PCMP, dl, DAG); in LowerINTRINSIC_WO_CHAIN() local 21587 SDValue SetCC = getSETCC(X86::COND_B, Operation.getValue(0), dl, DAG); in LowerINTRINSIC_W_CHAIN() local 21687 SDValue SetCC = getSETCC(X86::COND_NE, InTrans, dl, DAG); in LowerINTRINSIC_W_CHAIN() local 21702 SDValue SetCC = getSETCC(X86::COND_B, Res.getValue(1), dl, DAG); in LowerINTRINSIC_W_CHAIN() local 24092 SDValue SetCC = getSETCC(X86::COND_O, SDValue(Sum.getNode(), 2), DL, DAG); in LowerXALUO() local 24102 SDValue SetCC = getSETCC(Cond, SDValue(Sum.getNode(), 1), DL, DAG); in LowerXALUO() local 24892 SDValue SetCC = getSETCC(X86::COND_B, Sum.getValue(1), DL, DAG); in LowerADDSUBCARRY() local 31879 SDValue SetCC = Select->getOperand(0); in detectZextAbsDiff() local [all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 976 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
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| D | MipsISelLowering.cpp | 677 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 5902 SDNode *SetCC = SetCCs[i]; in ExtendSetCCUses() local 6221 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, in visitSIGN_EXTEND() local 9498 SDValue SetCC = in visitBRCOND() local 9565 SDValue SetCC = DAG.getSetCC(SDLoc(TheXor), in visitBRCOND() local
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| D | LegalizeDAG.cpp | 3370 SDValue SetCC = DAG.getSetCC(dl, SetCCType, Sum, LHS, CC); in ExpandNode() local
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| D | LegalizeIntegerTypes.cpp | 620 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, LHS, RHS, in PromoteIntRes_SETCC() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9088 SDValue SetCC = N0.getOperand(0); in performAcrossLaneMinMaxReductionCombine() local 9763 SDValue SetCC = in performVSelectCombine() local 9824 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1368 SDNode *SetCC = nullptr; in LowerBRCOND() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 3253 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerXALUO() local 3301 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerADDSUBCARRY() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 3520 SDValue SetCC = DAG.getSetCC(dl, SetCCType, Sum, LHS, CC); in ExpandNode() local
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| D | DAGCombiner.cpp | 1977 SDValue SetCC = Z.getOperand(0); in foldAddSubBoolOfMaskedVal() local 8236 SDValue SetCC = VSel.getOperand(0); in matchVSelectOpSizesWithSetCC() local 8331 SDValue SetCC = N->getOperand(0); in foldExtendedSignBitTest() local 8547 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N00, N01, CC); in visitSIGN_EXTEND() local
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| D | LegalizeIntegerTypes.cpp | 614 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0), in PromoteIntRes_SETCC() local
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