| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 187 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
195 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
202 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
209 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
217 unsigned SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
224 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
231 unsigned SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
257 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateSGPRSpillToVGPR() local
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| D | SIFixSGPRCopies.cpp | 147 static bool hasVGPROperands(const MachineInstr &MI, const SIRegisterInfo *TRI) { in hasVGPROperands()
162 const SIRegisterInfo &TRI, in getCopyRegClasses()
185 const SIRegisterInfo &TRI) { in isVGPRToSGPRCopy()
191 const SIRegisterInfo &TRI) { in isSGPRToVGPRCopy()
196 const SIRegisterInfo *TRI, in tryChangeVGPRtoSGPRinCopy()
234 const SIRegisterInfo *TRI, in foldVGPRCopyIntoRegSequence()
306 const SIRegisterInfo *TRI, in phiHasVGPROperands()
343 const TargetRegisterInfo &TRI) { in hasTerminatorThatModifiesExec()
414 const TargetRegisterInfo *TRI) { in predsHasDivergentTerminator()
573 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() local
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| D | SIFrameLowering.cpp | 42 const SIRegisterInfo* TRI = &TII->getRegisterInfo(); in emitFlatScratchInit() local
103 const SIRegisterInfo *TRI, in getReservedPrivateSegmentBufferReg()
154 const SIRegisterInfo *TRI, in getReservedPrivateSegmentWaveByteOffsetReg()
238 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue() local
373 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionScratchSetup() local
512 const SIRegisterInfo &TRI = *Subtarget.getRegisterInfo(); in findScratchNonCalleeSaveRegister() local
542 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitPrologue() local
673 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in processFunctionBeforeFrameFinalized() local
784 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitDebuggerPrologue() local
832 const SIRegisterInfo *TRI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); in hasSP() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 149 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
156 unsigned SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
163 unsigned SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
170 unsigned SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
177 unsigned SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
192 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getSpilledReg() local
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| D | SIFixSGPRCopies.cpp | 115 static bool hasVGPROperands(const MachineInstr &MI, const SIRegisterInfo *TRI) { in hasVGPROperands()
130 const SIRegisterInfo &TRI, in getCopyRegClasses()
153 const SIRegisterInfo &TRI) { in isVGPRToSGPRCopy()
159 const SIRegisterInfo &TRI) { in isSGPRToVGPRCopy()
177 const SIRegisterInfo *TRI, in foldVGPRCopyIntoRegSequence()
242 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() local
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| D | SIShrinkInstructions.cpp | 69 static bool isVGPR(const MachineOperand *MO, const SIRegisterInfo &TRI, in isVGPR()
81 const SIRegisterInfo &TRI, in canShrink()
137 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in foldImmediates() local
204 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | LiveRegUnits.h | 32 const TargetRegisterInfo *TRI = nullptr; variable
40 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
51 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
75 void init(const TargetRegisterInfo &TRI) { in init()
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| D | LivePhysRegs.h | 50 const TargetRegisterInfo *TRI = nullptr; variable
58 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) { in LivePhysRegs()
66 void init(const TargetRegisterInfo &TRI) { in init()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreMachineFunctionInfo.cpp | 40 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
58 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
71 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
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| /external/llvm/include/llvm/CodeGen/ |
| D | LivePhysRegs.h | 44 const TargetRegisterInfo *TRI; variable
54 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { in LivePhysRegs()
60 void init(const TargetRegisterInfo *TRI) { in init()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsFrameLowering.cpp | 96 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
105 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
117 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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| D | MipsMachineFunction.cpp | 56 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEhDataRegsFI() local
74 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createISRRegFI() local
98 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getMoveF64ViaSpillFI() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFrameLowering.cpp | 96 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
105 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
112 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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| D | MipsInstrInfo.h | 101 const TargetRegisterInfo *TRI) const override { in storeRegToStackSlot()
109 const TargetRegisterInfo *TRI) const override { in loadRegFromStackSlot()
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| /external/eigen/test/ |
| D | product_trsolve.cpp | 12 #define VERIFY_TRSM(TRI,XB) { \ argument
21 #define VERIFY_TRSM_ONTHERIGHT(TRI,XB) { \ argument
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.h | 36 const TargetRegisterInfo *TRI) const override { in spillCalleeSavedRegisters()
41 const TargetRegisterInfo *TRI) const override { in restoreCalleeSavedRegisters()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterBankInfo.cpp | 28 AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI) in AArch64RegisterBankInfo()
125 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrAlternativeMappings() local
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| D | AArch64PBQPRegAlloc.h | 26 const TargetRegisterInfo *TRI; variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 385 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in replaceRegWith() local
466 const TargetRegisterInfo &TRI, in EmitLiveInCopies()
517 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isConstantPhysReg() local
532 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isCallerPreservedOrConstPhysReg() local
585 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegModified() local
599 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegUsed() local
610 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in disableCalleeSavedRegister() local
653 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isReservedRegUnit() local
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| D | TargetRegisterInfo.cpp | 89 Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI, in printReg()
121 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
144 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
155 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
241 const TargetRegisterInfo *TRI, in firstCommonClass()
350 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
509 const TargetRegisterInfo *TRI) { in dumpReg()
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| D | MIRPrinter.cpp | 186 const TargetRegisterInfo *TRI) { in printRegMIR()
234 const TargetRegisterInfo *TRI) { in printCustomRegMask()
254 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
277 const TargetRegisterInfo *TRI) { in convert()
348 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in convertStackObjects() local
491 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
617 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in print() local
657 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
742 const TargetRegisterInfo *TRI, in print()
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| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 45 Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI, in PrintReg()
67 Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintRegUnit()
90 Printable PrintVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in PrintVRegOrUnit()
180 const TargetRegisterInfo *TRI, in firstCommonClass()
289 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
396 const TargetRegisterInfo *TRI) { in dumpReg()
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| D | MIRPrinter.cpp | 150 const TargetRegisterInfo *TRI) { in printReg()
163 const TargetRegisterInfo *TRI) { in printReg()
205 const TargetRegisterInfo *TRI) { in convert()
286 const TargetRegisterInfo *TRI) { in convertStackObjects()
427 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
485 const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo(); in print() local
544 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
750 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI, in print()
946 const TargetRegisterInfo *TRI) { in printCFIRegister()
956 const TargetRegisterInfo *TRI) { in print()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.h | 28 const TargetRegisterInfo *TRI; variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.h | 46 const TargetRegisterInfo *TRI) const override { in spillCalleeSavedRegisters()
52 const TargetRegisterInfo *TRI) const override { in restoreCalleeSavedRegisters()
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