| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 959 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg() local
1038 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP() local
1137 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI() local
1348 unsigned TmpReg = createResultReg(RC); in processCallArgs() local
1360 unsigned TmpReg = createResultReg(RC); in processCallArgs() local
1677 unsigned TmpReg = createResultReg(RC); in SelectRet() local
1686 unsigned TmpReg = createResultReg(RC); in SelectRet() local
1918 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP() local
2020 unsigned TmpReg = createResultReg(RC); in PPCMaterialize32BitInt() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1018 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg() local
1113 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP() local
1213 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI() local
1435 unsigned TmpReg = createResultReg(RC); in processCallArgs() local
1447 unsigned TmpReg = createResultReg(RC); in processCallArgs() local
1764 unsigned TmpReg = createResultReg(RC); in SelectRet() local
1773 unsigned TmpReg = createResultReg(RC); in SelectRet() local
2018 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP() local
2121 unsigned TmpReg = createResultReg(RC); in PPCMaterialize32BitInt() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 518 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local
587 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local
668 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local
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| D | SIFixSGPRCopies.cpp | 227 unsigned TmpReg = MRI.createVirtualRegister(NewSrcRC); in foldVGPRCopyIntoRegSequence() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2673 unsigned TmpReg = DstReg; in loadImmediate() local
2701 unsigned TmpReg = DstReg; in loadImmediate() local
2917 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
2996 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
3137 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
3579 unsigned TmpReg = DstReg; in expandMemInst() local
4275 unsigned TmpReg = SrcReg; in expandUxw() local
4417 unsigned TmpReg = DReg; in expandRotation() local
4542 unsigned TmpReg = DReg; in expandDRotation() local
4737 unsigned TmpReg = Inst.getOperand(2).getReg(); in expandMulO() local
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86SpeculativeLoadHardening.cpp | 1645 unsigned TmpReg = MRI->createVirtualRegister(PS->RC); in mergePredStateIntoSP() local
1666 unsigned TmpReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() local
1765 unsigned TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() local
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| D | X86CmovConversion.cpp | 765 unsigned TmpReg = MRI->createVirtualRegister(RC); in convertCmovInstsToBranches() local
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| D | X86FlagsCopyLowering.cpp | 826 unsigned TmpReg = MRI->createVirtualRegister(PromoteRC); in rewriteArithmetic() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 289 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0; in eliminateCallFramePseudoInstr() local
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| D | PPCFrameLowering.cpp | 664 unsigned TmpReg = isPPC64 ? PPC::X0 : PPC::R0; in emitEpilogue() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 223 unsigned TmpReg = MRI->createVirtualRegister(TII->getRegClass(MCID1, 0, TRI)); in ExpandFPMLxInstruction() local
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| D | Thumb1RegisterInfo.cpp | 655 unsigned TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 773 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in spillSGPR() local
925 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in restoreSGPR() local
1153 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in eliminateFrameIndex() local
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| D | SIFixSGPRCopies.cpp | 291 unsigned TmpReg = MRI.createVirtualRegister(NewSrcRC); in foldVGPRCopyIntoRegSequence() local
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| D | SIInstrInfo.cpp | 1034 MachineBasicBlock &MBB, MachineInstr &MI, RegScavenger *RS, unsigned TmpReg, in calculateLDSSpillAddress()
4125 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local
4443 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBFE() local
4491 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
4520 unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 290 unsigned TmpReg = MRI->createVirtualRegister( in ExpandFPMLxInstruction() local
|
| D | ThumbRegisterInfo.cpp | 570 unsigned TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| D | Thumb1FrameLowering.cpp | 518 unsigned &TmpReg) { in findTemporariesForLR()
|
| /external/llvm/lib/Target/ARM/ |
| D | MLxExpansionPass.cpp | 290 unsigned TmpReg = MRI->createVirtualRegister( in ExpandFPMLxInstruction() local
|
| D | ThumbRegisterInfo.cpp | 570 unsigned TmpReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2176 unsigned TmpReg = DstReg; in loadImmediate() local
2204 unsigned TmpReg = DstReg; in loadImmediate() local
2415 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
2516 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
3389 unsigned TmpReg = DReg; in expandRotation() local
3518 unsigned TmpReg = DReg; in expandDRotation() local
4666 unsigned TmpReg = PrevReg + 1; in parseRegisterList() local
5500 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in parseDirectiveCPSetup() local
6152 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in ParseDirective() local
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 590 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 286 unsigned TmpReg, SMLoc IDLoc, in emitLoadWithImmOffset()
325 unsigned TmpReg, SMLoc IDLoc, in emitLoadWithSymOffset()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 748 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 583 unsigned TmpReg = 0; // 0 for no temporary register in expand() local
694 unsigned TmpReg = 0; // 0 for no temporary register in expand() local
749 unsigned TmpReg = 0; // 0 for no temporary register in expand() local
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