| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| D | asr.s | 10 asr z0.b, z0.b, #1 label
16 asr z31.b, z31.b, #8 label
22 asr z0.h, z0.h, #1 label
28 asr z31.h, z31.h, #16 label
34 asr z0.s, z0.s, #1 label
40 asr z31.s, z31.s, #32 label
46 asr z0.d, z0.d, #1 label
52 asr z31.d, z31.d, #64 label
58 asr z0.b, p0/m, z0.b, #1 label
64 asr z31.b, p0/m, z31.b, #8 label
[all …]
|
| D | asr-diagnostics.s | 3 asr z30.b, z10.b, #0 label
8 asr z18.b, z27.b, #9 label
13 asr z18.b, p0/m, z28.b, #0 label
18 asr z1.b, p0/m, z9.b, #9 label
23 asr z26.h, z4.h, #0 label
28 asr z25.h, z10.h, #17 label
33 asr z21.h, p0/m, z2.h, #0 label
38 asr z14.h, p0/m, z30.h, #17 label
43 asr z17.s, z0.s, #0 label
48 asr z0.s, z15.s, #33 label
[all …]
|
| D | movprfx-diagnostics.s | 27 asr z2.s, p0/m, z2.s, z0.d label
78 asr z0.s, p0/m, z0.s, z0.d label
118 asr z0.s, p1/m, z0.s, z1.d label
158 asr z0.s, p0/m, z0.s, z1.d label
|
| /external/skia/tools/gpu/ |
| D | TestContext.cpp | 41 auto asr = SkScopeExit(this->onPlatformGetAutoContextRestore()); in makeCurrentAndAutoRestore() local
|
| /external/skqp/tools/gpu/ |
| D | TestContext.cpp | 41 auto asr = SkScopeExit(this->onPlatformGetAutoContextRestore()); in makeCurrentAndAutoRestore() local
|
| /external/u-boot/arch/arm/mach-at91/include/mach/ |
| D | at91_mc.h | 68 u32 asr; /* 0x04 MC Abort Status Register */ member
|
| D | at91_pio.h | 83 u32 asr; /* 0x70 Select A Register */ member
|
| /external/u-boot/arch/arm/mach-keystone/ |
| D | ddr3_spd.c | 123 u32 asr; member
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 28 asr, enumerator
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 29 asr, enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 29 asr, enumerator
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 773 void asr(const Register& rd, const Register& rn, unsigned shift) { in asr() function
|
| /external/u-boot/arch/m68k/include/asm/ |
| D | immap_547x_8x.h | 255 u32 asr; /* Arbiter Status */ member
|
| D | immap_5445x.h | 291 u32 asr; /* Arbiter Status Register */ member
|
| D | immap_5275.h | 249 u32 asr; member
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.h | 1389 void asr(const Register& rd, const Register& rn, int shift) { in asr() function
|
| /external/u-boot/drivers/ddr/fsl/ |
| D | ctrl_regs.c | 1073 unsigned int asr = 0; /* auto self-refresh disable */ in set_ddr_sdram_mode_2() local
|
| /external/v8/src/arm/ |
| D | assembler-arm.cc | 1658 void Assembler::asr(Register dst, Register src1, const Operand& src2, SBit s, in asr() function in v8::internal::Assembler
1930 int asr = (src2.shift_imm_ == 32) ? 0 : src2.shift_imm_; in pkhtb() local
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 66 __ asr(w11, w12, 0); in GenerateTestSequenceBase() local
67 __ asr(x13, x14, 1); in GenerateTestSequenceBase() local
|
| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 4796 __ asr(lr, lr, 3U); in Generate_36() local
5296 __ asr(ip, lr, 3U); in Generate_40() local
5391 __ asr(r8, r8, 1U); in Generate_41() local
5509 __ asr(r8, r8, 1U); in Generate_42() local
5555 __ asr(fp, r1, 3U); in Generate_42() local
5561 __ asr(fp, ip, 1U); in Generate_42() local
5876 __ asr(sl, r9, 3U); in Generate_45() local
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2015 void asr(Register rd, Register rm, const Operand& operand) { in asr() function
2018 void asr(Condition cond, Register rd, Register rm, const Operand& operand) { in asr() function
2021 void asr(EncodingSize size, in asr() function
|
| D | assembler-aarch32.cc | 2871 void Assembler::asr(Condition cond, in asr() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1245 void Disassembler::asr(Condition cond, in asr() function in vixl::aarch32::Disassembler
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 1728 void AssemblerARM32::asr(const Operand *OpRd, const Operand *OpRm, in asr() function in Ice::ARM32::AssemblerARM32
|