/art/compiler/utils/mips/ |
D | assembler_mips_test.cc | 218 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchHelper() local 224 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchHelper() local 228 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchHelper() local 256 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondOneRegHelper() local 261 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondOneRegHelper() local 264 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondOneRegHelper() local 290 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondTwoRegsHelper() local 295 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondTwoRegsHelper() local 298 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondTwoRegsHelper() local 323 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchFpuCondCodeHelper() local [all …]
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D | assembler_mips32r6_test.cc | 289 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchHelper() local 295 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchHelper() local 299 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchHelper() local 327 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondOneRegHelper() local 332 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondOneRegHelper() local 335 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondOneRegHelper() local 361 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondTwoRegsHelper() local 366 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondTwoRegsHelper() local 369 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchCondTwoRegsHelper() local 394 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO); in BranchFpuCondHelper() local [all …]
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D | assembler_mips.cc | 454 void MipsAssembler::Addu(Register rd, Register rs, Register rt) { in Addu() function in art::mips::MipsAssembler 710 Addu(dst, src_base, src_idx); in ShiftAndAdd() 715 Addu(dst, src_base, tmp); in ShiftAndAdd() 780 Addu(rt, rs, tmp); in AddUpper() 783 Addu(rt, rs, rt); in AddUpper() 2906 Addu(rt, rs, temp); in Addiu32() 4140 Addu(AT, AT, RA); in EmitBranch() 4160 Addu(AT, AT, RA); in EmitBranch() 4174 Addu(AT, AT, RA); in EmitBranch() 4185 Addu(lhs, AT, GetR2PcRelBaseRegister(rhs)); in EmitBranch() [all …]
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D | assembler_mips.h | 299 void Addu(Register rd, Register rs, Register rt);
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/art/compiler/utils/mips64/ |
D | assembler_mips64_test.cc | 285 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchHelper() local 291 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchHelper() local 295 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchHelper() local 319 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchCondOneRegHelper() local 324 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchCondOneRegHelper() local 327 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchCondOneRegHelper() local 352 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchCondTwoRegsHelper() local 357 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchCondTwoRegsHelper() local 360 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchCondTwoRegsHelper() local 384 __ Addu(mips64::ZERO, mips64::ZERO, mips64::ZERO); in BranchFpuCondHelper() local [all …]
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D | assembler_mips64.h | 446 void Addu(GpuRegister rd, GpuRegister rs, GpuRegister rt);
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D | assembler_mips64.cc | 303 void Mips64Assembler::Addu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Addu() function in art::mips64::Mips64Assembler
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/art/compiler/optimizing/ |
D | intrinsics_mips.cc | 464 __ Addu(out, AT, TMP); in GenNumberOfLeadingZeroes() local 559 __ Addu(out, out, TMP); in GenNumberOfTrailingZeroes() local 672 __ Addu(TMP, out, TMP); in GenBitCount() local 674 __ Addu(out, out, TMP); in GenBitCount() local 709 __ Addu(tmp_lo, out_lo, tmp_lo); in GenBitCount() local 714 __ Addu(tmp_hi, out_hi, tmp_hi); in GenBitCount() local 724 __ Addu(TMP, tmp_hi, tmp_lo); in GenBitCount() local 729 __ Addu(out, out, TMP); in GenBitCount() local 1016 __ Addu(TMP, base, offset_lo); in GenUnsafeGet() local 1177 __ Addu(TMP, base, offset_lo); in GenUnsafePut() local [all …]
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D | code_generator_mips.cc | 713 __ Addu(tmp_ptr, base, offset); in EmitNativeCode() local 1757 __ Addu(out, out, (base == ZERO) ? RA : base); in EmitPcRelativeAddressPlaceholderHigh() local 1878 __ Addu(temp, card, temp); in MarkGCCard() local 2219 __ Addu(dst, lhs, rhs_reg); in HandleBinaryOp() local 2251 __ Addu(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local 2253 __ Addu(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local 2257 __ Addu(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local 2258 __ Addu(dst_high, dst_high, TMP); in HandleBinaryOp() local 2348 __ Addu(dst_low, lhs_low, TMP); in HandleBinaryOp() local 2359 __ Addu(dst_high, lhs_high, TMP); in HandleBinaryOp() local [all …]
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D | intrinsics_mips64.cc | 442 __ Addu(TMP, out, TMP); in GenBitCount() local 444 __ Addu(out, out, TMP); in GenBitCount() local
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D | code_generator_mips64.cc | 2054 __ Addu(dst, lhs, rhs_reg); in HandleBinaryOp() local 3404 __ Addu(out, dividend, TMP); in DivRemByPowerOfTwo() local 3439 __ Addu(out, out, TMP); in DivRemByPowerOfTwo() local 3443 __ Addu(out, dividend, TMP); in DivRemByPowerOfTwo() local 3496 __ Addu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant() local
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D | code_generator_vector_mips.cc | 1339 __ Addu(AT, base, index_reg); in VecAddress() local
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