| /art/test/427-bitwise/src/ |
| D | Main.java | 45 expectEquals(1, $opt$And(5, 3)); in andInt()
46 expectEquals(0, $opt$And(0, 0)); in andInt()
47 expectEquals(0, $opt$And(0, 3)); in andInt()
48 expectEquals(0, $opt$And(3, 0)); in andInt()
49 expectEquals(1, $opt$And(1, -3)); in andInt()
50 expectEquals(-12, $opt$And(-12, -3)); in andInt()
66 expectEquals(1L, $opt$And(5L, 3L)); in andLong()
67 expectEquals(0L, $opt$And(0L, 0L)); in andLong()
68 expectEquals(0L, $opt$And(0L, 3L)); in andLong()
69 expectEquals(0L, $opt$And(3L, 0L)); in andLong()
[all …]
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| /art/test/565-checker-doublenegbitwise/smali/ |
| D | SmaliTests.smali | 19 # Test transformation of Not/Not/And into Or/Not.
27 ## CHECK-DAG: <<And:i\d+>> And [<<Not1>>,<<Not2>>]
28 ## CHECK-DAG: Return [<<And>>]
42 ## CHECK-NOT: And
64 # Test transformation of Not/Not/And into Or/Not for boolean negations.
76 ## CHECK-DAG: <<And:i\d+>> And [<<NotP1>>,<<NotP2>>]
77 ## CHECK-DAG: Return [<<And>>]
91 ## CHECK-NOT: And
112 # Test transformation of Not/Not/Or into And/Not.
125 ## CHECK-DAG: <<And:j\d+>> And [<<P1>>,<<P2>>]
[all …]
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| /art/test/979-const-method-handle/ |
| D | expected.txt | 4 Hello World! And Hello Zog
5 Hello World! And Hello Zorba
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| /art/test/593-checker-shift-and-simplifier/smali/ |
| D | SmaliTests.smali | 25 ## CHECK-DAG: And [<<Not>>,<<Shl>>]
30 ## CHECK-DAG: DataProcWithShifterOp [<<Not>>,<<Get>>] kind:And+LSL shift:2
36 ## CHECK-DAG: And [<<Not>>,<<Shl>>]
41 ## CHECK-DAG: DataProcWithShifterOp [<<Not>>,<<Get>>] kind:And+LSL shift:2
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| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 290 __ And(TMP, out, AT); in GenReverse() local
293 __ And(out, out, AT); in GenReverse() local
301 __ And(TMP, out, AT); in GenReverse() local
304 __ And(out, out, AT); in GenReverse() local
307 __ And(TMP, out, AT); in GenReverse() local
310 __ And(out, out, AT); in GenReverse() local
313 __ And(TMP, out, AT); in GenReverse() local
316 __ And(out, out, AT); in GenReverse() local
349 __ And(out_hi, TMP, AT); in GenReverse() local
352 __ And(TMP, TMP, AT); in GenReverse() local
[all …]
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| D | scheduler_arm.h | 70 M(And , unused) \
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| D | intrinsics_mips64.cc | 436 __ And(TMP, TMP, AT); in GenBitCount() local
439 __ And(out, TMP, AT); in GenBitCount() local
441 __ And(TMP, TMP, AT); in GenBitCount() local
446 __ And(out, out, AT); in GenBitCount() local
453 __ And(TMP, TMP, AT); in GenBitCount() local
456 __ And(out, TMP, AT); in GenBitCount() local
458 __ And(TMP, TMP, AT); in GenBitCount() local
463 __ And(out, out, AT); in GenBitCount() local
1998 __ And(out, AT, in); in GenHighestOneBit() local
2032 __ And(out, TMP, in); in GenLowestOneBit() local
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| D | intrinsics_arm_vixl.cc | 1368 __ And(temp2, temp2, temp3); in GenerateStringCompareToLoop() local
1369 __ And(out, out, temp3); in GenerateStringCompareToLoop() local
2732 __ And(out_reg_hi, out_reg_hi, in_reg_hi); in GenLowestOneBit() local
2756 __ And(out, temp, in); in GenLowestOneBit() local
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| D | code_generator_arm_vixl.cc | 1079 __ And(out, first, second); in GenerateDataProcInstruction() local
4446 __ And(temp1, temp1, temp2); in GenerateMinMaxFloat() local
4716 __ And(shift_right, RegisterFrom(rhs), 0x1F); in HandleLongRotate() local
4846 __ And(out_reg, second_reg, kMaxIntShiftDistance); in HandleShift() local
4882 __ And(o_l, second_reg, kMaxLongShiftDistance); in HandleShift() local
4901 __ And(o_h, second_reg, kMaxLongShiftDistance); in HandleShift() local
4920 __ And(o_h, second_reg, kMaxLongShiftDistance); in HandleShift() local
8114 __ And(out, first, value); in GenerateAndConst() local
8232 __ And(out_reg, first_reg, second_reg); in HandleBitwiseOperation() local
8248 __ And(out_low, first_low, second_low); in HandleBitwiseOperation() local
[all …]
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| D | code_generator_arm64.cc | 1981 __ And(dst, lhs, rhs); in HandleBinaryOp() local
2183 __ And(out, left, right_operand); in VisitDataProcWithShifterOp() local
5194 __ And(out, dividend, 1); in GenerateIntRemForPower2Denom() local
5201 __ And(out, dividend, abs_imm - 1); in GenerateIntRemForPower2Denom() local
5202 __ And(temp, temp, abs_imm - 1); in GenerateIntRemForPower2Denom() local
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| D | code_generator_mips.cc | 2187 __ And(dst, lhs, rhs_reg); in HandleBinaryOp() local
2239 __ And(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local
2240 __ And(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local
2317 __ And(dst_low, lhs_low, TMP); in HandleBinaryOp() local
2327 __ And(dst_high, lhs_high, TMP); in HandleBinaryOp() local
4018 __ And(TMP, in_high, TMP); in DivRemByPowerOfTwo() local
9256 __ And(TMP, TMP, AT); in GenerateMinMaxFP() local
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| D | intrinsics_arm64.cc | 505 __ And(dst, temp, src); in GenLowestOneBit() local
1555 __ And(temp1, temp, Operand(1)); // Extract compression flag. in VisitStringEquals() local
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| D | code_generator_vector_arm64.cc | 773 __ And(dst.V16B(), lhs.V16B(), rhs.V16B()); // lanes do not matter in VisitVecAnd() local
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| D | nodes.h | 1368 M(And, BinaryOperation) \
5434 DECLARE_INSTRUCTION(And);
5437 DEFAULT_COPY_CONSTRUCTOR(And);
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| /art/test/020-string/ |
| D | expected.txt | 13 llo And
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| /art/test/800-smali/smali/ |
| D | b_22411633_1.smali | 30 # And test whether it's initialized by calling hashCode.
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| D | b_22881413.smali | 133 # And somewhere at the end
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| /art/test/458-checker-instruct-simplification/smali/ |
| D | SmaliTests2.smali | 212 ## CHECK-DAG: <<And1:i\d+>> And [<<Arg>>,<<Const>>]
213 ## CHECK-DAG: <<And2:i\d+>> And [<<And1>>,<<Const>>]
263 ## CHECK-DAG: <<And:i\d+>> And [<<Const255>>,<<Phi>>]
264 ## CHECK-DAG: <<Conv:b\d+>> TypeConversion [<<And>>]
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| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.h | 91 WITH_FLAGS_DONT_CARE_RD_RN_OP(And);
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| /art/tools/dexfuzz/ |
| D | README | 54 And also at least two of the following backends:
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| /art/test/953-invoke-polymorphic-compiler/src/ |
| D | Main.java | 182 private static boolean And(boolean lhs, boolean rhs) { in And() method in Main
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 410 TEST_F(AssemblerMIPSTest, And) { in TEST_F() argument
411 DriverStr(RepeatRRR(&mips::MipsAssembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "And"); in TEST_F()
2324 __ And(mips::T0, mips::T1, mips::T2); in TEST_F() local
2470 __ And(mips::T0, mips::T1, mips::T2); in TEST_F() local
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| D | assembler_mips.h | 321 void And(Register rd, Register rs, Register rt);
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1191 TEST_F(AssemblerMIPS64Test, And) { in TEST_F() argument
1192 DriverStr(RepeatRRR(&mips64::Mips64Assembler::And, "and ${reg1}, ${reg2}, ${reg3}"), "and"); in TEST_F()
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| D | assembler_mips64.h | 466 void And(GpuRegister rd, GpuRegister rs, GpuRegister rt);
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