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Searched refs:InAt (Results 1 – 25 of 29) sorted by relevance

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/art/compiler/optimizing/
Dcode_generator_vector_x86.cc77 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
85 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
91 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
97 __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>()); in VisitVecReplicateScalar()
98 __ movd(tmp, locations->InAt(0).AsRegisterPairHigh<Register>()); in VisitVecReplicateScalar()
105 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
110 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
148 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecExtractScalar()
174 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
216 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecReduce()
[all …]
Dcode_generator_vector_x86_64.cc72 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
80 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
86 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
91 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ true); in VisitVecReplicateScalar()
96 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
101 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
136 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecExtractScalar()
157 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
199 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecReduce()
245 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecCnv()
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Dcode_generator_vector_mips.cc58 __ FillB(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
63 __ FillH(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
67 __ FillW(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
72 locations->InAt(0).AsRegisterPairLow<Register>(), in VisitVecReplicateScalar()
75 locations->InAt(0).AsRegisterPairHigh<Register>(), in VisitVecReplicateScalar()
82 locations->InAt(0).AsFpuRegister<FRegister>(), in VisitVecReplicateScalar()
88 locations->InAt(0).AsFpuRegister<FRegister>(), in VisitVecReplicateScalar()
123 VectorRegister src = VectorRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
138 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
184 VectorRegister src = VectorRegisterFrom(locations->InAt(0)); in VisitVecReduce()
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Dcode_generator_vector_arm_vixl.cc94 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
136 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecReduce()
173 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecNeg()
202 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecAbs()
229 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecNot()
276 vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0)); in VisitVecAdd()
277 vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1)); in VisitVecAdd()
306 vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0)); in VisitVecSaturationAdd()
307 vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1)); in VisitVecSaturationAdd()
338 vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0)); in VisitVecHalvingAdd()
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Dcode_generator_vector_mips64.cc63 __ FillB(dst, locations->InAt(0).AsRegister<GpuRegister>()); in VisitVecReplicateScalar()
68 __ FillH(dst, locations->InAt(0).AsRegister<GpuRegister>()); in VisitVecReplicateScalar()
72 __ FillW(dst, locations->InAt(0).AsRegister<GpuRegister>()); in VisitVecReplicateScalar()
76 __ FillD(dst, locations->InAt(0).AsRegister<GpuRegister>()); in VisitVecReplicateScalar()
81 locations->InAt(0).AsFpuRegister<FpuRegister>(), in VisitVecReplicateScalar()
87 locations->InAt(0).AsFpuRegister<FpuRegister>(), in VisitVecReplicateScalar()
122 VectorRegister src = VectorRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
136 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
182 VectorRegister src = VectorRegisterFrom(locations->InAt(0)); in VisitVecReduce()
237 VectorRegister src = VectorRegisterFrom(locations->InAt(0)); in VisitVecCnv()
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Dintrinsics_mips.cc167 FRegister in = locations->InAt(0).AsFpuRegister<FRegister>(); in MoveFPToInt()
211 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in MoveIntToFP()
212 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in MoveIntToFP()
217 Register in = locations->InAt(0).AsRegister<Register>(); in MoveIntToFP()
262 Register in = locations->InAt(0).AsRegister<Register>(); in GenReverse()
276 Register in = locations->InAt(0).AsRegister<Register>(); in GenReverse()
321 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenReverse()
322 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenReverse()
452 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenNumberOfLeadingZeroes()
453 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenNumberOfLeadingZeroes()
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Dcode_generator_vector_arm64.cc83 Location src_loc = locations->InAt(0); in VisitVecReplicateScalar()
169 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
183 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
224 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecReduce()
264 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecCnv()
282 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecNeg()
323 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecAbs()
362 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecNot()
413 VRegister lhs = VRegisterFrom(locations->InAt(0)); in VisitVecAdd()
414 VRegister rhs = VRegisterFrom(locations->InAt(1)); in VisitVecAdd()
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Dintrinsics_mips64.cc156 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>(); in MoveFPToInt()
192 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>(); in MoveIntToFP()
230 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>(); in GenReverseBytes()
282 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>(); in GenNumberOfLeadingZeroes()
313 Location in = locations->InAt(0); in GenNumberOfTrailingZeroes()
352 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>(); in GenReverse()
396 GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>(); in GenBitCount()
497 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>(); in VisitMathSqrt()
520 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>(); in VisitMathRint()
546 FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>(); in GenRoundingMode()
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Dintrinsics_arm64.cc254 Location input = locations->InAt(0); in MoveFPToInt()
261 Location input = locations->InAt(0); in MoveIntToFP()
305 Location in = locations->InAt(0); in GenReverseBytes()
352 Location in = locations->InAt(0); in GenNumberOfLeadingZeros()
379 Location in = locations->InAt(0); in GenNumberOfTrailingZeros()
407 Location in = locations->InAt(0); in GenReverse()
538 __ Fsqrt(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathSqrt()
548 __ Frintp(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathCeil()
558 __ Frintm(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathFloor()
568 __ Frintn(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathRint()
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Dintrinsics_x86.cc98 Register src = locations->InAt(0).AsRegister<Register>(); in EmitNativeCode()
99 Location src_pos = locations->InAt(1); in EmitNativeCode()
100 Register dest = locations->InAt(2).AsRegister<Register>(); in EmitNativeCode()
101 Location dest_pos = locations->InAt(3); in EmitNativeCode()
102 Location length = locations->InAt(4); in EmitNativeCode()
195 Location input = locations->InAt(0); in MoveFPToInt()
210 Location input = locations->InAt(0); in MoveIntToFP()
308 Location input = locations->InAt(0); in VisitLongReverseBytes()
344 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
392 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenSSE41FPToFPIntrinsic()
[all …]
Dintrinsics_x86_64.cc146 Location input = locations->InAt(0); in MoveFPToInt()
152 Location input = locations->InAt(0); in MoveIntToFP()
252 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
300 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenSSE41FPToFPIntrinsic()
365 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundFloat()
409 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundDouble()
732 CpuRegister src = locations->InAt(0).AsRegister<CpuRegister>(); in VisitSystemArrayCopyChar()
733 Location src_pos = locations->InAt(1); in VisitSystemArrayCopyChar()
734 CpuRegister dest = locations->InAt(2).AsRegister<CpuRegister>(); in VisitSystemArrayCopyChar()
735 Location dest_pos = locations->InAt(3); in VisitSystemArrayCopyChar()
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Dcode_generator_x86.cc156 Location length_loc = locations->InAt(1); in EmitNativeCode()
162 Location array_loc = array_length->GetLocations()->InAt(0); in EmitNativeCode()
166 if (length_loc.Equals(locations->InAt(0))) { in EmitNativeCode()
176 locations->InAt(0), in EmitNativeCode()
294 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
337 __ UnpoisonHeapReference(locations->InAt(1).AsRegister<Register>()); in EmitNativeCode()
347 x86_codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
350 locations->InAt(1), in EmitNativeCode()
423 locations->InAt(0), in EmitNativeCode()
428 locations->InAt(1), in EmitNativeCode()
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Dcode_generator_mips.cc190 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
193 locations->InAt(1), in EmitNativeCode()
260 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
414 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
417 locations->InAt(1), in EmitNativeCode()
483 locations->InAt(0), in EmitNativeCode()
488 locations->InAt(1), in EmitNativeCode()
493 locations->InAt(2), in EmitNativeCode()
2171 Register lhs = locations->InAt(0).AsRegister<Register>(); in HandleBinaryOp()
2172 Location rhs_location = locations->InAt(1); in HandleBinaryOp()
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Dcommon_arm.h120 return SRegisterFrom(instr->GetLocations()->InAt(input_index)); in InputSRegisterAt()
126 return DRegisterFrom(instr->GetLocations()->InAt(input_index)); in InputDRegisterAt()
149 return RegisterFrom(instr->GetLocations()->InAt(input_index), in InputRegisterAt()
208 return OperandFrom(instr->GetLocations()->InAt(input_index), in InputOperandAt()
Dcode_generator_mips64.cc142 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
145 locations->InAt(1), in EmitNativeCode()
213 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
371 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
374 locations->InAt(1), in EmitNativeCode()
440 locations->InAt(0), in EmitNativeCode()
445 locations->InAt(1), in EmitNativeCode()
450 locations->InAt(2), in EmitNativeCode()
2006 GpuRegister lhs = locations->InAt(0).AsRegister<GpuRegister>(); in HandleBinaryOp()
2007 Location rhs_location = locations->InAt(1); in HandleBinaryOp()
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Dcode_generator_x86_64.cc202 Location length_loc = locations->InAt(1); in EmitNativeCode()
208 Location array_loc = array_length->GetLocations()->InAt(0); in EmitNativeCode()
212 if (length_loc.Equals(locations->InAt(0))) { in EmitNativeCode()
225 locations->InAt(0), in EmitNativeCode()
276 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
353 __ UnpoisonHeapReference(locations->InAt(1).AsRegister<CpuRegister>()); in EmitNativeCode()
363 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
366 locations->InAt(1), in EmitNativeCode()
434 locations->InAt(0), in EmitNativeCode()
439 locations->InAt(1), in EmitNativeCode()
[all …]
Dintrinsics_arm_vixl.cc191 Location dest_pos = locations->InAt(3); in EmitNativeCode()
274 Location input = locations->InAt(0); in MoveFPToInt()
284 Location input = locations->InAt(0); in MoveIntToFP()
347 Location in = locations->InAt(0); in GenNumberOfLeadingZeros()
395 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0)); in GenNumberOfTrailingZeros()
396 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0)); in GenNumberOfTrailingZeros()
409 vixl32::Register in = RegisterFrom(locations->InAt(0)); in GenNumberOfTrailingZeros()
510 __ Ldrsb(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0)))); in VisitMemoryPeekByte()
520 __ Ldr(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0)))); in VisitMemoryPeekIntNative()
530 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0)); in VisitMemoryPeekLongNative()
[all …]
Dcode_generator_arm_vixl.cc484 locations->InAt(0), in EmitNativeCode()
487 locations->InAt(1), in EmitNativeCode()
535 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
615 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
618 locations->InAt(1), in EmitNativeCode()
689 locations->InAt(0), in EmitNativeCode()
694 locations->InAt(1), in EmitNativeCode()
699 locations->InAt(2), in EmitNativeCode()
1132 const Location first = locations->InAt(0); in GenerateLongDataProc()
1133 const Location second = locations->InAt(1); in GenerateLongDataProc()
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Dssa_liveness_analysis.h146 Location location = GetUser()->GetLocations()->InAt(GetInputIndex()); in RequiresRegister()
333 } else if (!locations->InAt(input_index).IsValid()) {
964 && (locations->InAt(0).IsRegister() in DefinitionRequiresRegister()
965 || locations->InAt(0).IsRegisterPair() in DefinitionRequiresRegister()
966 || locations->InAt(0).GetPolicy() == Location::kRequiresRegister))) { in DefinitionRequiresRegister()
970 && (locations->InAt(0).IsFpuRegister() in DefinitionRequiresRegister()
971 || locations->InAt(0).IsFpuRegisterPair() in DefinitionRequiresRegister()
972 || locations->InAt(0).GetPolicy() == Location::kRequiresFpuRegister))) { in DefinitionRequiresRegister()
Dcommon_arm64.h86 return RegisterFrom(instr->GetLocations()->InAt(input_index), in InputRegisterAt()
120 return FPRegisterFrom(instr->GetLocations()->InAt(input_index), in InputFPRegisterAt()
167 return OperandFrom(instr->GetLocations()->InAt(input_index), in InputOperandAt()
Dssa_liveness_analysis.cc112 bool has_in_location = current->GetLocations()->InAt(i).IsValid(); in RecursivelyProcessInputs()
225 DCHECK(!user->GetLocations()->InAt(index).IsValid()); in ComputeLiveRanges()
418 Location expected = locations->InAt(use.GetInputIndex()); in FindFirstRegisterHint()
Dcode_generator_arm64.cc262 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
265 locations->InAt(1), in EmitNativeCode()
332 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
482 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
485 locations->InAt(1), in EmitNativeCode()
550 locations->InAt(0), in EmitNativeCode()
555 locations->InAt(1), in EmitNativeCode()
560 locations->InAt(2), in EmitNativeCode()
1869 Location base_loc = locations->InAt(0); in HandleFieldGet()
1995 __ Ror(dst, lhs, RegisterFrom(instr->GetLocations()->InAt(1), type)); in HandleBinaryOp()
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Dregister_allocation_resolver.cc133 if (locations->InAt(0).IsUnallocated()) { in Resolve()
136 DCHECK(locations->InAt(0).Equals(source)); in Resolve()
342 Location expected_location = locations->InAt(use.GetInputIndex()); in ConnectSiblings()
Dintrinsics.h93 Location actual_loc = locations->InAt(i); in INTRINSICS_LIST()
Dcode_generator.cc117 DCHECK(CheckType(instruction->GetType(), locations->InAt(0))) in CheckTypeConsistency()
119 << " " << locations->InAt(0); in CheckTypeConsistency()
128 DCHECK(CheckType(inputs[i]->GetType(), locations->InAt(i))) in CheckTypeConsistency()
129 << inputs[i]->GetType() << " " << locations->InAt(i); in CheckTypeConsistency()
673 locations->InAt(is_instance ? 1 : 0), in GenerateUnresolvedFieldAccess()

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