Searched refs:Jalr (Results 1 – 9 of 9) sorted by relevance
| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 2343 __ Jalr(mips::T9); // T9 dependency. in TEST_F() local
2346 __ Jalr(mips::T9); // RA dependency. in TEST_F() local
2349 __ Jalr(mips::T1, mips::T9); // T1 dependency. in TEST_F() local
2364 __ Jalr(mips::T9); // No preceding instruction for the delay slot. in TEST_F() local
2486 __ Jalr(mips::T9); in TEST_F() local
2759 __ Jalr(mips::T9); in TEST_F() local
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| D | assembler_mips.cc | 939 void MipsAssembler::Jalr(Register rd, Register rs) { in Jalr() function in art::mips::MipsAssembler
971 void MipsAssembler::Jalr(Register rs) { in Jalr() function in art::mips::MipsAssembler
972 Jalr(RA, rs); in Jalr()
976 Jalr(ZERO, rs); in Jr()
4175 Jalr(AT); in EmitBranch()
5201 Jalr(scratch.AsCoreRegister()); in Call()
5213 Jalr(scratch.AsCoreRegister()); in Call()
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| D | assembler_mips.h | 413 void Jalr(Register rd, Register rs);
414 void Jalr(Register rs);
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| D | assembler_mips32r6_test.cc | 1570 __ Jalr(mips::T9); in TEST_F() local
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 712 void Mips64Assembler::Jalr(GpuRegister rd, GpuRegister rs) { in Jalr() function in art::mips64::Mips64Assembler
716 void Mips64Assembler::Jalr(GpuRegister rs) { in Jalr() function in art::mips64::Mips64Assembler
717 Jalr(RA, rs); in Jalr()
721 Jalr(ZERO, rs); in Jr()
4037 Jalr(scratch.AsGpuRegister()); in Call()
4050 Jalr(scratch.AsGpuRegister()); in Call()
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| D | assembler_mips64.h | 548 void Jalr(GpuRegister rd, GpuRegister rs);
549 void Jalr(GpuRegister rs);
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| D | assembler_mips64_test.cc | 785 TEST_F(AssemblerMIPS64Test, Jalr) { in TEST_F() argument
787 RepeatRRNoDupes(&mips64::Mips64Assembler::Jalr, "jalr ${reg1}, ${reg2}"), "jalr"); in TEST_F()
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| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 581 __ Jalr(entrypoint_.AsRegister<Register>()); in EmitNativeCode() local
2005 __ Jalr(T9); in GenerateInvokeRuntime() local
7076 __ Jalr(T9); in GenerateGcRootFieldLoad() local
7225 __ Jalr(T9); in GenerateFieldLoadWithBakerReadBarrier() local
7239 __ Jalr(T9); in GenerateFieldLoadWithBakerReadBarrier() local
7332 __ Jalr(T9); in GenerateArrayLoadWithBakerReadBarrier() local
7830 __ Jalr(T9); in VisitInvokeInterface() local
8047 __ Jalr(T9); in GenerateStaticOrDirectCall() local
8103 __ Jalr(T9); in GenerateVirtualCall() local
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| D | code_generator_mips64.cc | 538 __ Jalr(entrypoint_.AsRegister<GpuRegister>()); in EmitNativeCode() local
1860 __ Jalr(T9); in GenerateInvokeRuntime() local
5958 __ Jalr(T9); in VisitInvokeInterface() local
6139 __ Jalr(T9); in GenerateStaticOrDirectCall() local
6195 __ Jalr(T9); in GenerateVirtualCall() local
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