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Searched refs:Move (Results 1 – 25 of 27) sorted by relevance

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/art/compiler/optimizing/
Dcode_generator_mips.cc655 __ Move(temp1_, ref_reg); in EmitNativeCode() local
737 __ Move(tmp, value); in EmitNativeCode() local
853 __ Move(free_reg, index_reg); in EmitNativeCode() local
1106 __ Move(TMP, r2); in EmitSwap() local
1107 __ Move(r2, r1); in EmitSwap() local
1108 __ Move(r1, TMP); in EmitSwap() local
1135 __ Move(TMP, r2); in EmitSwap() local
1142 __ Move(TMP, r2); in EmitSwap() local
1143 __ Move(r2, r1); in EmitSwap() local
1144 __ Move(r1, TMP); in EmitSwap() local
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Dintrinsics_mips.cc80 __ Move(V0, trg_reg); in MoveFromReturnRegister() local
1432 __ Move(out, value); // Use 'out' for the 'store conditional' instruction. in GenCas() local
1603 __ Move(TMP, str); in VisitStringEquals() local
1604 __ Move(temp3, arg); in VisitStringEquals() local
2068 __ Move(out, ZERO); in VisitMathRoundFloat() local
2544 __ Move(count, length.AsRegister<Register>()); in VisitSystemArrayCopyChar() local
Dcode_generator_mips64.cc611 __ Move(temp1_, ref_reg); in EmitNativeCode() local
687 __ Move(tmp, value); in EmitNativeCode() local
800 __ Move(free_reg, index_reg); in EmitNativeCode() local
1276 __ Move(destination.AsRegister<GpuRegister>(), source.AsRegister<GpuRegister>()); in MoveLocation() local
1405 __ Move(TMP, r2); in SwapLocations() local
1406 __ Move(r2, r1); in SwapLocations() local
1407 __ Move(r1, TMP); in SwapLocations() local
1449 __ Move(reg_loc.AsRegister<GpuRegister>(), TMP); in SwapLocations() local
2191 __ Move(dst, lhs); in HandleShift() local
2762 __ Move(temp1, value); in VisitArraySet() local
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Dintrinsics_mips64.cc68 __ Move(V0, trg_reg); in MoveFromReturnRegister() local
1280 __ Move(out, value); // Use 'out' for the 'store conditional' instruction. in GenCas() local
1457 __ Move(TMP, str); in VisitStringEquals() local
1458 __ Move(temp3, arg); in VisitStringEquals() local
1925 __ Move(count, length.AsRegister<GpuRegister>()); in VisitSystemArrayCopyChar() local
Dcode_generator_x86_64.h387 void Move(Location destination, Location source);
Dcode_generator_x86_64.cc277 x86_64_codegen->Move(Location::RegisterLocation(RAX), source); in EmitNativeCode()
287 x86_64_codegen->Move(out, Location::RegisterLocation(RAX)); in EmitNativeCode()
323 x86_64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
380 x86_64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
861 x86_64_codegen->Move(out_, Location::RegisterLocation(RAX)); in EmitNativeCode()
922 x86_64_codegen->Move(Location::RegisterLocation(calling_convention.GetRegisterAt(0)), root_); in EmitNativeCode()
928 x86_64_codegen->Move(out_, Location::RegisterLocation(RAX)); in EmitNativeCode()
1435 void CodeGeneratorX86_64::Move(Location destination, Location source) { in Move() function in art::x86_64::CodeGeneratorX86_64
1522 Move(dst, src); in MoveLocation()
3457 codegen_->Move(stack_temp, source); in PushOntoFPStack()
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/art/compiler/jni/quick/
Djni_compiler.cc551 __ Move(mr_return_reg, jni_return_reg, main_jni_conv->SizeOfReturnValue()); in ArtJniCompileMethodInternal() local
699 __ Move(out_reg, in_reg, mr_conv->CurrentParamSize()); in CopyParameter() local
762 __ Move(jni_conv->CurrentParamRegister(), in_reg, jni_conv->CurrentParamSize()); in SetNativeParameter() local
/art/compiler/utils/x86/
Djni_macro_assembler_x86.h89 void Move(ManagedRegister dest, ManagedRegister src, size_t size) override;
Djni_macro_assembler_x86.cc296 void X86JNIMacroAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::x86::X86JNIMacroAssembler
/art/compiler/utils/x86_64/
Djni_macro_assembler_x86_64.h94 void Move(ManagedRegister dest, ManagedRegister src, size_t size) override;
Djni_macro_assembler_x86_64.cc346 void X86_64JNIMacroAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::x86_64::X86_64JNIMacroAssembler
/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.h102 void Move(ManagedRegister dest, ManagedRegister src, size_t size) override;
Djni_macro_assembler_arm_vixl.cc379 void ArmVIXLJNIMacroAssembler::Move(ManagedRegister mdst, in Move() function in art::arm::ArmVIXLJNIMacroAssembler
/art/compiler/utils/
Djni_macro_assembler.h118 virtual void Move(ManagedRegister dest, ManagedRegister src, size_t size) = 0;
Dassembler.h124 void Move(size_t newposition, size_t oldposition, size_t size) { in Move() function
Dassembler_thumb_test.cc267 __ Move(scratch_register, method_register, 4); in TEST_F() local
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.h94 void Move(ManagedRegister dest, ManagedRegister src, size_t size) override;
Djni_macro_assembler_arm64.cc331 void Arm64JNIMacroAssembler::Move(ManagedRegister m_dst, ManagedRegister m_src, size_t size) { in Move() function in art::arm64::Arm64JNIMacroAssembler
/art/runtime/arch/mips64/
Dquick_entrypoints_mips64.S1948 move $a0, $v0 # Move result to $a0 (in delay slot).
2048 sll $t9, $t9, 31 - ACC_OBSOLETE_METHOD_SHIFT # Move obsolete method bit to sign bit.
2496 sll $at, $t9, 31 - LOCK_WORD_MARK_BIT_SHIFT # Move mark bit to sign bit.
2701 sll $at, $at, 31 - LOCK_WORD_READ_BARRIER_STATE_SHIFT # Move barrier state bit
2704 move $t8, \obj # Move `obj` to $t8 for common code.
2727 sll $at, $at, 31 - LOCK_WORD_READ_BARRIER_STATE_SHIFT # Move barrier state bit
2740 move $t8, \root # Move reference to $t8 for common code.
/art/runtime/arch/mips/
Dquick_entrypoints_mips.S2046 move $a0, $v0 # Move result to $a0 (in delay slot).
2150 sll $t9, $t9, 31 - ACC_OBSOLETE_METHOD_SHIFT # Move obsolete method bit to sign bit.
2897 sll $at, $at, 31 - LOCK_WORD_READ_BARRIER_STATE_SHIFT # Move barrier state bit
2900 move $t8, \obj # Move `obj` to $t8 for common code.
2939 sll $at, $at, 31 - LOCK_WORD_READ_BARRIER_STATE_SHIFT # Move barrier state bit
2957 move $t8, \root # Move reference to $t8 for common code.
/art/compiler/utils/mips/
Dassembler_mips.cc1817 void MipsAssembler::Move(Register rd, Register rs) { in Move() function in art::mips::MipsAssembler
1822 Move(rd, ZERO); in Clear()
2848 Move(reg_hi, reg_lo); in LoadConst64()
3933 buffer_.Move(branch.GetEndLocation(), branch.GetOldEndLocation(), size); in PromoteBranches()
4993 void MipsAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::mips::MipsAssembler
4999 Move(dest.AsCoreRegister(), src.AsCoreRegister()); in Move()
5016 Move(dest.AsRegisterPairLow(), src.AsRegisterPairLow()); in Move()
5017 Move(dest.AsRegisterPairHigh(), src.AsRegisterPairHigh()); in Move()
5019 Move(dest.AsRegisterPairHigh(), src.AsRegisterPairHigh()); in Move()
5020 Move(dest.AsRegisterPairLow(), src.AsRegisterPairLow()); in Move()
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Dassembler_mips_test.cc858 TEST_F(AssemblerMIPSTest, Move) { in TEST_F() argument
859 DriverStr(RepeatRR(&mips::MipsAssembler::Move, "or ${reg1}, ${reg2}, $zero"), "Move"); in TEST_F()
2336 __ Move(mips::T0, mips::RA); in TEST_F() local
2482 __ Move(mips::T0, mips::T1); in TEST_F() local
Dassembler_mips.h564 void Move(Register rd, Register rs);
1280 void Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) override;
/art/compiler/utils/mips64/
Dassembler_mips64.cc1315 void Mips64Assembler::Move(GpuRegister rd, GpuRegister rs) { in Move() function in art::mips64::Mips64Assembler
1320 Move(rd, ZERO); in Clear()
3094 buffer_.Move(branch.GetEndLocation(), branch.GetOldEndLocation(), size); in PromoteBranches()
3108 buffer_.Move(first_literal_location - sizeof(uint32_t), first_literal_location, lit_size); in PromoteBranches()
3814 void Mips64Assembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::mips64::Mips64Assembler
3820 Move(dest.AsGpuRegister(), src.AsGpuRegister()); in Move()
4061 Move(tr.AsMips64().AsGpuRegister(), S1); in GetCurrentThread()
4087 Move(A0, exception->scratch_.AsGpuRegister()); in EmitExceptionPoll()
Dassembler_mips64.h667 void Move(GpuRegister rd, GpuRegister rs);
1366 void Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) override;

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