/art/test/692-vdex-inmem-loader/src-secondary/ |
D | gen.sh | 19 TMP=`mktemp -d` 24 (cd "$TMP" && \ 25 javac -d "${TMP}" "$DIR/${CLASS_A}.java" "$DIR/${CLASS_B}.java" && \ 26 d8 --output . "$TMP/${CLASS_A}.class" && 27 mv "$TMP/classes.dex" "$TMP/classesA.dex" && 28 d8 --output . "$TMP/${CLASS_B}.class" && 29 mv "$TMP/classes.dex" "$TMP/classesB.dex") 32 base64 "${TMP}/classesA.dex" | sed -E 's/^/ "/' | sed ':a;N;$!ba;s/\n/" +\n/g' | sed -E '$ s/$/"… 35 base64 "${TMP}/classesB.dex" | sed -E 's/^/ "/' | sed ':a;N;$!ba;s/\n/" +\n/g' | sed -E '$ s/$/"… 37 rm -rf "$TMP"
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/art/test/693-vdex-inmem-loader-evict/src-secondary/ |
D | gen.sh | 28 TMP=`mktemp -d` 38 (cd "$TMP" && \ 39 echo "public class MyClass${suffix} { }" > "$TMP/MyClass${suffix}.java" && \ 40 javac -d "${TMP}" "$TMP/MyClass${suffix}.java" && \ 41 d8 --output "$TMP" "$TMP/MyClass${suffix}.class" && \ 42 mv "$TMP/classes.dex" "$TMP/file${suffix}.dex") 45 checksum=`head -c 32 -z "$TMP/file${suffix}.dex" | tail -c 24 -z | base64` 52 base64 "${TMP}/file01.dex" | sed -E 's/^/ "/' | sed ':a;N;$!ba;s/\n/" +\n/g' | sed -E '$ s/$/");… 54 rm -rf "$TMP"
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/art/test/999-redefine-hiddenapi/src-redefine/ |
D | gen.sh | 19 TMP=`mktemp -d` 23 (cd "$TMP" && \ 24 javac -d "${TMP}" "$DIR/${CLASS}.java" && \ 25 d8 --output . "$TMP/${CLASS}.class" && 28 base64 "${TMP}/${CLASS}.class" | sed -E 's/^/ "/' | sed ':a;N;$!ba;s/\n/" +\n/g' | sed -E '$ s/$… 30 base64 "${TMP}/classes.dex" | sed -E 's/^/ "/' | sed ':a;N;$!ba;s/\n/" +\n/g' | sed -E '$ s/$/")… 32 rm -rf "$TMP"
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/art/compiler/optimizing/ |
D | intrinsics_mips.cc | 269 __ Sll(TMP, in, 24); in GenReverse() 270 __ Sra(TMP, TMP, 16); in GenReverse() 273 __ Or(out, out, TMP); in GenReverse() 285 __ Sll(TMP, in, 16); in GenReverse() 287 __ Or(out, out, TMP); in GenReverse() 290 __ And(TMP, out, AT); in GenReverse() 291 __ Sll(TMP, TMP, 8); in GenReverse() 294 __ Or(out, out, TMP); in GenReverse() 301 __ And(TMP, out, AT); in GenReverse() 302 __ Sll(TMP, TMP, 4); in GenReverse() [all …]
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D | code_generator_mips.cc | 654 DCHECK_NE(temp1_, TMP); in EmitNativeCode() 710 Register tmp_ptr = TMP; // Pointer to actual memory. in EmitNativeCode() 1106 __ Move(TMP, r2); in EmitSwap() 1108 __ Move(r1, TMP); in EmitSwap() 1135 __ Move(TMP, r2); in EmitSwap() 1137 __ Mtc1(TMP, f1); in EmitSwap() 1142 __ Move(TMP, r2); in EmitSwap() 1144 __ Move(r1, TMP); in EmitSwap() 1147 __ Move(TMP, r2); in EmitSwap() 1149 __ Move(r1, TMP); in EmitSwap() [all …]
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D | intrinsics_mips64.cc | 434 __ Srl(TMP, in, 1); in GenBitCount() 436 __ And(TMP, TMP, AT); in GenBitCount() 437 __ Subu(TMP, in, TMP); in GenBitCount() 439 __ And(out, TMP, AT); in GenBitCount() 440 __ Srl(TMP, TMP, 2); in GenBitCount() 441 __ And(TMP, TMP, AT); in GenBitCount() 442 __ Addu(TMP, out, TMP); in GenBitCount() 443 __ Srl(out, TMP, 4); in GenBitCount() 444 __ Addu(out, out, TMP); in GenBitCount() 447 __ LoadConst32(TMP, 0x01010101); in GenBitCount() [all …]
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D | code_generator_mips64.cc | 610 DCHECK_NE(temp1_, TMP); in EmitNativeCode() 662 GpuRegister tmp_ptr = TMP; // Pointer to actual memory. in EmitNativeCode() 1056 ScratchRegisterScope ensure_scratch(this, TMP, V0, codegen_->GetNumberOfCoreRegisters()); in Exchange() 1064 TMP, in Exchange() 1071 __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset); in Exchange() 1093 __ Lhu(TMP, kMethodRegisterArgument, ArtMethod::HotnessCountOffset().Int32Value()); in GenerateFrameEntry() 1094 __ Addiu(TMP, TMP, 1); in GenerateFrameEntry() 1095 __ Sh(TMP, kMethodRegisterArgument, ArtMethod::HotnessCountOffset().Int32Value()); in GenerateFrameEntry() 1359 gpr = TMP; in MoveLocation() 1366 gpr = TMP; in MoveLocation() [all …]
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D | intrinsics_x86_64.cc | 102 __ movl(CpuRegister(TMP), Address(src_curr_addr, 0)); in EmitNativeCode() 103 __ MaybeUnpoisonHeapReference(CpuRegister(TMP)); in EmitNativeCode() 109 int32_t entry_point_offset = Thread::ReadBarrierMarkEntryPointsOffset<kX86_64PointerSize>(TMP); in EmitNativeCode() 112 __ MaybePoisonHeapReference(CpuRegister(TMP)); in EmitNativeCode() 113 __ movl(Address(dst_curr_addr, 0), CpuRegister(TMP)); in EmitNativeCode() 886 Location TMP_loc = Location::RegisterLocation(TMP); in VisitSystemArrayCopy() 1015 __ testl(CpuRegister(TMP), CpuRegister(TMP)); in VisitSystemArrayCopy() 1021 __ movl(CpuRegister(TMP), Address(temp1, component_offset)); in VisitSystemArrayCopy() 1022 __ testl(CpuRegister(TMP), CpuRegister(TMP)); in VisitSystemArrayCopy() 1024 __ MaybeUnpoisonHeapReference(CpuRegister(TMP)); in VisitSystemArrayCopy() [all …]
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D | code_generator_x86_64.cc | 1329 blocked_core_registers_[TMP] = true; in SetupBlockedRegisters() 1491 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex())); in Move() 1492 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in Move() 1509 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex())); in Move() 1510 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in Move() 1545 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), 0)); in HandleGoto() 1546 __ addw(Address(CpuRegister(TMP), ArtMethod::HotnessCountOffset().Int32Value()), in HandleGoto() 5452 CpuRegister length_reg = CpuRegister(TMP); in VisitBoundsCheck() 5608 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), source.GetStackIndex())); in EmitMove() 5609 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), CpuRegister(TMP)); in EmitMove() [all …]
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D | code_generator_x86_64.h | 34 static constexpr Register TMP = R11; variable
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/art/runtime/arch/mips/ |
D | registers_mips.h | 61 TMP = T8, // scratch register (in addition to AT) enumerator
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/art/runtime/arch/mips64/ |
D | registers_mips64.h | 61 TMP = T8, // scratch register (in addition to AT) enumerator
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