Home
last modified time | relevance | path

Searched refs:imm16 (Results 1 – 4 of 4) sorted by relevance

/art/compiler/utils/mips/
Dassembler_mips.h300 void Addiu(Register rt, Register rs, uint16_t imm16, MipsLabel* patcher_label);
301 void Addiu(Register rt, Register rs, uint16_t imm16);
322 void Andi(Register rt, Register rs, uint16_t imm16);
324 void Ori(Register rt, Register rs, uint16_t imm16);
326 void Xori(Register rt, Register rs, uint16_t imm16);
356 void Lb(Register rt, Register rs, uint16_t imm16);
357 void Lh(Register rt, Register rs, uint16_t imm16);
358 void Lw(Register rt, Register rs, uint16_t imm16, MipsLabel* patcher_label);
359 void Lw(Register rt, Register rs, uint16_t imm16);
360 void Lwl(Register rt, Register rs, uint16_t imm16);
[all …]
Dassembler_mips.cc458 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16, MipsLabel* patcher_label) { in Addiu() argument
462 DsFsmInstr(EmitI(0x9, rs, rt, imm16), patcher_label).GprOuts(rt).GprIns(rs); in Addiu()
465 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) { in Addiu() argument
466 Addiu(rt, rs, imm16, /* patcher_label= */ nullptr); in Addiu()
561 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) { in Andi() argument
562 DsFsmInstr(EmitI(0xc, rs, rt, imm16)).GprOuts(rt).GprIns(rs); in Andi()
569 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) { in Ori() argument
570 DsFsmInstr(EmitI(0xd, rs, rt, imm16)).GprOuts(rt).GprIns(rs); in Ori()
577 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) { in Xori() argument
578 DsFsmInstr(EmitI(0xe, rs, rt, imm16)).GprOuts(rt).GprIns(rs); in Xori()
[all …]
/art/compiler/utils/mips64/
Dassembler_mips64.cc307 void Mips64Assembler::Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Addiu() argument
308 EmitI(0x9, rs, rt, imm16); in Addiu()
315 void Mips64Assembler::Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Daddiu() argument
316 EmitI(0x19, rs, rt, imm16); in Daddiu()
379 void Mips64Assembler::Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Andi() argument
380 EmitI(0xc, rs, rt, imm16); in Andi()
387 void Mips64Assembler::Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Ori() argument
388 EmitI(0xd, rs, rt, imm16); in Ori()
395 void Mips64Assembler::Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Xori() argument
396 EmitI(0xe, rs, rt, imm16); in Xori()
[all …]
Dassembler_mips64.h447 void Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
449 void Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
467 void Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16);
469 void Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
471 void Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
515 void Lb(GpuRegister rt, GpuRegister rs, uint16_t imm16);
516 void Lh(GpuRegister rt, GpuRegister rs, uint16_t imm16);
517 void Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16);
518 void Ld(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
519 void Lbu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
[all …]