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Searched refs:maybe_temp (Results 1 – 12 of 12) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_arm64.h305 Location maybe_temp,
321 Location maybe_temp,
692 Location maybe_temp,
Dcode_generator_mips64.h262 Location maybe_temp,
278 Location maybe_temp,
Dcode_generator_mips.h267 Location maybe_temp,
283 Location maybe_temp,
Dcode_generator_arm64.cc1881 Location maybe_temp = in HandleFieldGet() local
1890 maybe_temp, in HandleFieldGet()
2372 Location maybe_temp = in VisitArrayGet() local
2378 maybe_temp, in VisitArrayGet()
5703 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
5716 maybe_temp, in GenerateReferenceLoadOneRegister()
5724 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadOneRegister()
5728 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
5743 Location maybe_temp, in GenerateReferenceLoadTwoRegisters() argument
5757 maybe_temp, in GenerateReferenceLoadTwoRegisters()
[all …]
Dcode_generator_arm_vixl.h378 Location maybe_temp,
394 Location maybe_temp,
Dcode_generator_x86_64.h245 Location maybe_temp,
Dcode_generator_x86.h253 Location maybe_temp,
Dcode_generator_arm_vixl.cc5612 Location maybe_temp = (locations->GetTempCount() != 0) ? locations->GetTemp(0) : Location(); in HandleFieldGet() local
5616 instruction, out, base, offset, maybe_temp, /* needs_null_check= */ true); in HandleFieldGet()
6046 Location maybe_temp = in VisitArrayGet() local
6053 maybe_temp, in VisitArrayGet()
8265 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
8270 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
8275 instruction, out, out_reg, offset, maybe_temp, /* needs_null_check= */ false); in GenerateReferenceLoadOneRegister()
8281 __ Mov(RegisterFrom(maybe_temp), out_reg); in GenerateReferenceLoadOneRegister()
8284 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
8299 Location maybe_temp, in GenerateReferenceLoadTwoRegisters() argument
[all …]
Dcode_generator_mips64.cc5088 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
5094 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
5103 maybe_temp, in GenerateReferenceLoadOneRegister()
5110 __ Move(maybe_temp.AsRegister<GpuRegister>(), out_reg); in GenerateReferenceLoadOneRegister()
5113 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
5128 Location maybe_temp, in GenerateReferenceLoadTwoRegisters() argument
5136 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadTwoRegisters()
5144 maybe_temp, in GenerateReferenceLoadTwoRegisters()
Dcode_generator_mips.cc6916 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
6922 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
6931 maybe_temp, in GenerateReferenceLoadOneRegister()
6938 __ Move(maybe_temp.AsRegister<Register>(), out_reg); in GenerateReferenceLoadOneRegister()
6941 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
6956 Location maybe_temp, in GenerateReferenceLoadTwoRegisters() argument
6964 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadTwoRegisters()
6972 maybe_temp, in GenerateReferenceLoadTwoRegisters()
Dcode_generator_x86_64.cc6947 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
6962 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
6963 __ movl(maybe_temp.AsRegister<CpuRegister>(), out_reg); in GenerateReferenceLoadOneRegister()
6966 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()
Dcode_generator_x86.cc7643 Location maybe_temp, in GenerateReferenceLoadOneRegister() argument
7658 DCHECK(maybe_temp.IsRegister()) << maybe_temp; in GenerateReferenceLoadOneRegister()
7659 __ movl(maybe_temp.AsRegister<Register>(), out_reg); in GenerateReferenceLoadOneRegister()
7662 codegen_->GenerateReadBarrierSlow(instruction, out, out, maybe_temp, offset); in GenerateReferenceLoadOneRegister()