| /art/runtime/interpreter/mterp/arm/ |
| D | arithmetic.S | 21 and r2, r0, #255 @ r2<- BB
23 GET_VREG r0, r2 @ r0<- vBB
85 mov r2, rINST, lsr #12 @ r2<- B
87 GET_VREG r0, r2 @ r0<- vB
121 and r2, r3, #255 @ r2<- BB
122 GET_VREG r0, r2 @ r0<- vBB
155 and r2, r0, #255 @ r2<- BB
158 VREG_INDEX_TO_ADDR r2, r2 @ r2<- &fp[BB]
160 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1<- vBB/vBB+1
161 GET_VREG_WIDE_BY_ADDR r2, r3, r3 @ r2/r3<- vCC/vCC+1
[all …]
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| D | other.S | 10 add r2, rFP, #OFF_FP_SHADOWFRAME
81 FETCH r2, 2 @ r2<- BBBB (high)
83 orr r0, r0, r2, lsl #16 @ r1<- BBBBbbbb
84 add r2, rFP, #OFF_FP_SHADOWFRAME
98 FETCH r2, 3 @ r2<- hhhh (high middle)
102 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word)
103 CLEAR_SHADOW_PAIR r9, r2, r3 @ Zero out the shadow regs
116 CLEAR_SHADOW_PAIR r3, r2, lr @ Zero out the shadow regs
126 FETCH_S r2, 2 @ r2<- ssssBBBB (high)
128 orr r0, r0, r2, lsl #16 @ r0<- BBBBbbbb
[all …]
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| D | array.S | 14 FETCH_B r2, 1, 0 @ r2<- BB
17 GET_VREG r0, r2 @ r0<- vBB (array object)
26 $load r2, [r0, #$data_offset] @ r2<- vBB[vCC]
28 SET_VREG r2, r9 @ vAA<- r2
47 FETCH_B r2, 1, 0 @ r2<- BB
51 GET_VREG r0, r2 @ r0<- vBB (array object)
75 and r2, r0, #255 @ r2<- BB
77 GET_VREG r0, r2 @ r0<- vBB (array object)
87 ldrd r2, [r0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] @ r2/r3<- vBB[vCC]
90 SET_VREG_WIDE_BY_ADDR r2, r3, r9 @ vAA/vAA+1<- r2/r3
[all …]
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| D | object.S | 8 add r2, rFP, #OFF_FP_SHADOWFRAME @ arg2: ShadowFrame* sf
27 ldr r2, [rFP, #OFF_FP_METHOD] @ r2<- method
43 mov r2, rINST, lsr #12 @ B
44 GET_VREG r2, r2 @ object we're operating on
117 ubfx r2, rINST, #8, #4 @ r2<- A
121 SET_VREG_OBJECT r0, r2 @ fp[A]<- r0
129 mov r2, rINST, lsr #12 @ r2<- B
131 GET_VREG r3, r2 @ r3<- object we're operating on
155 ubfx r2, rINST, #8, #4 @ r2<- A
160 VREG_INDEX_TO_ADDR r3, r2 @ r3<- &fp[A]
[all …]
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| D | floating_point.S | 13 and r2, r0, #255 @ r2<- BB
15 VREG_INDEX_TO_ADDR r2, r2 @ r2<- &vBB
17 GET_VREG_FLOAT_BY_ADDR s0, r2 @ s0<- vBB
337 ubfx r2, r1, #20, #11 @ grab the exponent
339 cmp r2, r3 @ MINLONG < x > MAXLONG?
344 cmp r2, r3
379 ubfx r2, r0, #23, #8 @ grab the exponent
380 cmp r2, #0xbe @ MININT < x > MAXINT?
384 cmp r2, #0xff @ NaN or infinity?
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| D | control_flow.S | 151 mov r2, rINST, lsr #8 @ r2<- AA
152 GET_VREG r0, r2 @ r0<- vAA
190 mov r2, rINST, lsr #8 @ r2<- AA
191 VREG_INDEX_TO_ADDR r2, r2 @ r2<- &fp[AA]
192 GET_VREG_WIDE_BY_ADDR r0, r1, r2 @ r0/r1 <- vAA/vAA+1
204 mov r2, rINST, lsr #8 @ r2<- AA
205 GET_VREG r1, r2 @ r1<- vAA (exception object)
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| D | main.S | 399 str r3, [r2, #SHADOWFRAME_RESULT_REGISTER_OFFSET]
402 str r1, [r2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET]
406 ldr r0, [r2, #SHADOWFRAME_NUMBER_OF_VREGS_OFFSET]
407 add rFP, r2, #SHADOWFRAME_VREGS_OFFSET @ point to vregs.
409 ldr r0, [r2, #SHADOWFRAME_DEX_PC_OFFSET] @ Get starting dex_pc.
420 mov r2, rSELF
437 mov r2, rPC
528 ldr r2, [rSELF, #THREAD_FLAGS_OFFSET]
691 mov r2, rINST
723 ldr r2, [rFP, #OFF_FP_RESULT_REGISTER]
[all …]
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| D | invoke.S | 11 mov r2, rPC
34 mov r2, rPC
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| /art/runtime/arch/arm/ |
| D | memcmp16_arm.S | 37 cmpne r2, #0
51 cmp r2, #12
62 subs r2, r2, #1
79 sub r2, r2, #1
102 subs r2, r2, #(16 + 2)
133 subs r2, r2, #16
137 1: adds r2, r2, #(16 - 2 + 2)
145 subs r2, r2, #2
149 4: adds r2, r2, #2
178 subs r2, r2, #1
[all …]
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| D | quick_entrypoints_arm.S | 125 .cfi_rel_offset r2, 4
169 .cfi_restore r2
213 .cfi_rel_offset r2, 8
236 .cfi_restore r2
655 mov r2, r10
658 bl memcpy @ memcpy (dest r0, src r1, bytes r2)
695 ldrex r2, [r0, #MIRROR_OBJECT_LOCK_WORD_OFFSET]
696 eor r3, r2, r1 @ Prepare the value to store if unlocked
700 ands ip, r2, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ Test the non-gc bits.
703 strex r2, r3, [r0, #MIRROR_OBJECT_LOCK_WORD_OFFSET]
[all …]
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| D | jni_entrypoints_arm.S | 24 push {r0, r1, r2, r3, lr} @ spill regs
28 .cfi_rel_offset r2, 8
38 pop {r0, r1, r2, r3, lr} @ restore regs
42 .cfi_restore r2
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| /art/compiler/utils/ |
| D | assembler_thumb_test_expected.cc.inc | 8 " 12: 9223 str r2, [sp, #140] ; 0x8c\n",
162 " 0: 68e2 ldr r2, [r4, #12]\n",
163 " 2: f8d4 2fff ldr.w r2, [r4, #4095] ; 0xfff\n",
164 " 6: f504 5280 add.w r2, r4, #4096 ; 0x1000\n",
165 " a: 6812 ldr r2, [r2, #0]\n",
166 " c: f504 1280 add.w r2, r4, #1048576 ; 0x100000\n",
167 " 10: f8d2 20a4 ldr.w r2, [r2, #164] ; 0xa4\n",
168 " 14: f44f 5280 mov.w r2, #4096 ; 0x1000\n",
169 " 18: f2c0 0210 movt r2, #16\n",
170 " 1c: 4422 add r2, r4\n",
[all …]
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| D | assembler_thumb_test.cc | 296 #define R2 vixl::aarch32::r2
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| /art/runtime/interpreter/mterp/arm64/ |
| D | floating_point.S | 21 %def fbinopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2"):
30 GET_VREG_DOUBLE $r2, w2 // w2<- vCC
72 %def fcmp(wide="", r1="s1", r2="s2", cond="lt"):
84 GET_VREG_DOUBLE $r2, w3
87 GET_VREG $r2, w3
89 fcmp $r1, $r2
179 % fbinopWide(instr="fadd d0, d1, d2", result="d0", r1="d1", r2="d2")
191 % fcmp(wide="_WIDE", r1="d1", r2="d2", cond="cc")
194 % fcmp(wide="", r1="s1", r2="s2", cond="cc")
197 % fcmp(wide="_WIDE", r1="d1", r2="d2", cond="lt")
[all …]
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| D | arithmetic.S | 130 %def binopWide(preinstr="", instr="add x0, x1, x2", result="x0", r1="x1", r2="x2", chkzero="0"):
148 GET_VREG_WIDE $r2, w2 // w2<- vCC
151 cbz $r2, common_errDivideByZero // is second operand zero?
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| /art/libartbase/base/ |
| D | data_hash.h | 52 static constexpr uint32_t r2 = 13; in operator() local
69 hash = ((hash << r2) | (hash >> (32 - r2))) * m + n; in operator()
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| /art/test/1922-owned-monitors-info/src/art/ |
| D | Test1922.java | 197 for (Function<Runnable, Runnable> r2 = li2.next(); li2.hasNext(); r2 = li2.next()) { in runTestsOtherThread()
204 r2.apply(null).getClass(), in runTestsOtherThread()
209 final Thread thr = new Thread(r1.apply(r2.apply(r3.apply(pause)))); in runTestsOtherThread()
241 for (Function<Runnable, Runnable> r2 = li2.next(); li2.hasNext(); r2 = li2.next()) { in runTestsCurrentThread()
248 r2.apply(null).getClass(), in runTestsCurrentThread()
251 r1.apply(r2.apply(r3.apply(printer))).run(); in runTestsCurrentThread()
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| /art/runtime/gc/ |
| D | allocation_record.h | 149 bool operator()(const T* r1, const T* r2) const { in operator()
150 if (r1 == r2) return true; in operator()
151 if (r1 == nullptr || r2 == nullptr) return false; in operator()
152 return *r1 == *r2; in operator()
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| /art/test/140-field-packing/src/ |
| D | GapOrder.java | 40 public Object r2; field in GapOrder
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| /art/openjdkjvmti/ |
| D | jvmti_weak_table.h | 207 const art::GcRoot<art::mirror::Object>& r2) const in operator()
209 return r1.Read<art::kWithoutReadBarrier>() == r2.Read<art::kWithoutReadBarrier>(); in operator()
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| /art/compiler/optimizing/ |
| D | code_generator_arm_vixl.h | 53 vixl::aarch32::r2,
102 vixl::aarch32::r2,
209 ? helpers::LocationFrom(vixl::aarch32::r2, vixl::aarch32::r3) in GetSetValueLocation()
211 ? helpers::LocationFrom(vixl::aarch32::r2) in GetSetValueLocation()
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| D | code_generator_mips.cc | 1105 Register r2 = loc2.AsRegister<Register>(); in EmitSwap() local
1106 __ Move(TMP, r2); in EmitSwap()
1107 __ Move(r2, r1); in EmitSwap()
1134 Register r2 = loc1.IsRegister() ? loc1.AsRegister<Register>() : loc2.AsRegister<Register>(); in EmitSwap() local
1135 __ Move(TMP, r2); in EmitSwap()
1136 __ Mfc1(r2, f1); in EmitSwap()
1141 Register r2 = loc2.AsRegisterPairLow<Register>(); in EmitSwap() local
1142 __ Move(TMP, r2); in EmitSwap()
1143 __ Move(r2, r1); in EmitSwap()
1146 r2 = loc2.AsRegisterPairHigh<Register>(); in EmitSwap()
[all …]
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| D | code_generator_mips64.cc | 1404 GpuRegister r2 = loc2.AsRegister<GpuRegister>(); in SwapLocations() local
1405 __ Move(TMP, r2); in SwapLocations()
1406 __ Move(r2, r1); in SwapLocations()
1416 FpuRegister r2 = loc2.AsFpuRegister<FpuRegister>(); in SwapLocations() local
1419 __ MovS(r1, r2); in SwapLocations()
1420 __ MovS(r2, FTMP); in SwapLocations()
1424 __ MovD(r1, r2); in SwapLocations()
1425 __ MovD(r2, FTMP); in SwapLocations()
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| /art/runtime/verifier/ |
| D | reg_type_test.cc | 938 for (auto r2 : all) { in TEST_F() local
939 if (r1 == r2) { in TEST_F()
990 bfs(compute_black, r2); in TEST_F()
1011 ASSERT_EQ(no_in_edge.size(), 1u) << r1->Dump() << " u " << r2->Dump() in TEST_F()
1015 expectations.emplace_back(*r1, *r2, **no_in_edge.begin()); in TEST_F()
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| /art/runtime/gc/allocator/ |
| D | rosalloc.h | 642 bool operator()(const RosAlloc::Run* r1, const RosAlloc::Run* r2) const { in operator()
643 return r1 == r2; in operator()
|