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Searched refs:BusBase (Results 1 – 6 of 6) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/PciHostBridgeDxe/
DPciRootBridgeIo.c641 UINT64 MemLimit = GetPcieCfgAddress (Private->Ecam, Private->BusBase + 1, 1, 0, 0) - 1; in SetAtuConfig0RW()
809 PrivateData->BusBase = ResAppeture->BusBase; in RootBridgeConstructor()
978 if (PciRbAddr->Bus < PrivateData->BusBase || PciRbAddr->Bus > PrivateData->BusLimit) { in RootBridgeIoCheckParameter()
983 if (PciRbAddr->Bus == PrivateData->BusBase && PciRbAddr->Device != 0) { in RootBridgeIoCheckParameter()
988 if (PciRbAddr->Bus == (PrivateData->BusBase + 1 ) && PciRbAddr->Device != 0) { in RootBridgeIoCheckParameter()
1767 if (EfiPciAddress->Bus < PrivateData->BusBase || EfiPciAddress->Bus > PrivateData->BusLimit) { in RootBridgeIoPciRead()
1777 if(EfiPciAddress->Bus == PrivateData->BusBase) in RootBridgeIoPciRead()
1785 if (EfiPciAddress->Bus == PrivateData->BusBase){ in RootBridgeIoPciRead()
1788 else if(EfiPciAddress->Bus == PrivateData->BusBase + 1) in RootBridgeIoPciRead()
1940 …if (((EfiPciAddress->Bus == PrivateData->BusBase) && (EfiPciAddress->Device == 0x00) && (EfiPciAdd… in RootBridgeIoPciWrite()
[all …]
DPciHostBridge.h466 UINT64 BusBase; member
DPciHostBridge.c1090 BusStart = RootBridgeInstance->BusBase; in StartBusEnumeration()
1205 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) { in SetBusNumbers()
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Pci/Dxe/PciHostBridge/
DPciHostResource.h26 UINTN BusBase; member
DPciHostBridge.c160 PrivateData->Aperture.BusBase = QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSBASE; in InitializePciHostBridge()
838 BusStart = RootBridgeInstance->Aperture.BusBase; in StartBusEnumeration()
952 …if ((BusStart < RootBridgeInstance->Aperture.BusBase) || (BusEnd > RootBridgeInstance->Aperture.Bu… in SetBusNumbers()
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Include/Library/
DPlatformPciLib.h194 UINT64 BusBase; member