| /device/linaro/bootloader/edk2/CorebootModulePkg/Library/BaseSerialPortLib16550/ |
| D | BaseSerialPortLib16550.c | 198 UINT32 IoLimit; in GetSerialRegisterBase() local
268 IoLimit = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimit)); in GetSerialRegisterBase()
269 if ((IoLimit & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) { in GetSerialRegisterBase()
270 IoLimit = IoLimit >> 4; in GetSerialRegisterBase()
272 …IoLimit = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimitUpper16)) << 4) | (IoLi… in GetSerialRegisterBase()
284 if (IoLimit < IoBase) { in GetSerialRegisterBase()
291 if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) { in GetSerialRegisterBase()
295 ParentIoLimit = IoLimit; in GetSerialRegisterBase()
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| /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/ |
| D | BaseSerialPortLib16550.c | 198 UINT32 IoLimit; in GetSerialRegisterBase() local
268 IoLimit = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimit)); in GetSerialRegisterBase()
269 if ((IoLimit & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) { in GetSerialRegisterBase()
270 IoLimit = IoLimit >> 4; in GetSerialRegisterBase()
272 …IoLimit = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimitUpper16)) << 4) | (IoLi… in GetSerialRegisterBase()
284 if (IoLimit < IoBase) { in GetSerialRegisterBase()
291 if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) { in GetSerialRegisterBase()
295 ParentIoLimit = IoLimit; in GetSerialRegisterBase()
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| /device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/ |
| D | PcatPciRootBridge.c | 253 Limit = (((UINT32)PciConfigurationHeader.Bridge.IoLimit & 0xf0) << 8) | 0x0fff; in InitializePcatPciRootBridge()
262 if (PrivateData->IoLimit < Limit) { in InitializePcatPciRootBridge()
263 PrivateData->IoLimit = Limit; in InitializePcatPciRootBridge()
435 if (PrivateData->IoLimit < 0xffff) { in InitializePcatPciRootBridge()
436 PrivateData->IoLimit = 0xffff; in InitializePcatPciRootBridge()
572 if (PrivateData->IoLimit >= PrivateData->IoBase) { in ConstructConfiguration()
651 if (PrivateData->IoLimit >= PrivateData->IoBase) { in ConstructConfiguration()
657 Configuration->AddrRangeMax = PrivateData->IoLimit; in ConstructConfiguration()
869 if (PrivateData->IoLimit < Limit) { in PcatPciRootBridgeParseBars()
870 PrivateData->IoLimit = (UINT32)Limit; in PcatPciRootBridgeParseBars()
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| D | PcatPciRootBridge.h | 67 UINT64 IoLimit; // Max allowable io access member
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Pci/Dxe/PciHostBridge/ |
| D | PciHostResource.h | 37 UINTN IoLimit; member
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| D | PciHostBridge.c | 165 …PrivateData->Aperture.IoLimit = PcdGet16 (PcdPciHostBridgeIoBase) + (PcdGet16 (PcdPciHostBridgeIoS… in InitializePciHostBridge()
411 … if (RootBridgeInstance->Aperture.IoBase < RootBridgeInstance->Aperture.IoLimit) { in NotifyPhase()
426 while((BaseAddress + AddrLen) <= RootBridgeInstance->Aperture.IoLimit + 1) { in NotifyPhase()
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| D | PciRootBridgeIo.c | 577 if (Address > PrivateData->Aperture.IoLimit) { in RootBridgeIoIoRead()
653 if (Address > PrivateData->Aperture.IoLimit) { in RootBridgeIoIoWrite()
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| /device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/Ipf/ |
| D | PcatIo.c | 80 if ( Address < PrivateData->IoBase || Address > PrivateData->IoLimit ) { in PcatRootBridgeIoIoRead()
183 if ( Address < PrivateData->IoBase || Address > PrivateData->IoLimit ) { in PcatRootBridgeIoIoWrite()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/PciHostBridgeDxe/ |
| D | PciHostBridge.h | 471 UINT64 IoLimit; member
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| D | PciRootBridgeIo.c | 736 SetAtuIoRW (Private->RbPciBar, Private->IoBase, Private->IoLimit, Private->CpuIoRegionBase, 3); in InitAtu()
799 PrivateData->IoLimit = ResAppeture->IoLimit; in RootBridgeConstructor()
972 Limit = PrivateData->IoLimit; in RootBridgeIoCheckParameter()
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| /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
| D | PciDeviceSupport.c | 495 (PciData.Bridge.IoBase != 0 || PciData.Bridge.IoLimit != 0)) || in EnableBridgeAttributes()
497 …((PciData.Bridge.IoBase & 0xF0) != 0 || (PciData.Bridge.IoLimit & 0xF0) != 0 || PciData.Bridge.IoB… in EnableBridgeAttributes()
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Include/Library/ |
| D | PlatformPciLib.h | 199 UINT64 IoLimit; member
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| /device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/ |
| D | Pci.h | 372 UINT8 IoLimit; // I/O Limit member
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| D | Pci.c | 3533 IoAddress32 = (Bridge->IoLimitUpper << 16 | Bridge->IoLimit << 8); in PciExplainBridgeData()
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| /device/linaro/bootloader/edk2/OvmfPkg/Library/PciHostBridgeLib/ |
| D | XenSupport.c | 281 Limit = (((UINT32) Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff; in ScanForRootBridges()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
| D | pci22.h | 79 UINT8 IoLimit; member
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| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
| D | pci22.h | 72 UINT8 IoLimit; member
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| /device/linaro/bootloader/edk2/CorebootPayloadPkg/Library/PciHostBridgeLib/ |
| D | PciHostBridgeSupport.c | 407 Limit = (((UINT32) Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff; in ScanForRootBridges()
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| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| D | Pci22.h | 87 UINT8 IoLimit; member
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| /device/linaro/bootloader/edk2/EdkShellPkg/ |
| D | ShellR33.patch | 6219 IoAddress32 = (Bridge->IoLimitUpper << 16 | Bridge->IoLimit << 8);
|