Searched refs:TEGRA_SCRATCH_BASE (Results 1 – 6 of 6) sorted by relevance
| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| D | plat_secondary.c | 64 mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_SECURE_RSV1_SCRATCH_0, in plat_secondary_setup()
66 mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_SECURE_RSV1_SCRATCH_1, in plat_secondary_setup()
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| D | plat_setup.c | 84 MAP_REGION_FLAT(TEGRA_SCRATCH_BASE, 0x10000, /* 64KB */
224 val = mmio_read_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV53_LO); in plat_get_bl31_params()
236 val = mmio_read_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV53_HI); in plat_get_bl31_plat_params()
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| D | plat_psci_handlers.c | 123 mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV6, val); in tegra_soc_pwr_domain_suspend()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/smmu/ |
| D | smmu.c | 111 mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV11_LO, in tegra_smmu_save_context()
113 mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV11_HI, in tegra_smmu_save_context()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/memctrl/ |
| D | memctrl_v2.c | 439 mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV55_LO, in tegra_memctrl_tzdram_setup()
441 mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV55_HI, in tegra_memctrl_tzdram_setup()
443 mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV54_HI, in tegra_memctrl_tzdram_setup()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/t186/ |
| D | tegra_def.h | 216 #define TEGRA_SCRATCH_BASE U(0x0C390000) macro
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