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Searched refs:TSP (Results 1 – 12 of 12) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/bl32/tsp/
Dtsp.mk33 $(error TSP is not supported on platform ${PLAT})
/device/linaro/bootloader/arm-trusted-firmware/docs/
Dinterrupt-framework-design.rst294 (TSP) which runs only in Secure-EL1.
440 initialisation. The TSP provides the address of the vector table
442 interrupts in the ``sel1_intr_entry`` field. The TSPD passes control to the TSP at
445 The handover agreement between the TSP and the TSPD requires that the TSPD
447 ``tsp_sel1_intr_entry()``. The TSP has to preserve the callee saved general
580 The routing model for Secure-EL1 and non-secure interrupts chosen by the TSP is
583 The TSP implements an entrypoint (``tsp_sel1_intr_entry()``) for handling Secure-EL1
588 The TSP also replaces the default exception vector table referenced through the
594 The TSP also programs the Secure Physical Timer in the ARM Generic Timer block
747 Secure-EL1 interrupts are handled in S-EL1 by TSP. Its handler
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Dchange-log.rst265 - For the TSP, resolved corruption of pre-empted secure context by aborting any
583 but switches to the runtime console for any later logs at runtime. The TSP
669 incomplete for PSCI, the TSP(D) and the Juno platform.
831 - The firmware design documentation for the Test Secure-EL1 Payload (TSP) and
924 - Clarified the platform porting interface to the TSP.
985 - The firmware design documentation for the Test Secure-EL1 Payload (TSP) and
1094 target and supporting test code to the TSP. Also demonstrated non-secure
1095 interrupt handling during TSP processing.
1143 - The firmware design documentation for the Test Secure-EL1 Payload (TSP) and
1219 - Added support for a Test Secure-EL1 Payload (TSP) and a corresponding
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Duser-guide.rst163 - (AArch64 only) The TSP (Test Secure Payload), corresponding to the BL32
578 routing model which routes non-secure interrupts asynchronously from TSP
579 to EL3 causing immediate preemption of TSP. The EL3 is responsible
580 for saving and restoring the TSP context in this routing model. The
582 interrupts to TSP allowing it to save its context and hand over
609 BL31 in TZC secured DRAM. If TSP is present, then setting this option also
610 sets the TSP location to DRAM and ignores the ``ARM_TSP_RAM_LOCATION`` build
665 - ``ARM_TSP_RAM_LOCATION``: location of the TSP binary. Options:
796 The TSP is coupled with a companion runtime service in the BL31 firmware,
797 called the TSPD. Therefore, if you intend to use the TSP, the BL31 image
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Dfirmware-design.rst769 ARM Trusted Firmware provides a Test Secure-EL1 Payload (TSP) and its
770 associated Dispatcher (TSPD). Details of SPD design and TSP/TSPD operation
970 The ARM Trusted Firmware provides a Test Secure-EL1 Payload (TSP) and a Test
979 The TSP runs in Secure-EL1. It is designed to demonstrate synchronous
987 the TSP to prepare for or respond to the power state change
991 - Initializing the TSP
1545 on FVP, BL31 and TSP need to know the limit address that their PROGBITS
1709 illustrated for both FVP and Juno in the following diagrams, using the TSP as
1715 **FVP with TSP in Trusted SRAM (default option):**
1738 **FVP with TSP in Trusted DRAM:**
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Dporting-guide.rst407 If the Test Secure-EL1 Payload (TSP) instantiation of BL32 is supported by the
410 - **#define : TSP\_SEC\_MEM\_BASE**
412 Defines the base address of the secure memory used by the TSP image on the
415 - **#define : TSP\_SEC\_MEM\_SIZE**
422 - **#define : TSP\_IRQ\_SEC\_PHY\_TIMER**
425 TSP's interrupt handling code.
517 - **#define : TSP\_PROGBITS\_LIMIT**
519 Defines the maximum address that the TSP's progbits sections can occupy.
2499 The TSP uses this API to start processing of the secure physical timer
2521 The TSP uses this API to finish processing of the secure physical timer
/device/linaro/bootloader/arm-trusted-firmware/docs/plat/
Dxilinx-zynqmp.rst19 To build bl32 TSP you have to rebuild bl31 too:
Dsocionext-uniphier.rst111 If you use TSP for BL32, ``BL32=<path-to-BL32>`` is not required. Just add the
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/
DGloblNvs.asl54 TSPV, 8, // (24) Passive Trip Point TSP Value
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/
DXhciSched.h486 UINT32 TSP:1; member
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
DXhciSched.h490 UINT32 TSP:1; member
/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSetupDxe/
DVfrStrings.uni967 #string STR_ACPI_PASSIVE_TSP_VALUE #language en-US " Passive TSP Value"
968 #string STR_ACPI_PASSIVE_TSP_VALUE_HELP #language en-US "This item sets the TSP valu…