/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | macho-adrp-missing-reloc.s | 3 ; CHECK: error: ADR/ADRP relocations must be GOT relative
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64ExternalSymbolizer.cpp | 107 MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand() 116 } else if (MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64ExternalSymbolizer.cpp | 107 MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand() 116 } else if (MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
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/external/llvm/test/CodeGen/ARM/ |
D | jump-table-islands-split.ll | 8 ; eliminate the entry calculation (ADD) and use the ADR as the base.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | jump-table-islands-split.ll | 8 ; eliminate the entry calculation (ADD) and use the ADR as the base.
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/external/vixl/src/aarch64/ |
D | instructions-aarch64.cc | 302 VIXL_ASSERT(Mask(PCRelAddressingMask) == ADR); in GetImmPCOffsetTarget() 342 if ((Mask(PCRelAddressingMask) == ADR)) { in SetPCRelImmTarget()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
D | LoopRerollPass.cpp | 892 const auto *ADR = dyn_cast<SCEVAddRecExpr>(SE->getSCEV(DRS.BaseInst)); in validateRootSet() local 893 if (!ADR) in validateRootSet() 896 const SCEV *StepSCEV = SE->getMinusSCEV(SE->getSCEV(DRS.Roots[0]), ADR); in validateRootSet() 898 if (ADR->getStepRecurrence(*SE) != SE->getMulExpr(StepSCEV, ScaleSCEV)) in validateRootSet()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64MacroFusion.cpp | 206 case AArch64::ADR: in isAddressLdStPair()
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/external/llvm/lib/Transforms/Scalar/ |
D | LoopRerollPass.cpp | 967 const auto *ADR = dyn_cast<SCEVAddRecExpr>(SE->getSCEV(V.BaseInst)); in findRoots() local 968 if (!ADR) in findRoots() 982 const SCEV *StepSCEV = SE->getMinusSCEV(SE->getSCEV(V.Roots[0]), ADR); in findRoots() 984 if (ADR->getStepRecurrence(*SE) != SE->getMulExpr(StepSCEV, ScaleSCEV)) { in findRoots()
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 55 # ADR
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 55 # ADR
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 55 # ADR
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/external/tremolo/Tremolo/ |
D | dpen.s | 63 ADR r14,dpen_read_return 460 ADR r6,.Lcrc_lookup
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D | mdctARM.s | 1003 ADR r6, bitrev 1033 ADR r7, .Lsincos_lookup @ sincos_lookup0 + 1127 ADR r7, .Lsincos_lookup @ sincos_lookup0 +
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/external/v8/src/arm64/ |
D | instructions-arm64.h | 221 return Mask(PCRelAddressingMask) == ADR; in IsAdr()
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64MCCodeEmitter.cpp | 229 MCFixupKind Kind = MI.getOpcode() == AArch64::ADR in getAdrLabelOpValue()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZInstrHFP.td | 135 def ADR : BinaryRR<"adr", 0x2A, null_frag, FP64, FP64>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64MCCodeEmitter.cpp | 244 MCFixupKind Kind = MI.getOpcode() == AArch64::ADR in getAdrLabelOpValue()
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-thumb-instructions.s | 81 @ ADR
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/external/llvm/test/MC/ARM/ |
D | basic-thumb-instructions.s | 86 @ ADR
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-thumb-instructions.s | 86 @ ADR
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMAsmPrinter.cpp | 1215 : ARM::ADR)); in EmitInstruction() 1229 : ARM::ADR)); in EmitInstruction()
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/external/llvm/lib/Target/ARM/ |
D | ARMAsmPrinter.cpp | 1310 : ARM::ADR)) in EmitInstruction() 1326 : ARM::ADR)) in EmitInstruction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMAsmPrinter.cpp | 1241 : ARM::ADR)) in EmitInstruction() 1257 : ARM::ADR)) in EmitInstruction()
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/external/capstone/ |
D | ChangeLog | 273 CBNZ, ADR.
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