| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/ |
| D | Nios2ISelLowering.cpp | 117 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments() local
129 ArgValue = in LowerFormalArguments()
130 DAG.getNode(Opcode, DL, RegVT, ArgValue, DAG.getValueType(ValVT)); in LowerFormalArguments()
131 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, ValVT, ArgValue); in LowerFormalArguments()
137 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()
138 InVals.push_back(ArgValue); in LowerFormalArguments()
|
| /external/llvm/lib/Transforms/Scalar/ |
| D | LowerExpectIntrinsic.cpp | 65 Value *ArgValue = CI->getArgOperand(0); in handleSwitchExpect() local
82 SI.setCondition(ArgValue); in handleSwitchExpect()
117 Value *ArgValue = CI->getArgOperand(0); in handleBranchExpect() local
135 CmpI->setOperand(0, ArgValue); in handleBranchExpect()
137 BI.setCondition(ArgValue); in handleBranchExpect()
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| /external/clang/include/clang/Frontend/ |
| D | CommandLineSourceLoc.h | 65 inline bool parse(Option &O, StringRef ArgName, StringRef ArgValue,
71 parse(Option &O, StringRef ArgName, StringRef ArgValue, in parse() argument
75 Val = ParsedSourceLocation::FromString(ArgValue); in parse()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| D | LowerExpectIntrinsic.cpp | 55 Value *ArgValue = CI->getArgOperand(0); in HandleSwitchExpect() local
76 SI->setCondition(ArgValue); in HandleSwitchExpect()
102 Value *ArgValue = CI->getArgOperand(0); in HandleIfExpect() local
122 CmpI->setOperand(0, ArgValue); in HandleIfExpect()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | LowerExpectIntrinsic.cpp | 66 Value *ArgValue = CI->getArgOperand(0); in handleSwitchExpect() local
83 SI.setCondition(ArgValue); in handleSwitchExpect()
277 Value *ArgValue = CI->getArgOperand(0); in handleBrSelExpect() local
294 CmpI->setOperand(0, ArgValue); in handleBrSelExpect()
296 BSI.setCondition(ArgValue); in handleBrSelExpect()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 193 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments() local
199 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
202 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
206 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
208 InVals.push_back(ArgValue); in LowerFormalArguments()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 184 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments() local
190 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
193 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
197 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
199 InVals.push_back(ArgValue); in LowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 999 SDValue ArgValue; in LowerFormalArguments() local
1003 ArgValue = unpackF64OnRV32DSoftABI(DAG, Chain, VA, DL); in LowerFormalArguments()
1005 ArgValue = unpackFromRegLoc(DAG, Chain, VA, DL); in LowerFormalArguments()
1007 ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL); in LowerFormalArguments()
1013 InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, in LowerFormalArguments()
1020 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, in LowerFormalArguments()
1028 InVals.push_back(ArgValue); in LowerFormalArguments()
1074 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT); in LowerFormalArguments() local
1077 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, in LowerFormalArguments()
1249 SDValue ArgValue = OutVals[i]; in LowerCall() local
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 305 SDValue ArgValue; in LowerCCCArguments() local
332 ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, LocVT); in LowerCCCArguments()
345 ArgValue = DAG.getLoad(LocVT, dl, Chain, FIN, in LowerCCCArguments()
354 ArgValue = DAG.getNode(ISD::AssertSext, dl, LocVT, ArgValue, in LowerCCCArguments()
357 ArgValue = DAG.getNode(ISD::AssertZext, dl, LocVT, ArgValue, in LowerCCCArguments()
361 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
363 InVals.push_back(ArgValue); in LowerCCCArguments()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 242 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments() local
247 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
250 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
256 InVals.push_back(ArgValue); in LowerFormalArguments()
|
| /external/v8/include/libplatform/ |
| D | v8-tracing.h | 29 union ArgValue { union
70 ArgValue* arg_values() { return arg_values_; } in arg_values()
92 ArgValue arg_values_[kTraceMaxNumArgs];
|
| /external/v8/src/libplatform/tracing/ |
| D | trace-writer.cc | 59 TraceObject::ArgValue value) { in AppendArgValue()
156 TraceObject::ArgValue* arg_values = trace_event->arg_values(); in AppendTraceEvent()
|
| D | trace-writer.h | 23 void AppendArgValue(uint8_t type, TraceObject::ArgValue value);
|
| /external/clang/lib/ASTMatchers/Dynamic/ |
| D | Parser.cpp | 368 ParserValue ArgValue; in parseMatcherExpressionImpl() local
369 ArgValue.Text = Tokenizer->peekNextToken().Text; in parseMatcherExpressionImpl()
370 ArgValue.Range = Tokenizer->peekNextToken().Range; in parseMatcherExpressionImpl()
371 if (!parseExpressionImpl(&ArgValue.Value)) { in parseMatcherExpressionImpl()
375 Args.push_back(ArgValue); in parseMatcherExpressionImpl()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXISelLowering.cpp | 231 SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain, in LowerFormalArguments() local
233 InVals.push_back(ArgValue); in LowerFormalArguments()
245 SDValue ArgValue = DAG.getNode(PTXISD::READ_PARAM, dl, RegVT, Chain, in LowerFormalArguments() local
248 InVals.push_back(ArgValue); in LowerFormalArguments()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 910 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments() local
923 ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, in LowerFormalArguments()
925 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
928 InVals.push_back(ArgValue); in LowerFormalArguments()
976 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, LiveReg, MVT::i32); in LowerFormalArguments() local
981 OutChains.push_back(DAG.getStore(Chain, dl, ArgValue, PtrOff, in LowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1057 SDValue ArgValue; in LowerFormalArguments() local
1073 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
1087 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1090 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
1092 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1095 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
1097 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1101 InVals.push_back(ArgValue); in LowerFormalArguments()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 340 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments() local
346 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
349 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
353 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
355 InVals.push_back(ArgValue); in LowerCCCArguments()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 449 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments() local
455 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
458 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
462 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
464 InVals.push_back(ArgValue); in LowerCCCArguments()
|
| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 390 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) { in EmitVAStartEnd() argument
392 if (ArgValue->getType() != DestType) in EmitVAStartEnd()
393 ArgValue = in EmitVAStartEnd()
394 Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data()); in EmitVAStartEnd()
397 return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue); in EmitVAStartEnd()
508 Value *ArgValue = EmitScalarExpr(E->getArg(0)); in EmitBuiltinExpr() local
510 Value *NegOp = Builder.CreateNeg(ArgValue, "neg"); in EmitBuiltinExpr()
512 Builder.CreateICmpSGE(ArgValue, in EmitBuiltinExpr()
513 llvm::Constant::getNullValue(ArgValue->getType()), in EmitBuiltinExpr()
516 Builder.CreateSelect(CmpResult, ArgValue, NegOp, "abs"); in EmitBuiltinExpr()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 465 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments() local
471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
480 InVals.push_back(ArgValue); in LowerCCCArguments()
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 449 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments() local
455 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
458 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
462 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
464 InVals.push_back(ArgValue); in LowerCCCArguments()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 631 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments() local
637 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
640 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
644 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
646 InVals.push_back(ArgValue); in LowerCCCArguments()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2295 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments() local
2307 ArgValue = DAG.getNode(Opcode, dl, RegVT, ArgValue, in LowerFormalArguments()
2309 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2315 ArgValue = DAG.getNode(ISD::BITCAST, dl, MVT::f32, ArgValue); in LowerFormalArguments()
2321 std::swap(ArgValue, ArgValue2); in LowerFormalArguments()
2322 ArgValue = DAG.getNode(MipsISD::BuildPairF64, dl, MVT::f64, in LowerFormalArguments()
2323 ArgValue, ArgValue2); in LowerFormalArguments()
2327 InVals.push_back(ArgValue); in LowerFormalArguments()
2391 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, MVT::i32); in LowerFormalArguments() local
2394 OutChains.push_back(DAG.getStore(Chain, dl, ArgValue, PtrOff, in LowerFormalArguments()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3087 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments() local
3089 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
3096 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()
3103 std::swap(ArgValue, ArgValue2); in LowerFormalArguments()
3104 ArgValue = DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, in LowerFormalArguments()
3105 ArgValue, ArgValue2); in LowerFormalArguments()
3108 InVals.push_back(ArgValue); in LowerFormalArguments()
3130 SDValue ArgValue = DAG.getLoad( in LowerFormalArguments() local
3134 OutChains.push_back(ArgValue.getValue(1)); in LowerFormalArguments()
3136 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
[all …]
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