| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 28 IndexedMap<OpData> &OperandMap, unsigned BaseIdx) { in addDagOperandMapping() argument
36 OperandMap[BaseIdx + i].Kind = OpData::Reg; in addDagOperandMapping()
37 OperandMap[BaseIdx + i].Data.Reg = DI->getDef(); in addDagOperandMapping()
45 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!"); in addDagOperandMapping()
46 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) in addDagOperandMapping()
50 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
55 OperandMap[BaseIdx + i + I].Kind = OpData::Operand; in addDagOperandMapping()
58 OperandMap[BaseIdx + i].Kind = OpData::Imm; in addDagOperandMapping()
59 OperandMap[BaseIdx + i].Data.Imm = II->getValue(); in addDagOperandMapping()
65 addDagOperandMapping(Rec, SubDag, Insn, OperandMap, BaseIdx + i); in addDagOperandMapping()
[all …]
|
| D | PseudoLoweringEmitter.h | 53 unsigned BaseIdx);
|
| /external/llvm/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 58 unsigned BaseIdx);
75 IndexedMap<OpData> &OperandMap, unsigned BaseIdx) { in addDagOperandMapping() argument
83 OperandMap[BaseIdx + i].Kind = OpData::Reg; in addDagOperandMapping()
84 OperandMap[BaseIdx + i].Data.Reg = DI->getDef(); in addDagOperandMapping()
92 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!"); in addDagOperandMapping()
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) in addDagOperandMapping()
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
102 OperandMap[BaseIdx + i + I].Kind = OpData::Operand; in addDagOperandMapping()
105 OperandMap[BaseIdx + i].Kind = OpData::Imm; in addDagOperandMapping()
106 OperandMap[BaseIdx + i].Data.Imm = II->getValue(); in addDagOperandMapping()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | PseudoLoweringEmitter.cpp | 58 unsigned BaseIdx);
75 IndexedMap<OpData> &OperandMap, unsigned BaseIdx) { in addDagOperandMapping() argument
83 OperandMap[BaseIdx + i].Kind = OpData::Reg; in addDagOperandMapping()
84 OperandMap[BaseIdx + i].Data.Reg = DI->getDef(); in addDagOperandMapping()
92 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!"); in addDagOperandMapping()
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) in addDagOperandMapping()
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
102 OperandMap[BaseIdx + i + I].Kind = OpData::Operand; in addDagOperandMapping()
105 OperandMap[BaseIdx + i].Kind = OpData::Imm; in addDagOperandMapping()
106 OperandMap[BaseIdx + i].Data.Imm = II->getValue(); in addDagOperandMapping()
[all …]
|
| /external/clang/lib/StaticAnalyzer/Core/ |
| D | Store.cpp | 459 SVal BaseIdx = ElemR->getIndex(); in getLValueElement() local
461 if (!BaseIdx.getAs<nonloc::ConcreteInt>()) in getLValueElement()
465 BaseIdx.castAs<nonloc::ConcreteInt>().getValue(); in getLValueElement()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 122 unsigned BaseIdx = alignDown(getMaxWorkGroupSGPRCount(MF), 4) - 4; in reservedPrivateSegmentBufferReg() local
123 unsigned BaseReg(AMDGPU::SGPR_32RegClass.getRegister(BaseIdx)); in reservedPrivateSegmentBufferReg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 110 unsigned BaseIdx = alignDown(ST.getMaxNumSGPRs(MF), 4) - 4; in reservedPrivateSegmentBufferReg() local
111 unsigned BaseReg(AMDGPU::SGPR_32RegClass.getRegister(BaseIdx)); in reservedPrivateSegmentBufferReg()
|
| /external/llvm/lib/Transforms/Scalar/ |
| D | RewriteStatepointsForGC.cpp | 1189 Value *BaseIdx = in CreateGCRelocates() local
1200 GCRelocateDecl, {StatepointToken, BaseIdx, LiveIdx}, in CreateGCRelocates()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | RewriteStatepointsForGC.cpp | 1313 Value *BaseIdx = in CreateGCRelocates() local
1324 GCRelocateDecl, {StatepointToken, BaseIdx, LiveIdx}, in CreateGCRelocates()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 3230 SDValue BaseIdx = N->getOperand(1); in PromoteIntRes_EXTRACT_SUBVECTOR() local
3237 SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(), in PromoteIntRes_EXTRACT_SUBVECTOR()
3238 BaseIdx, DAG.getConstant(i, dl, BaseIdx.getValueType())); in PromoteIntRes_EXTRACT_SUBVECTOR()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 3381 SDValue BaseIdx = N->getOperand(1); in PromoteIntRes_EXTRACT_SUBVECTOR() local
3388 SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(), in PromoteIntRes_EXTRACT_SUBVECTOR()
3389 BaseIdx, DAG.getConstant(i, dl, BaseIdx.getValueType())); in PromoteIntRes_EXTRACT_SUBVECTOR()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 2850 SDValue BaseIdx = N->getOperand(1); in PromoteIntRes_EXTRACT_SUBVECTOR() local
2857 SDValue Index = DAG.getNode(ISD::ADD, dl, BaseIdx.getValueType(), in PromoteIntRes_EXTRACT_SUBVECTOR()
2858 BaseIdx, DAG.getIntPtrConstant(i)); in PromoteIntRes_EXTRACT_SUBVECTOR()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 6117 unsigned BaseIdx, unsigned LastIdx, in isHorizontalBinOp() argument
6121 assert(BaseIdx * 2 <= LastIdx && "Invalid Indices in input!"); in isHorizontalBinOp()
6127 unsigned ExpectedVExtractIdx = BaseIdx; in isHorizontalBinOp()
6128 unsigned NumElts = LastIdx - BaseIdx; in isHorizontalBinOp()
6134 SDValue Op = N->getOperand(i + BaseIdx); in isHorizontalBinOp()
6140 ExpectedVExtractIdx = BaseIdx; in isHorizontalBinOp()
6179 ExpectedVExtractIdx = BaseIdx; in isHorizontalBinOp()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 7453 unsigned BaseIdx, unsigned LastIdx, in isHorizontalBinOp() argument
7457 assert(BaseIdx * 2 <= LastIdx && "Invalid Indices in input!"); in isHorizontalBinOp()
7463 unsigned ExpectedVExtractIdx = BaseIdx; in isHorizontalBinOp()
7464 unsigned NumElts = LastIdx - BaseIdx; in isHorizontalBinOp()
7470 SDValue Op = N->getOperand(i + BaseIdx); in isHorizontalBinOp()
7476 ExpectedVExtractIdx = BaseIdx; in isHorizontalBinOp()
7515 ExpectedVExtractIdx = BaseIdx; in isHorizontalBinOp()
|