/external/v8/src/arm64/ |
D | decoder-arm64-inl.h | 102 DCHECK_EQ(0x1, instr->Bit(28)); in DecodePCRelAddressing() 119 if (instr->Bit(25) == 0) { in DecodeBranchSystemException() 127 if (instr->Bit(25) == 0) { in DecodeBranchSystemException() 128 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException() 140 if (instr->Bit(25) == 0) { in DecodeBranchSystemException() 141 if (instr->Bit(24) == 0) { in DecodeBranchSystemException() 179 if ((instr->Bit(24) == 0x1) || in DecodeBranchSystemException() 205 if ((instr->Bit(28) == 0) && (instr->Bit(29) == 0) && (instr->Bit(26) == 1)) { in DecodeLoadStore() 210 if (instr->Bit(24) == 0) { in DecodeLoadStore() 211 if (instr->Bit(28) == 0) { in DecodeLoadStore() [all …]
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/external/v8/src/arm/ |
D | disasm-arm.cc | 242 shift_names[instr->Bit(6) * 2], in PrintShiftSat() 365 (instr->Bit(24) == 0x0) && in FormatVFPRegister() 367 (instr->Bit(4) == 0x1)) { in FormatVFPRegister() 369 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4); in FormatVFPRegister() 452 if (instr->Bit(21) == 0) { in FormatOption() 478 if (instr->Bit(21) == 0) { in FormatOption() 528 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) && in FormatOption() 529 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) { in FormatOption() 530 if (instr->Bit(5) == 1) { in FormatOption() 622 if (instr->Bit(22) == 0) { in FormatOption() [all …]
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D | constants-arm.h | 471 inline int Bit(int nr) const { in Bit() function 490 static inline int Bit(Instr instr, int nr) { in Bit() function 540 inline int NValue() const { return Bit(7); } in NValue() 541 inline int MValue() const { return Bit(5); } in MValue() 542 inline int DValue() const { return Bit(22); } in DValue() 544 inline int PValue() const { return Bit(24); } in PValue() 545 inline int UValue() const { return Bit(23); } in UValue() 546 inline int Opc1Value() const { return (Bit(23) << 2) | Bits(21, 20); } in Opc1Value() 549 inline int SzValue() const { return Bit(8); } in SzValue() 550 inline int VLValue() const { return Bit(20); } in VLValue() [all …]
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D | simulator-arm.cc | 1310 if (instr->Bit(4) == 0) { in GetShiftRm() 1990 if (instr->Bit(24) == 0) { in DecodeType01() 1998 if (instr->Bit(23) == 0) { in DecodeType01() 1999 if (instr->Bit(21) == 0) { in DecodeType01() 2013 if (instr->Bit(22) == 0) { in DecodeType01() 2044 if (instr->Bit(22) == 1) { in DecodeType01() 2066 if (instr->Bit(20) == 1) { in DecodeType01() 2155 if (instr->Bit(22) == 0) { in DecodeType01() 2243 if (((instr->Bits(7, 4) & 0xD) == 0xD) && (instr->Bit(20) == 0)) { in DecodeType01() 2662 if (instr->Bit(4) == 0) { in DecodeType3() [all …]
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D | constants-arm.cc | 23 high16 |= (0xFF * Bit(18)) << 6; // xxbbbbbb,bbxxxxxx. in DoubleImmedVmov() 24 high16 |= (Bit(18) ^ 1) << 14; // xBxxxxxx,xxxxxxxx. in DoubleImmedVmov() 25 high16 |= Bit(19) << 15; // axxxxxxx,xxxxxxxx. in DoubleImmedVmov()
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/external/u-boot/doc/ |
D | README.mpc83xx.ddrecc | 18 the 'ecc testdw' 'ecc testword' command (see example 'Injecting Multiple-Bit 34 Injecting Single-Bit Errors 51 Memory Single-Bit Error Management (0..255): 52 Single-Bit Error Threshold: 255 53 Single Bit Error Counter: 16 57 Multiple-Bit Error: 0 58 Single-Bit Error: 0 61 16 errors were generated, Single-Bit Error flag was not set as Single Bit Error 62 Counter did not reach Single-Bit Error Threshold. 78 Injecting Multiple-Bit Errors [all …]
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/external/capstone/arch/X86/ |
D | X86GenRegisterInfo.inc | 642 // GR8 Bit set. 652 // GR8_NOREX Bit set. 662 // GR8_ABCD_H Bit set. 672 // GR8_ABCD_L Bit set. 682 // GR16 Bit set. 692 // GR16_NOREX Bit set. 702 // VK1 Bit set. 712 // VK16 Bit set. 722 // VK2 Bit set. 732 // VK4 Bit set. [all …]
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/external/capstone/arch/ARM/ |
D | ARMGenRegisterInfo.inc | 1183 // SPR Bit set. 1193 // GPR Bit set. 1203 // GPRwithAPSR Bit set. 1213 // SPR_8 Bit set. 1223 // GPRnopc Bit set. 1233 // rGPR Bit set. 1243 // hGPR Bit set. 1253 // tGPR Bit set. 1263 // GPRnopc_and_hGPR Bit set. 1273 // hGPR_and_rGPR Bit set. [all …]
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/external/capstone/arch/Mips/ |
D | MipsGenRegisterInfo.inc | 1001 // OddSP Bit set. 1011 // CCR Bit set. 1021 // COP2 Bit set. 1031 // COP3 Bit set. 1041 // DSPR Bit set. 1051 // FGR32 Bit set. 1061 // FGRCC Bit set. 1071 // FGRH32 Bit set. 1081 // GPR32 Bit set. 1091 // HWRegs Bit set. [all …]
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/external/capstone/arch/SystemZ/ |
D | SystemZGenRegisterInfo.inc | 320 // GRX32Bit Bit set. 330 // FP32Bit Bit set. 340 // GR32Bit Bit set. 350 // GRH32Bit Bit set. 360 // ADDR32Bit Bit set. 370 // CCRegs Bit set. 380 // FP64Bit Bit set. 390 // GR64Bit Bit set. 400 // ADDR64Bit Bit set. 410 // FP128Bit Bit set. [all …]
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/external/capstone/arch/PowerPC/ |
D | PPCGenRegisterInfo.inc | 688 // GPRC Bit set. 698 // GPRC_NOR0 Bit set. 708 // GPRC_and_GPRC_NOR0 Bit set. 718 // CRBITRC Bit set. 728 // F4RC Bit set. 738 // CRRC Bit set. 748 // CARRYRC Bit set. 758 // CCRC Bit set. 768 // CTRRC Bit set. 778 // VRSAVERC Bit set. [all …]
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/external/capstone/arch/AArch64/ |
D | AArch64GenRegisterInfo.inc | 1069 // FPR8 Bit set. 1079 // FPR16 Bit set. 1089 // GPR32all Bit set. 1099 // FPR32 Bit set. 1109 // GPR32 Bit set. 1119 // GPR32sp Bit set. 1129 // GPR32common Bit set. 1139 // CCR Bit set. 1149 // GPR32sponly Bit set. 1159 // GPR64all Bit set. [all …]
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/external/libchrome/base/strings/ |
D | strcat_unittest.cc | 11 TEST(StrCat, 8Bit) { 20 TEST(StrCat, 16Bit) { 31 TEST(StrAppend, 8Bit) { 47 TEST(StrAppend, 16Bit) {
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/external/v8/src/ppc/ |
D | simulator-ppc.cc | 1620 if (instr->Bit(0) == 1) { // LK flag set in ExecuteBranchConditional() 1645 int L = instr->Bit(21); in ExecuteGeneric() 1684 int L = instr->Bit(21); in ExecuteGeneric() 1766 if (instr->Bit(0) == 1) { // LK flag set in ExecuteGeneric() 1850 if (instr->Bit(0)) { // RC bit set in ExecuteGeneric() 1890 if (instr->Bit(0)) { // RC bit set in ExecuteGeneric() 1960 if (instr->Bit(0)) { // RC bit set in ExecuteGeneric() 1974 if (instr->Bit(0)) { // RC bit set in ExecuteGeneric() 2042 if (instr->Bit(0)) { // RC bit set in ExecuteGeneric() 2056 if (instr->Bit(0)) { // RC bit set in ExecuteGeneric() [all …]
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D | disasm-ppc.cc | 205 if (instr->Bit(10) == 1) { in FormatOption() 211 if (instr->Bit(0) == 1) { in FormatOption() 236 if (instr->Bit(0) == 1) { in FormatOption() 243 if (instr->Bit(1) == 1) { in FormatOption() 281 value = (sh | (instr->Bit(1) << 5)); in FormatOption() 297 value = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); in FormatOption() 305 value = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); in FormatOption() 483 if (instr->Bit(0) == 1) { in DecodeExt1() 674 if (instr->Bit(21)) { in DecodeExt2() 730 if (instr->Bit(21)) { in DecodeExt2() [all …]
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/external/capstone/arch/Sparc/ |
D | SparcGenRegisterInfo.inc | 376 // FCCRegs Bit set. 386 // FPRegs Bit set. 396 // IntRegs Bit set. 406 // DFPRegs Bit set. 416 // I64Regs Bit set. 426 // DFPRegs_with_sub_even Bit set. 436 // QFPRegs Bit set. 446 // QFPRegs_with_sub_even Bit set.
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/TableGen/ |
D | Record.h | 416 virtual Init *getBit(unsigned Bit) const = 0; 473 Init *getBit(unsigned Bit) const override { in getBit() argument 502 Init *getBit(unsigned Bit) const override { in getBit() argument 503 assert(Bit < 1 && "Bit index out of range!"); in getBit() 557 Init *getBit(unsigned Bit) const override { in getBit() argument 558 assert(Bit < NumBits && "Bit index out of range!"); in getBit() 559 return getTrailingObjects<Init *>()[Bit]; in getBit() 588 Init *getBit(unsigned Bit) const override { in getBit() argument 589 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit() 619 Init *getBit(unsigned Bit) const override { in getBit() argument [all …]
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/external/llvm/include/llvm/TableGen/ |
D | Record.h | 366 virtual Init *getBit(unsigned Bit) const = 0; 441 Init *getBit(unsigned Bit) const override { in getBit() argument 468 Init *getBit(unsigned Bit) const override { in getBit() argument 469 assert(Bit < 1 && "Bit index out of range!"); in getBit() 528 Init *getBit(unsigned Bit) const override { in getBit() argument 529 assert(Bit < NumBits && "Bit index out of range!"); in getBit() 530 return getTrailingObjects<Init *>()[Bit]; in getBit() 567 Init *getBit(unsigned Bit) const override { in getBit() argument 568 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit() 605 Init *getBit(unsigned Bit) const override { in getBit() argument [all …]
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/external/clang/test/Parser/ |
D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) in InterlockedBitTestAndSet() argument 8 mov eax, Bit in InterlockedBitTestAndSet()
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/external/libmtp/logs/ |
D | mtp-detect-ziilabs-egg.txt | 85 de9a: Audio Bit Rate UINT32 data type range: MIN 8000, MAX 320000, STEP 1 READ ONLY 94 de95: Audio Bit Depth UINT32 data type enumeration: 8, 16, READ ONLY 109 de9a: Audio Bit Rate UINT32 data type range: MIN 5000, MAX 505000, STEP 1 READ ONLY 118 de95: Audio Bit Depth UINT32 data type enumeration: 8, 16, READ ONLY 133 de9a: Audio Bit Rate UINT32 data type range: MIN 64000, MAX 1536000, STEP 1 READ ONLY 142 de95: Audio Bit Depth UINT32 data type enumeration: 8, 16, READ ONLY 164 de95: Audio Bit Depth UINT32 data type enumeration: 8, 16, READ ONLY 231 de9a: Audio Bit Rate UINT32 data type range: MIN 8000, MAX 1536000, STEP 1 READ ONLY 234 de91: Total Bit Rate UINT32 data type range: MIN 0, MAX 9000000, STEP 1 READ ONLY 236 de9c: Video Bit Rate UINT32 data type range: MIN 0, MAX 8000000, STEP 1 READ ONLY [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/CommandGuide/ |
D | llvm-bcanalyzer.rst | 207 The total number of 32-bit integers encoded using the Variable Bit Rate 212 The total number of 64-bit integers encoded using the Variable Bit Rate encoding 218 the Variable Bit Rate encoding scheme. 223 integers had they not been compressed with the Variable Bit Rage encoding 228 The total number of bytes saved by using the Variable Bit Rate encoding scheme. 288 integers that use the Variable Bit Rate encoding scheme. 294 Bit Rate encoding scheme. 298 The total number of bytes saved in this function by using the Variable Bit
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/external/llvm/docs/CommandGuide/ |
D | llvm-bcanalyzer.rst | 207 The total number of 32-bit integers encoded using the Variable Bit Rate 212 The total number of 64-bit integers encoded using the Variable Bit Rate encoding 218 the Variable Bit Rate encoding scheme. 223 integers had they not been compressed with the Variable Bit Rage encoding 228 The total number of bytes saved by using the Variable Bit Rate encoding scheme. 288 integers that use the Variable Bit Rate encoding scheme. 294 Bit Rate encoding scheme. 298 The total number of bytes saved in this function by using the Variable Bit
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/external/v8/src/ic/ |
D | handler-configuration.cc | 51 typedef typename ICHandler::DoAccessCheckOnReceiverBits Bit; in InitPrototypeChecksImpl() typedef 52 *smi_handler = SetBitFieldValue<Bit>(isolate, *smi_handler, true); in InitPrototypeChecksImpl() 59 typedef typename ICHandler::LookupOnReceiverBits Bit; in InitPrototypeChecksImpl() typedef 60 *smi_handler = SetBitFieldValue<Bit>(isolate, *smi_handler, true); in InitPrototypeChecksImpl()
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/external/epid-sdk/epid/common-testhelper/1.1/testdata/ |
D | grprl_revoked_grp_x_last_entry.inc | 21 * 0 32 64 96 128 Bit 26 * 128 160 Bit
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D | grprl_revoked_grp_x_first_entry.inc | 21 * 0 32 64 96 128 Bit 26 * 128 160 Bit
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