/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | invalid-IT-CBNZ-thumb.txt | 3 # CBZ / CBNZ not allowed in IT block.
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D | thumb2.txt | 248 # CBZ/CBNZ
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/external/llvm/test/CodeGen/AArch64/ |
D | br-undef-cond.ll | 3 ; Make sure we don't end up with a CBNZ of an undef v-/phys-reg.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | br-undef-cond.ll | 3 ; Make sure we don't end up with a CBNZ of an undef v-/phys-reg.
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 166 CBNZ, enumerator
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D | AArch64ISelLowering.cpp | 917 case AArch64ISD::CBNZ: return "AArch64ISD::CBNZ"; in getTargetNodeName() 3698 return DAG.getNode(AArch64ISD::CBNZ, dl, MVT::Other, Chain, LHS, Dest); in LowerBR_CC() 9636 BR = DAG.getNode(AArch64ISD::CBNZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); in performBRCONDCombine()
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D | AArch64InstrInfo.td | 164 def AArch64cbnz : SDNode<"AArch64ISD::CBNZ", SDT_AArch64cbz, 1252 defm CBNZ : CmpBranch<1, "cbnz", AArch64cbnz>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 166 CBNZ, enumerator
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D | AArch64SchedThunderX.td | 250 def : InstRW<[THXT8XWriteBR], (instregex "^CBNZ")>;
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D | AArch64SchedFalkorDetails.td | 1074 def : InstRW<[FalkorWr_1Z_0cyc], (instregex "^(BR|RET|(CBZ|CBNZ|TBZ|TBNZ)(W|X))$")>;
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D | AArch64SchedThunderX2T99.td | 405 (instregex "^CBZ", "^CBNZ", "^TBZ", "^TBNZ")>;
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D | AArch64ISelLowering.cpp | 1168 case AArch64ISD::CBNZ: return "AArch64ISD::CBNZ"; in getTargetNodeName() 4341 return DAG.getNode(AArch64ISD::CBNZ, dl, MVT::Other, Chain, LHS, Dest); in LowerBR_CC() 10655 BR = DAG.getNode(AArch64ISD::CBNZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); in performBRCONDCombine()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | thumb-diagnostics.s | 290 @ CBZ/CBNZ - out of range immediates for branches
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D | basic-thumb2-instructions.s | 415 @ CBZ/CBNZ
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/external/capstone/ |
D | ChangeLog | 273 CBNZ, ADR.
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/external/v8/src/arm64/ |
D | constants-arm64.h | 708 CBNZ = CBNZ_w enumerator
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D | assembler-arm64.cc | 1059 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt)); in cbnz()
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 203 ### CBNZ ### subsection 210 ### CBNZ ### subsection
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 684 CBNZ = CBNZ_w enumerator
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D | assembler-aarch64.cc | 303 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt)); in cbnz()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMScheduleA57.td | 167 // B, BX, BL, BLX (imm, reg != LR, reg == LR), CBZ, CBNZ
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 255 # CBZ/CBNZ
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 255 # CBZ/CBNZ
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 284 @ CBZ/CBNZ
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 406 @ CBZ/CBNZ
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