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/external/libcxx/test/std/experimental/language.support/support.coroutines/coroutine.handle/coroutine.handle.prom/
Dpromise.pass.cpp45 using CH = coro::coroutine_handle<promise_type>; in do_runtime_test() typedef
48 CH h = CH::from_promise(*this); in do_runtime_test()
73 auto const& CH = H; in do_test() local
74 ASSERT_SAME_TYPE(decltype(CH.promise()), Promise&); in do_test()
75 LIBCPP_ASSERT_NOT_NOEXCEPT(CH.promise()); in do_test()
/external/libchrome/crypto/
Dscoped_capi_types.h99 template<class CH, typename FP> inline
100 bool operator==(CH h, const ScopedCAPIHandle<CH, FP>& b) {
104 template<class CH, typename FP> inline
105 bool operator!=(CH h, const ScopedCAPIHandle<CH, FP>& b) {
/external/tensorflow/tensorflow/core/kernels/
Dcrop_and_resize_op_benchmark_test.cc54 #define BM_CropAndResizeDev(DEVICE, B, W, H, D, CH, CW) \ argument
55 static void BM_CropAndResize_##DEVICE##_##B##_##W##_##H##_##D##_##CH##_##CW( \
58 test::Benchmark(#DEVICE, BM_CropAndResize(B, W, H, D, CH, CW)).Run(iters); \
60 BENCHMARK(BM_CropAndResize_##DEVICE##_##B##_##W##_##H##_##D##_##CH##_##CW);
Dcwise_ops_test.cc206 #define BM_BIAS_ADD_GRAD(DEVICE, FMT, C_TYPE, TF_TYPE, R, C, CH) \ argument
207 void BM_##DEVICE##_##FMT##_##C_TYPE##_BiasAddGrad_R##R##_C##C##_CH##CH( \
219 BENCHMARK(BM_##DEVICE##_##FMT##_##C_TYPE##_BiasAddGrad_R##R##_C##C##_CH##CH) \
220 ->ArgPair(RowsAndColsArg(R, C), CH);
/external/tcpdump/tests/
Dieee802.11_exthdr.out3 …e 27dBm tx power [bit 15] Probe Response (omus) [1.0* 2.0* 5.5* 11.0* 6.0 9.0 12.0 18.0 Mbit] CH: 1
6 …e 27dBm tx power [bit 15] Probe Response (omus) [1.0* 2.0* 5.5* 11.0* 6.0 9.0 12.0 18.0 Mbit] CH: 1
9 …e 27dBm tx power [bit 15] Probe Response (omus) [1.0* 2.0* 5.5* 11.0* 6.0 9.0 12.0 18.0 Mbit] CH: 1
12 …e 27dBm tx power [bit 15] Probe Response (omus) [1.0* 2.0* 5.5* 11.0* 6.0 9.0 12.0 18.0 Mbit] CH: 1
15 …e 27dBm tx power [bit 15] Probe Response (omus) [1.0* 2.0* 5.5* 11.0* 6.0 9.0 12.0 18.0 Mbit] CH: 1
18 …e 27dBm tx power [bit 15] Probe Response (omus) [1.0* 2.0* 5.5* 11.0* 6.0 9.0 12.0 18.0 Mbit] CH: 1
/external/python/cpython3/Objects/stringlib/
Dcodecs.h636 # define SWAB2(CH) ((CH) << 8) /* high byte is zero */ in STRINGLIB() argument
690 #define SWAB2(CH) (((CH) << 8) | ((CH) >> 8)) in STRINGLIB() argument
737 # define SWAB4(CH, tmp) ((CH) << 24) /* high bytes are zero */ argument
739 # define SWAB4(CH, tmp) (tmp = (CH), \ argument
743 # define SWAB4(CH, tmp) (tmp = (CH), \ argument
/external/u-boot/drivers/rtc/
Dds1302.c47 unsigned char CH:1; /* clock halt 1=stop 0=start */ member
215 if (bbclk.CH) { in rtc_init()
217 bbclk.CH=0; in rtc_init()
266 if (bbclk.CH) { in rtc_get()
302 bbclk.CH=0; /* dont halt */ in rtc_set()
/external/llvm/test/CodeGen/SystemZ/
Dint-cmp-01.ll6 ; Check the low end of the CH range.
19 ; Check the high end of the aligned CH range.
33 ; Check the next halfword up, which should use CHY instead of CH.
121 ; Check that CH allows an index.
153 ; Check the comparison can be reversed if that allows CH to be used.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dint-cmp-01.ll6 ; Check the low end of the CH range.
19 ; Check the high end of the aligned CH range.
33 ; Check the next halfword up, which should use CHY instead of CH.
121 ; Check that CH allows an index.
153 ; Check the comparison can be reversed if that allows CH to be used.
/external/epid-sdk/ext/ipp/sources/ippcp/
Dpcphashsha256px.c75 #define CH(x,y,z) (((x) & (y)) ^ (~(x) & (z))) macro
91 + CH(v[(4-i)&7], v[(5-i)&7], v[(6-i)&7]); \
96 Ipp32u _T1 = (H) + SUM1((E)) + CH((E),(F),(G)) + (W)[(r)] + (K)[(r)]; \
Dpcphashsha512px.c76 #define CH(x,y,z) (((x) & (y)) ^ (~(x) & (z))) macro
92 + CH(v[(4-i)&7], v[(5-i)&7], v[(6-i)&7]); \
97 Ipp64u _T1 = (H) + SUM1((E)) + CH((E),(F),(G)) + (W)[(r)] + (K)[(r)]; \
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp77 X86::AL, X86::CL, X86::DL, X86::BL, X86::AH, X86::CH, in initLLVMToSEHAndCVRegMapping()
297 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
298 return X86::CH; in getX86SubSuperRegisterOrZero()
309 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
346 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
382 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
418 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp531 SDValue LL, LH, RL, RH, CL, CH; in SplitRes_SELECT() local
537 CL = CH = Cond; in SplitRes_SELECT()
540 std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl); in SplitRes_SELECT()
544 std::tie(CL, CH) = SplitVSETCC(Cond.getNode(), DAG); in SplitRes_SELECT()
549 GetSplitVector(Cond, CL, CH); in SplitRes_SELECT()
551 std::tie(CL, CH) = DAG.SplitVector(Cond, dl); in SplitRes_SELECT()
555 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); in SplitRes_SELECT()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86RegisterInfo.td69 def CH : Register<"ch">;
76 def CX : RegisterWithSubRegs<"cx", [CL,CH]>;
283 // FIXME: Allow AH, CH, DH, BH to be used as general-purpose registers in
289 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
291 let AltOrders = [(sub GR8, AH, BH, CH, DH)];
338 def GR8_ABCD_H : RegisterClass<"X86", [i8], 8, (add AH, CH, DH, BH)>;
368 (add AL, CL, DL, AH, CH, DH, BL, BH)> {
369 let AltOrders = [(sub GR8_NOREX, AH, BH, CH, DH)];
/external/vboot_reference/firmware/2lib/
D2sha256.c45 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
79 t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) \
161 t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) in vb2_sha256_transform()
D2sha512.c45 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
95 t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) \
257 t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) in vb2_sha512_transform()
/external/cldr/tools/cldr-unittest/src/org/unicode/cldr/unittest/data/
DlocaleMatcherTest.txt184 en, de, fr, ja ; de-CH, fr ; de
236 de-AT, de-DE, de-CH ; de ; de-DE
258 en-GB, en, de, fr, ja ; de-CH, fr ; de
300 …CH, de-DE, de-LI, de-LU, dje, dje-NE, dsb, dsb-DE, dua, dua-CM, dyo, dyo-SN, dz, dz-BT, ebu, ebu-K…
334 en-PSCRACK, de-PSCRACK, fr-PSCRACK, pt-PT-PSCRACK ; de-CH ; de-PSCRACK
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/util/data/
DlocaleMatcherTest.txt188 en, de, fr, ja ; de-CH, fr ; de
240 de-AT, de-DE, de-CH ; de ; de-DE
262 en-GB, en, de, fr, ja ; de-CH, fr ; de
304 …CH, de-DE, de-LI, de-LU, dje, dje-NE, dsb, dsb-DE, dua, dua-CM, dyo, dyo-SN, dz, dz-BT, ebu, ebu-K…
338 en-PSCRACK, de-PSCRACK, fr-PSCRACK, pt-PT-PSCRACK ; de-CH ; en-PSCRACK # was: de-PSCRACK
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/util/data/
DlocaleMatcherTest.txt188 en, de, fr, ja ; de-CH, fr ; de
240 de-AT, de-DE, de-CH ; de ; de-DE
262 en-GB, en, de, fr, ja ; de-CH, fr ; de
304 …CH, de-DE, de-LI, de-LU, dje, dje-NE, dsb, dsb-DE, dua, dua-CM, dyo, dyo-SN, dz, dz-BT, ebu, ebu-K…
338 en-PSCRACK, de-PSCRACK, fr-PSCRACK, pt-PT-PSCRACK ; de-CH ; en-PSCRACK # was: de-PSCRACK
/external/avb/libavb/
Davb_sha256.c43 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
85 t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
166 t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] + in SHA256_transform()
Davb_sha512.c43 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
87 t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
302 t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] + in SHA512_transform()
/external/u-boot/lib/libavb/
Davb_sha512.c16 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
60 t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
275 t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] + in SHA512_transform()
Davb_sha256.c16 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
46 t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
127 t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] + in SHA256_transform()
/external/vboot_reference/firmware/lib/cryptolib/
Dsha256.c46 #define CH(x, y, z) ((x & y) ^ (~x & z)) macro
80 t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) \
158 t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) in SHA256_transform()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp89 { codeview::RegisterId::CVRegCH, X86::CH}, in initLLVMToSEHAndCVRegMapping()
513 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
514 return X86::CH; in getX86SubSuperRegisterOrZero()
525 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
562 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
598 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
634 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()

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