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Searched refs:CLKMGR_CLKCNT_MSK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/
Dclock_manager_s10.c251 CLKMGR_CLKCNT_MSK); in cm_get_mpu_clk_hz()
268 CLKMGR_CLKCNT_MSK); in cm_get_mpu_clk_hz()
288 CLKMGR_CLKCNT_MSK); in cm_get_l3_main_clk_hz()
305 CLKMGR_CLKCNT_MSK); in cm_get_l3_main_clk_hz()
319 CLKMGR_CLKCNT_MSK); in cm_get_mmc_controller_clk_hz()
325 CLKMGR_CLKCNT_MSK); in cm_get_mmc_controller_clk_hz()
348 CLKMGR_NOCDIV_L4SPCLK_OFFSET) & CLKMGR_CLKCNT_MSK)); in cm_get_l4_sp_clk_hz()
362 CLKMGR_NOCDIV_L4MAIN_OFFSET) & CLKMGR_CLKCNT_MSK)); in cm_get_spi_controller_clk_hz()
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dclock_manager_s10.h171 #define CLKMGR_CLKCNT_MSK 0x7ff macro