| /external/libhevc/common/arm64/ |
| D | ihevc_mem_fns.s | 117 CMN x2,#8
189 CMN x2,#8
262 CMN x2,#8
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | negative-immediates.s | 30 CMN r0, #0xFFFFFF01
33 # CHECK-DISABLED: CMN
153 CMN r0, #0xFFFFFF01
156 # CHECK-DISABLED: CMN
|
| /external/sonivox/arm-wt-22k/lib_src/ |
| D | ARM-E_mastergain_gnu.s | 81 CMN r4, r6 @check for negative saturation
90 CMN r5, r6 @check for negative saturation
|
| /external/vixl/test/aarch32/config/ |
| D | cond-rd-operand-rn-t32.json | 38 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
39 // CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount> } ; T2
139 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
|
| D | cond-rd-operand-const-a32.json | 29 "Cmn", // CMN{<c>}{<q>} <Rn>, #<const> ; A1
95 "Cmn", // CMN{<c>}{<q>} <Rn>, #<const> ; A1
|
| D | cond-rd-operand-const-t32.json | 32 "Cmn", // CMN{<c>}{<q>} <Rn>, #<const> ; T1
|
| D | cond-rd-operand-rn-shift-rs-a32.json | 29 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm>, <shift> <Rs> ; A1
|
| D | cond-rd-operand-rn-shift-amount-1to31-a32.json | 29 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount> } ; A1
|
| D | cond-rd-operand-rn-shift-amount-1to32-a32.json | 29 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount> } ; A1
|
| D | cond-rd-operand-rn-a32.json | 37 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount> } ; A1
|
| D | cond-rd-operand-rn-shift-amount-1to31-t32.json | 32 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount> } ; T2
|
| D | cond-rd-operand-rn-shift-amount-1to32-t32.json | 33 "Cmn", // CMN{<c>}{<q>} <Rn>, <Rm> {, <shift> #<amount> } ; T2
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| D | cmn.ll | 1 ; Show that we know how to encode CMN in the ARM integrated assembler.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | cond-br-tuning.ll | 6 ; CMN is an alias of ADDS.
|
| /external/v8/src/arm/ |
| D | constants-arm.h | 132 CMN = 11 << 21, // Compare Negated. enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-aliases.s | 58 ; ADDS to WZR/XZR is a CMN
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 109 # CMN
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 122 # CMN
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-aliases.s | 58 ; ADDS to WZR/XZR is a CMN
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 122 # CMN
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 185 @ CMN
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 55 CMN, // ARM CMN instructions. enumerator
|
| D | README.txt | 582 The CMN instruction sets the flags like an ADD instruction, while CMP sets
583 them like a subtract. Therefore to be able to use CMN for comparisons other
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | README.txt | 587 The CMN instruction sets the flags like an ADD instruction, while CMP sets
588 them like a subtract. Therefore to be able to use CMN for comparisons other
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 81 CMN, // ARM CMN instructions. enumerator
|