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Searched refs:CONFIG_DIMM_SLOTS_PER_CTLR (Results 1 – 25 of 74) sorted by relevance

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/external/u-boot/drivers/ddr/fsl/
Dmain.c42 #if (CONFIG_SYS_NUM_DDR_CTLRS == 1) && (CONFIG_DIMM_SLOTS_PER_CTLR == 1)
43 u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
46 #elif (CONFIG_SYS_NUM_DDR_CTLRS == 1) && (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
47 u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
51 #elif (CONFIG_SYS_NUM_DDR_CTLRS == 2) && (CONFIG_DIMM_SLOTS_PER_CTLR == 1)
52 u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
56 #elif (CONFIG_SYS_NUM_DDR_CTLRS == 2) && (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
57 u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
63 #elif (CONFIG_SYS_NUM_DDR_CTLRS == 3) && (CONFIG_DIMM_SLOTS_PER_CTLR == 1)
64 u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
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Doptions.c719 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in auto_bank_intlv()
724 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in auto_bank_intlv()
767 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()
779 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in populate_memctl_options()
971 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { in populate_memctl_options()
1214 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()
1221 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in populate_memctl_options()
1249 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()
1255 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in populate_memctl_options()
1264 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()
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Dmpc85xx_ddr_gen3.c228 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in fsl_ddr_set_memctl_regs()
248 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in fsl_ddr_set_memctl_regs()
268 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in fsl_ddr_set_memctl_regs()
288 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in fsl_ddr_set_memctl_regs()
308 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in fsl_ddr_set_memctl_regs()
/external/u-boot/board/freescale/mpc8641hpcn/
Dddr.c65 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { in fsl_ddr_board_options()
69 if (i >= CONFIG_DIMM_SLOTS_PER_CTLR) /* no DIMM */ in fsl_ddr_board_options()
/external/u-boot/board/freescale/mpc8349emds/
Dddr.c52 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { in fsl_ddr_board_options()
56 if (i >= CONFIG_DIMM_SLOTS_PER_CTLR) /* no DIMM */ in fsl_ddr_board_options()
/external/u-boot/board/xes/xpedite550x/
Dddr.c89 if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) { in fsl_ddr_board_options()
92 } else if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) { in fsl_ddr_board_options()
/external/u-boot/include/configs/
DMPC8541CDS.h51 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
52 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
DMPC8555CDS.h51 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
52 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
DMPC8540ADS.h77 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
78 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
Dcontrolcenterd.h122 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
123 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
DMPC8568MDS.h57 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
58 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
DMPC8560ADS.h76 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
77 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
DMPC8548CDS.h70 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
71 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
Dls1012afrdm.h12 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
Dcyrus.h109 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
110 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
Dls1012a2g5rdb.h12 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
Dls1012ardb.h12 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
DMPC8569MDS.h82 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
83 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
Dls1012afrwy.h16 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
Dsbc8641d.h98 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 macro
99 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
DMPC8610HPCD.h89 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
90 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
/external/u-boot/board/freescale/ls2080aqds/
Dddr.c31 for (slot = 0; slot < CONFIG_DIMM_SLOTS_PER_CTLR; slot++) { in fsl_ddr_board_options()
36 if (slot >= CONFIG_DIMM_SLOTS_PER_CTLR) in fsl_ddr_board_options()
/external/u-boot/board/freescale/ls2080ardb/
Dddr.c31 for (slot = 0; slot < CONFIG_DIMM_SLOTS_PER_CTLR; slot++) { in fsl_ddr_board_options()
36 if (slot >= CONFIG_DIMM_SLOTS_PER_CTLR) in fsl_ddr_board_options()
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dcpu.c491 spd[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR]; in dump_spd_ddr_reg()
494 fsl_ddr_get_spd(spd[i], i, CONFIG_DIMM_SLOTS_PER_CTLR); in dump_spd_ddr_reg()
500 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) in dump_spd_ddr_reg()
508 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in dump_spd_ddr_reg()
/external/u-boot/include/configs/km/
Dkmp204x-common.h95 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
96 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)

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