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Searched refs:CONFIG_SAR2_REG (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-mvebu/include/mach/
Dsoc.h127 #define CONFIG_SAR2_REG (MVEBU_REGISTER(0xe8204)) macro
158 #define CONFIG_SAR2_REG (MVEBU_REGISTER(0x18234)) macro
/external/u-boot/arch/arm/mach-mvebu/
Dcpu.c148 val = readl(CONFIG_SAR2_REG); /* SAR - Sample At Reset */ in get_sar_freq()
158 freq |= ((readl(CONFIG_SAR2_REG) & SAR2_CPU_FREQ_MASK) in get_sar_freq()
/external/u-boot/scripts/
Dconfig_whitelist.txt1725 CONFIG_SAR2_REG