| /external/u-boot/arch/powerpc/cpu/mpc8xxx/ |
| D | fsl_lbc.c | 60 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM) in init_early_memctl_regs()
61 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM); in init_early_memctl_regs()
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| /external/u-boot/include/configs/ |
| D | P2041RDB.h | 241 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
246 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
252 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| D | corenet_ds.h | 250 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
255 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
261 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| D | sbc8548.h | 221 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_BR0_8M macro
230 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_BR0_64M macro
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| D | vme8349.h | 104 #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ macro
124 #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ macro
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| D | P1022DS.h | 205 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
257 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
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| D | MPC8313ERDB.h | 276 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM macro
281 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NOR_BR_PRELIM macro
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| D | M5272C3.h | 177 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 macro
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| D | cobra5272.h | 287 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 macro
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| D | MPC8541CDS.h | 102 #define CONFIG_SYS_BR0_PRELIM 0xff801001 macro
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| D | MPC8555CDS.h | 100 #define CONFIG_SYS_BR0_PRELIM 0xff801001 macro
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| D | MPC8540ADS.h | 100 #define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */ macro
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| D | socrates.h | 109 #define CONFIG_SYS_BR0_PRELIM 0xfe001001 /* port size 16bit */ macro
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| D | controlcenterd.h | 149 #define CONFIG_SYS_BR0_PRELIM 0 /* CS0 was originally intended for FPGA */ macro
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| D | MPC8568MDS.h | 108 #define CONFIG_SYS_BR0_PRELIM 0xfe001001 macro
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| D | p1_p2_rdb_pc.h | 473 #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ macro
478 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| D | P1023RDB.h | 137 #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ macro
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| D | MPC8560ADS.h | 99 #define CONFIG_SYS_BR0_PRELIM 0xff001801 /* port size 32bit */ macro
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| /external/u-boot/board/xes/xpedite520x/ |
| D | xpedite520x.c | 39 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /external/u-boot/board/xes/xpedite537x/ |
| D | xpedite537x.c | 37 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /external/u-boot/board/xes/xpedite550x/ |
| D | xpedite550x.c | 37 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /external/u-boot/board/xes/xpedite517x/ |
| D | xpedite517x.c | 42 set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); in flash_cs_fixup()
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| /external/u-boot/configs/ |
| D | MCR3000_defconfig | 16 CONFIG_SYS_BR0_PRELIM=0x04000801
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| /external/u-boot/arch/powerpc/cpu/mpc8xx/ |
| D | cpu_init.c | 138 out_be32(&memctl->memc_br0, CONFIG_SYS_BR0_PRELIM); in cpu_init_f()
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| /external/u-boot/include/configs/km/ |
| D | km83xx-common.h | 97 #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ macro
|