Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_PCIE1_IO_PHYS (Results 1 – 25 of 72) sorted by relevance

123

/external/u-boot/include/configs/
Dxpedite517x.h285 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000 macro
399 #define CONFIG_SYS_DBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
403 #define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE1_IO_PHYS |\
407 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
Dsbc8641d.h269 #define CONFIG_SYS_PCIE1_IO_PHYS CONFIG_SYS_PCIE1_IO_BUS macro
397 #define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW \
400 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
Dcontrolcenterd.h235 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull macro
237 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 macro
DMPC8548CDS.h363 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfe3000000ull macro
365 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 macro
Dcyrus.h256 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
258 #define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 macro
DMPC8572DS.h432 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull macro
434 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 macro
DP2041RDB.h387 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
389 #define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 macro
DP1022DS.h424 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull macro
426 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 macro
DMPC8536DS.h423 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc10000ull macro
425 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc10000 macro
Dcorenet_ds.h395 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
397 #define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 macro
DMPC8641HPCN.h306 #define CONFIG_SYS_PCIE1_IO_PHYS \ macro
335 #define CONFIG_SYS_PCIE2_IO_PHYS (CONFIG_SYS_PCIE1_IO_PHYS \
/external/u-boot/board/xes/xpedite537x/
Dtlb.c75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/xes/xpedite550x/
Dtlb.c75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/mpc8308_p1m/
Dmpc8308_p1m.c34 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/p1_twr/
Dtlb.c59 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/mpc8548cds/
Dtlb.c81 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/gdsys/p1022/
Dtlb.c61 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/p1010rdb/
Dtlb.c60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/c29xpcie/
Dtlb.c42 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/Arcturus/ucp1020/
Dtlb.c57 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/bsc9132qds/
Dtlb.c65 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/varisys/cyrus/
Dtlb.c75 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/keymile/kmp204x/
Dtlb.c58 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/t1040qds/
Dtlb.c61 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dtlb.c53 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,

123