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Searched refs:DCLO_R6 (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td107 def DCLO_R6 : R6MMR6Rel, DCLO_R6_ENC, DCLO_R6_DESC, ISA_MIPS64R6;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td137 def DCLO_R6 : DCLO_R6_ENC, DCLO_R6_DESC, ISA_MIPS64R6;
/external/v8/src/mips64/
Dconstants-mips64.h502 DCLO_R6 = ((2U << 3) + 3), enumerator
Ddisasm-mips64.cc1537 } else if ((instr->FunctionFieldRaw() == DCLO_R6) && in DecodeTypeRegisterSPECIAL()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc550 22199U, // DCLO_R6
2264 0U, // DCLO_R6
DMipsGenDisassemblerTables.inc3672 /* 152 */ MCD_OPC_Decode, 149, 4, 199, 1, // Opcode: DCLO_R6
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc1183 UINT64_C(83), // DCLO_R6
4361 case Mips::DCLO_R6:
8909 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLO_R6 = 1170
DMipsGenAsmWriter.inc2398 22873U, // DCLO_R6
5029 0U, // DCLO_R6
DMipsGenInstrInfo.inc1185 DCLO_R6 = 1170,
5230 …, 2, 1, 4, 89, 0, 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1170 = DCLO_R6
DMipsGenDisassemblerTables.inc6220 /* 178 */ MCD::OPC_Decode, 146, 9, 15, // Opcode: DCLO_R6
DMipsGenAsmMatcher.inc5916 …{ 3138 /* dclo */, Mips::DCLO_R6, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1, Feature_HasStdEnc|Featu…
DMipsGenDAGISel.inc12741 /* 23468*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DCLO_R6), 0,
12744 // Dst: (DCLO_R6:{ *:[i64] } GPR64Opnd:{ *:[i64] }:$rs)