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Searched refs:DCLZ_R6 (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td108 def DCLZ_R6 : R6MMR6Rel, DCLZ_R6_ENC, DCLZ_R6_DESC, ISA_MIPS64R6;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td138 def DCLZ_R6 : DCLZ_R6_ENC, DCLZ_R6_DESC, ISA_MIPS64R6;
/external/v8/src/mips64/
Dconstants-mips64.h501 DCLZ_R6 = ((2U << 3) + 2), enumerator
Ddisasm-mips64.cc1535 if ((instr->FunctionFieldRaw() == DCLZ_R6) && (instr->FdValue() == 1)) { in DecodeTypeRegisterSPECIAL()
Dassembler-mips64.cc2842 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 1, DCLZ_R6); in dclz()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc552 25247U, // DCLZ_R6
2266 0U, // DCLZ_R6
DMipsGenDisassemblerTables.inc3667 /* 127 */ MCD_OPC_Decode, 151, 4, 199, 1, // Opcode: DCLZ_R6
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc1185 UINT64_C(82), // DCLZ_R6
4362 case Mips::DCLZ_R6:
8911 Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLZ_R6 = 1172
DMipsGenAsmWriter.inc2400 26152U, // DCLZ_R6
5031 0U, // DCLZ_R6
DMipsGenFastISel.inc201 return fastEmitInst_r(Mips::DCLZ_R6, &Mips::GPR64RegClass, Op0, Op0IsKill);
DMipsGenInstrInfo.inc1187 DCLZ_R6 = 1172,
5232 …, 2, 1, 4, 90, 0, 0x6ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1172 = DCLZ_R6
DMipsGenDisassemblerTables.inc6215 /* 150 */ MCD::OPC_Decode, 148, 9, 15, // Opcode: DCLZ_R6
DMipsGenAsmMatcher.inc5918 …{ 3143 /* dclz */, Mips::DCLZ_R6, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1, Feature_HasStdEnc|Featu…
DMipsGenDAGISel.inc12778 /* 23530*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DCLZ_R6), 0,
12781 // Dst: (DCLZ_R6:{ *:[i64] } GPR64Opnd:{ *:[i64] }:$rs)