| /external/swiftshader/third_party/llvm-7.0/llvm/lib/ProfileData/ |
| D | SampleProf.cpp | 155 unsigned FunctionSamples::getOffset(const DILocation *DIL) { in getOffset() argument
156 return (DIL->getLine() - DIL->getScope()->getSubprogram()->getLine()) & in getOffset()
161 FunctionSamples::findFunctionSamples(const DILocation *DIL) const { in findFunctionSamples()
162 assert(DIL); in findFunctionSamples()
165 const DILocation *PrevDIL = DIL; in findFunctionSamples()
166 for (DIL = DIL->getInlinedAt(); DIL; DIL = DIL->getInlinedAt()) { in findFunctionSamples()
168 LineLocation(getOffset(DIL), DIL->getBaseDiscriminator()), in findFunctionSamples()
170 PrevDIL = DIL; in findFunctionSamples()
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| /external/llvm/lib/Transforms/Utils/ |
| D | AddDiscriminators.cpp | 189 const DILocation *DIL = I.getDebugLoc(); in addDiscriminators() local
190 if (!DIL) in addDiscriminators()
192 Location L = std::make_pair(DIL->getFilename(), DIL->getLine()); in addDiscriminators()
202 auto *Scope = DIL->getScope(); in addDiscriminators()
204 Builder.createFile(DIL->getFilename(), Scope->getDirectory()); in addDiscriminators()
207 I.setDebugLoc(DILocation::get(Ctx, DIL->getLine(), DIL->getColumn(), in addDiscriminators()
208 NewScope, DIL->getInlinedAt())); in addDiscriminators()
209 DEBUG(dbgs() << DIL->getFilename() << ":" << DIL->getLine() << ":" in addDiscriminators()
210 << DIL->getColumn() << ":" in addDiscriminators()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| D | AddDiscriminators.cpp | 199 const DILocation *DIL = I.getDebugLoc(); in addDiscriminators() local
200 if (!DIL) in addDiscriminators()
202 Location L = std::make_pair(DIL->getFilename(), DIL->getLine()); in addDiscriminators()
212 I.setDebugLoc(DIL->setBaseDiscriminator(Discriminator)); in addDiscriminators()
213 LLVM_DEBUG(dbgs() << DIL->getFilename() << ":" << DIL->getLine() << ":" in addDiscriminators()
214 << DIL->getColumn() << ":" << Discriminator << " " << I in addDiscriminators()
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| D | LoopUnroll.cpp | 599 if (const DILocation *DIL = I.getDebugLoc()) in UnrollLoop() local
600 I.setDebugLoc(DIL->cloneWithDuplicationFactor(Count)); in UnrollLoop()
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| D | LoopUnrollAndJam.cpp | 300 if (const DILocation *DIL = I.getDebugLoc()) in UnrollAndJamLoop() local
301 I.setDebugLoc(DIL->cloneWithDuplicationFactor(Count)); in UnrollAndJamLoop()
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| /external/llvm/lib/Transforms/IPO/ |
| D | SampleProfile.cpp | 468 const DILocation *DIL = DLoc; in getInstWeight() local
470 unsigned HeaderLineno = DIL->getScope()->getSubprogram()->getLine(); in getInstWeight()
473 uint32_t Discriminator = DIL->getDiscriminator(); in getInstWeight()
487 DEBUG(dbgs() << " " << Lineno << "." << DIL->getDiscriminator() << ":" in getInstWeight()
489 << DIL->getDiscriminator() << " - weight: " << R.get() in getInstWeight()
566 const DILocation *DIL = Inst.getDebugLoc(); in findCalleeFunctionSamples() local
567 if (!DIL) { in findCalleeFunctionSamples()
570 DISubprogram *SP = DIL->getScope()->getSubprogram(); in findCalleeFunctionSamples()
579 getOffset(DIL->getLine(), SP->getLine()), DIL->getDiscriminator())); in findCalleeFunctionSamples()
594 const DILocation *DIL = Inst.getDebugLoc(); in findFunctionSamples() local
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/ |
| D | SampleProfile.cpp | 545 const DILocation *DIL = DLoc; in getInstWeight() local
546 uint32_t LineOffset = FunctionSamples::getOffset(DIL); in getInstWeight()
547 uint32_t Discriminator = DIL->getBaseDiscriminator(); in getInstWeight()
567 << DIL->getBaseDiscriminator() << ":" << Inst in getInstWeight()
569 << DIL->getBaseDiscriminator() << " - weight: " << R.get() in getInstWeight()
632 const DILocation *DIL = Inst.getDebugLoc(); in findCalleeFunctionSamples() local
633 if (!DIL) { in findCalleeFunctionSamples()
648 return FS->findFunctionSamplesAt(LineLocation(FunctionSamples::getOffset(DIL), in findCalleeFunctionSamples()
649 DIL->getBaseDiscriminator()), in findCalleeFunctionSamples()
659 const DILocation *DIL = Inst.getDebugLoc(); in findIndirectCallFunctionSamples() local
[all …]
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 108 X86::SIL, X86::DIL, X86::BPL, X86::SPL, X86::RAX, X86::RBX, in initLLVMToSEHAndCVRegMapping()
287 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
315 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
316 return X86::DIL; in getX86SubSuperRegisterOrZero()
352 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
388 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
424 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
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| D | X86BaseInfo.h | 762 reg == X86::SIL || reg == X86::DIL); in isX86_64NonExtLowByteReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 139 { codeview::RegisterId::CVRegDIL, X86::DIL}, in initLLVMToSEHAndCVRegMapping()
503 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
531 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
532 return X86::DIL; in getX86SubSuperRegisterOrZero()
568 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
604 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
640 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegisterOrZero()
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| D | X86BaseInfo.h | 803 reg == X86::SIL || reg == X86::DIL); in isX86_64NonExtLowByteReg()
|
| /external/llvm/test/CodeGen/X86/ |
| D | ipra-inline-asm.ll | 14 ; CHECK: foo Clobbered Registers: AH AL AX CH CL CX DI DIL EAX ECX EDI RAX RCX RDI
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 425 Reserved.set(X86::DIL); in getReservedRegs()
691 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
692 return X86::DIL; in getX86SubSuperRegister()
728 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
764 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
800 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
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| D | X86RegisterInfo.td | 52 def DIL : Register<"dil">;
81 def DI : RegisterWithSubRegs<"di", [DIL]>;
279 // In 64-mode, there are 12 additional i8 registers, SIL, DIL, BPL, SPL, and
285 // instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.
289 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
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| D | X86GenRegisterInfo.inc | 50 DIL = 31,
278 const unsigned DI_Overlaps[] = { X86::DI, X86::DIL, X86::EDI, X86::RDI, 0 };
279 const unsigned DIL_Overlaps[] = { X86::DIL, X86::DI, X86::EDI, X86::RDI, 0 };
295 const unsigned EDI_Overlaps[] = { X86::EDI, X86::DI, X86::DIL, X86::RDI, 0 };
357 const unsigned RDI_Overlaps[] = { X86::RDI, X86::DI, X86::DIL, X86::EDI, 0 };
413 const unsigned DI_SubRegsSet[] = { X86::DIL, 0 };
419 const unsigned EDI_SubRegsSet[] = { X86::DI, X86::DIL, 0 };
452 const unsigned RDI_SubRegsSet[] = { X86::EDI, X86::DI, X86::DIL, 0 };
596 { "DIL", DIL_Overlaps, Empty_SubRegsSet, DIL_SuperRegsSet },
730 …X86::AL, X86::CL, X86::DL, X86::AH, X86::CH, X86::DH, X86::BL, X86::BH, X86::SIL, X86::DIL, X86::B…
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/ |
| D | MachineInstrTest.cpp | 262 DILocation *DIL = DILocation::get(Ctx, 1, 5, DIS); in TEST() local
263 DebugLoc DL(DIL); in TEST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | pr29061.ll | 4 ; Previously, a reference to SIL/DIL was being emitted
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ProfileData/ |
| D | SampleProf.h | 407 static unsigned getOffset(const DILocation *DIL);
418 const FunctionSamples *findFunctionSamples(const DILocation *DIL) const;
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| /external/lzma/Asm/x86/ |
| D | 7zAsm.asm | 77 x7_L equ DIL
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 63 def DIL : X86Reg<"dil", 7>;
85 def DI : X86Reg<"di", 7, [DIL]>;
319 // In 64-mode, there are 12 additional i8 registers, SIL, DIL, BPL, SPL, and
325 // instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.
329 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 65 def DIL : X86Reg<"dil", 7>;
121 def DI : X86Reg<"di", 7, [DIL,DIH]>;
371 // In 64-mode, there are 12 additional i8 registers, SIL, DIL, BPL, SPL, and
377 // instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.
381 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
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| D | X86RegisterInfo.cpp | 552 Reserved.set(X86::DIL); in getReservedRegs()
578 {X86::SIL, X86::DIL, X86::BPL, X86::SPL, in getReservedRegs()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 542 reg == X86::SIL || reg == X86::DIL); in isX86_64NonExtLowByteReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1411 auto *DIL = dyn_cast<DILabel>(MO.getMetadata()); in print() local
1412 if (DIL && !DIL->getName().empty()) in print()
1413 OS << "\"" << DIL->getName() << '\"'; in print()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 86 ENTRY(DIL)
|