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Searched refs:DSHD (Results 1 – 15 of 15) sorted by relevance

/external/v8/src/mips64/
Dconstants-mips64.h603 DSHD = ((0U << 3) + 5), enumerator
1812 case DSHD: in InstructionType()
Ddisasm-mips64.cc1823 case DSHD: { in DecodeTypeRegisterSPECIAL3()
Dassembler-mips64.cc2953 GenInstrRegister(SPECIAL3, zero_reg, rt, rd, DSHD, DBSHFL); in dshd()
Dsimulator-mips64.cc4407 case DSHD: { in DecodeTypeRegisterSPECIAL3()
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td303 def DSHD : SubwordSwap<"dshd", GPR64Opnd>, SEB_FM<5, 0x24>, ISA_MIPS64R2;
596 def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips64InstrInfo.td350 def DSHD : SubwordSwap<"dshd", GPR64Opnd, II_DSHD>, SEB_FM<5, 0x24>,
778 def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>, ISA_MIPS64R2;
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc632 20040U, // DSHD
2346 0U, // DSHD
DMipsGenDisassemblerTables.inc4554 /* 2138 */ MCD_OPC_Decode, 231, 4, 220, 1, // Opcode: DSHD
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc1291 UINT64_C(2080375140), // DSHD
4589 case Mips::DSHD:
9017 Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSHD = 1278
DMipsGenAsmWriter.inc2506 20518U, // DSHD
5137 0U, // DSHD
DMipsGenInstrInfo.inc1293 DSHD = 1278,
5338 …78, 2, 1, 4, 114, 0, 0x1ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #1278 = DSHD
DMipsGenGlobalISel.inc15570 …// (bswap:{ *:[i64] } GPR64:{ *:[i64] }:$rt) => (DSHD:{ *:[i64] } (DSBH:{ *:[i64] } GPR64:{ *:[i…
15576 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DSHD,
DMipsGenDisassemblerTables.inc7028 /* 1149 */ MCD::OPC_Decode, 254, 9, 226, 2, // Opcode: DSHD
DMipsGenAsmMatcher.inc6102 …{ 3834 /* dshd */, Mips::DSHD, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1, Feature_HasStdEnc|Feature_…
DMipsGenDAGISel.inc26862 /* 50489*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DSHD), 0,
26865 // Dst: (DSHD:{ *:[i64] } (DSBH:{ *:[i64] } GPR64:{ *:[i64] }:$rt))