Home
last modified time | relevance | path

Searched refs:DefI (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonGenPredicate.cpp211 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in processPredicateGPR() local
212 DefI->eraseFromParent(); in processPredicateGPR()
234 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in getPredRegFor() local
235 assert(DefI); in getPredRegFor()
236 unsigned Opc = DefI->getOpcode(); in getPredRegFor()
238 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse()); in getPredRegFor()
239 Register PR = DefI->getOperand(1); in getPredRegFor()
245 MachineBasicBlock &B = *DefI->getParent(); in getPredRegFor()
246 DebugLoc DL = DefI->getDebugLoc(); in getPredRegFor()
252 if (isConvertibleToPredForm(DefI)) { in getPredRegFor()
[all …]
DHexagonExpandCondsets.cpp371 MachineInstr *DefI = LIS->getInstructionFromIndex(NextI->start); in updateKillFlags() local
372 if (HII->isPredicated(*DefI)) in updateKillFlags()
456 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local
457 if (LocalImpDefs.count(DefI)) in updateDeadsInRange()
459 Defs.insert(DefI->getParent()); in updateDeadsInRange()
460 if (HII->isPredicated(*DefI)) in updateDeadsInRange()
491 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local
492 if (LocalImpDefs.count(DefI)) in updateDeadsInRange()
494 for (auto &Op : DefI->operands()) { in updateDeadsInRange()
511 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local
[all …]
DHexagonGenInsert.cpp985 const MachineInstr *DefI = MRI->getVRegDef(R); in findRemovableRegisters() local
986 assert(DefI); in findRemovableRegisters()
990 if (DefI->isPHI()) in findRemovableRegisters()
992 getInstrUses(DefI, Regs[OtherS]); in findRemovableRegisters()
1127 const MachineInstr *DefI = MRI->getVRegDef(IR); in pruneUsesTooFar() local
1130 unsigned DIV = distance(DefI, DefV, RPO, M); in pruneUsesTooFar()
1314 const MachineInstr *DefI = MRI->getVRegDef(I->first); in selectCandidates() local
1315 getInstrUses(DefI, Us); in selectCandidates()
1413 MachineInstr *DefI = MRI->getVRegDef(I->first); in generateInserts() local
1415 DefI->eraseFromParent(); in generateInserts()
DHexagonSplitDouble.cpp213 MachineInstr *DefI = MRI->getVRegDef(R); in partitionRegisters() local
217 if (!DefI || isFixedInstr(DefI)) in partitionRegisters()
381 MachineInstr *DefI = MRI->getVRegDef(DR); in isProfitable() local
382 int32_t P = profit(DefI); in isProfitable()
1101 MachineInstr *DefI = MRI->getVRegDef(DR); in splitPartition() local
1102 SplitIns.insert(DefI); in splitPartition()
DHexagonEarlyIfConv.cpp384 const MachineInstr *DefI = MRI->getVRegDef(R); in usesUndefVReg() local
386 assert(DefI && "Expecting a reaching def in MRI"); in usesUndefVReg()
387 if (DefI->isImplicitDef()) in usesUndefVReg()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonGenPredicate.cpp231 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in processPredicateGPR() local
232 DefI->eraseFromParent(); in processPredicateGPR()
253 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in getPredRegFor() local
254 assert(DefI); in getPredRegFor()
255 unsigned Opc = DefI->getOpcode(); in getPredRegFor()
257 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse()); in getPredRegFor()
258 Register PR = DefI->getOperand(1); in getPredRegFor()
264 MachineBasicBlock &B = *DefI->getParent(); in getPredRegFor()
265 DebugLoc DL = DefI->getDebugLoc(); in getPredRegFor()
271 if (isConvertibleToPredForm(DefI)) { in getPredRegFor()
[all …]
DHexagonExpandCondsets.cpp342 MachineInstr *DefI = LIS->getInstructionFromIndex(NextI->start); in updateKillFlags() local
343 if (HII->isPredicated(*DefI)) in updateKillFlags()
419 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local
420 Defs.insert(DefI->getParent()); in updateDeadsInRange()
421 if (HII->isPredicated(*DefI)) in updateDeadsInRange()
473 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local
474 for (auto &Op : DefI->operands()) { in updateDeadsInRange()
490 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local
491 if (!HII->isPredicated(*DefI)) in updateDeadsInRange()
497 for (unsigned i = 0, e = DefI->getNumOperands(); i != e; ++i) { in updateDeadsInRange()
[all …]
DHexagonVExtract.cpp128 MachineInstr *DefI = MRI.getVRegDef(VecR); in runOnMachineFunction() local
129 MachineBasicBlock::iterator At = std::next(DefI->getIterator()); in runOnMachineFunction()
130 MachineBasicBlock &DefB = *DefI->getParent(); in runOnMachineFunction()
134 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc)) in runOnMachineFunction()
DHexagonSplitDouble.cpp236 MachineInstr *DefI = MRI->getVRegDef(R); in partitionRegisters() local
240 if (!DefI || isFixedInstr(DefI)) in partitionRegisters()
406 const MachineInstr *DefI = MRI->getVRegDef(Reg); in profit() local
407 switch (DefI->getOpcode()) { in profit()
415 return profit(DefI); in profit()
428 MachineInstr *DefI = MRI->getVRegDef(DR); in isProfitable() local
429 int32_t P = profit(DefI); in isProfitable()
1140 MachineInstr *DefI = MRI->getVRegDef(DR); in splitPartition() local
1141 SplitIns.insert(DefI); in splitPartition()
DHexagonGenInsert.cpp1021 const MachineInstr *DefI = MRI->getVRegDef(R); in findRemovableRegisters() local
1022 assert(DefI); in findRemovableRegisters()
1026 if (DefI->isPHI()) in findRemovableRegisters()
1028 getInstrUses(DefI, Regs[OtherS]); in findRemovableRegisters()
1159 const MachineInstr *DefI = MRI->getVRegDef(IR); in pruneUsesTooFar() local
1162 unsigned DIV = distance(DefI, DefV, RPO, M); in pruneUsesTooFar()
1347 const MachineInstr *DefI = MRI->getVRegDef(I->first); in selectCandidates() local
1348 getInstrUses(DefI, Us); in selectCandidates()
1445 MachineInstr *DefI = MRI->getVRegDef(I->first); in generateInserts() local
1447 DefI->eraseFromParent(); in generateInserts()
DHexagonEarlyIfConv.cpp408 const MachineInstr *DefI = MRI->getVRegDef(R); in usesUndefVReg() local
410 assert(DefI && "Expecting a reaching def in MRI"); in usesUndefVReg()
411 if (DefI->isImplicitDef()) in usesUndefVReg()
DHexagonConstExtenders.cpp1501 const MachineInstr *DefI = Rs.isVReg() ? MRI->getVRegDef(Rs.Reg) : nullptr; in calculatePlacement() local
1505 assert(!DefI || MDT->dominates(DefI->getParent(), DomB)); in calculatePlacement()
DHexagonBitSimplify.cpp2283 MachineInstr *DefI = MRI.getVRegDef(Op0.getReg()); in genBitSplit() local
2284 assert(DefI != nullptr); in genBitSplit()
2285 if (!MDT.dominates(DefI, &*At)) in genBitSplit()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMIRCanonicalizerPass.cpp261 MachineBasicBlock::iterator DefI = BBE; in rescheduleCanonically() local
266 if (DefI != BBE && UseI != BBE) in rescheduleCanonically()
270 DefI = BBI; in rescheduleCanonically()
280 if (DefI == BBE || UseI == BBE) in rescheduleCanonically()
285 DefI->dump(); in rescheduleCanonically()
292 MBB->splice(UseI, MBB, DefI); in rescheduleCanonically()
DMachineTraceMetrics.cpp640 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg); in DataDep() local
641 assert(!DefI.atEnd() && "Register has no defs"); in DataDep()
642 DefMI = DefI->getParent(); in DataDep()
643 DefOp = DefI.getOperandNo(); in DataDep()
644 assert((++DefI).atEnd() && "Register has multiple defs"); in DataDep()
/external/llvm/include/llvm/Analysis/
DLoopInfo.h730 auto *DefI = dyn_cast<Instruction>(U.get()); in movementPreservesLCSSAForm() local
731 if (!DefI) in movementPreservesLCSSAForm()
737 auto *DefBlock = DefI->getParent(); in movementPreservesLCSSAForm()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/
DLoopInfo.h902 auto *DefI = dyn_cast<Instruction>(U.get()); in movementPreservesLCSSAForm() local
903 if (!DefI) in movementPreservesLCSSAForm()
909 auto *DefBlock = DefI->getParent(); in movementPreservesLCSSAForm()
/external/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp617 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg); in DataDep() local
618 assert(!DefI.atEnd() && "Register has no defs"); in DataDep()
619 DefMI = DefI->getParent(); in DataDep()
620 DefOp = DefI.getOperandNo(); in DataDep()
621 assert((++DefI).atEnd() && "Register has multiple defs"); in DataDep()
/external/llvm/lib/Transforms/Scalar/
DIndVarSimplify.cpp205 auto *DefI = dyn_cast<Instruction>(Def); in getInsertPointForUses() local
206 if (!DefI) in getInsertPointForUses()
209 assert(DT->dominates(DefI, InsertPt) && "def does not dominate all uses"); in getInsertPointForUses()
211 auto *L = LI->getLoopFor(DefI->getParent()); in getInsertPointForUses()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DIndVarSimplify.cpp246 auto *DefI = dyn_cast<Instruction>(Def); in getInsertPointForUses() local
247 if (!DefI) in getInsertPointForUses()
250 assert(DT->dominates(DefI, InsertPt) && "def does not dominate all uses"); in getInsertPointForUses()
252 auto *L = LI->getLoopFor(DefI->getParent()); in getInsertPointForUses()
/external/clang/utils/TableGen/
DNeonEmitter.cpp1438 DefInit *DefI = cast<DefInit>(DI->getOperator()); in emitDag() local
1439 std::string Op = DefI->getAsString(); in emitDag()